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[ARM/AArch64][testsuite] Add explicit dependency on Neon Cumulative Saturation flag

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* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
        (Set_Neon_Cumulative_Sat): Add parameter.
        (__set_neon_cumulative_sat): Support new parameter.
        * gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
        (TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
        argument.
        * gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
        (TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
        argument.

From-SVN: r219764
This commit is contained in:
Christophe Lyon 2015-01-16 18:19:42 +00:00 committed by Christophe Lyon
parent a220c9da9e
commit 0619d58c81
4 changed files with 31 additions and 17 deletions
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12
gcc/testsuite/ChangeLog
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@ -1,3 +1,15 @@
2015-01-16 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(Set_Neon_Cumulative_Sat): Add parameter.
(__set_neon_cumulative_sat): Support new parameter.
* gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
(TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
(TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
2015-01-16 Bernd Edlinger <bernd.edlinger@hotmail.de>
* g++.dg/tsan/vptr_benign_race.C: New testcase.

32
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
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@ -255,7 +255,11 @@ typedef union {
#endif /* __ORDER_BIG_ENDIAN__ */
#define Neon_Cumulative_Sat __read_neon_cumulative_sat()
#define Set_Neon_Cumulative_Sat(x) __set_neon_cumulative_sat((x))
/* We need a fake dependency to ensure correct ordering of asm
statements to preset the QC flag value, and Neon operators writing
to QC. */
#define Set_Neon_Cumulative_Sat(x, depend) \
__set_neon_cumulative_sat((x), (depend))
#if defined(__aarch64__)
static volatile int __read_neon_cumulative_sat (void) {
@ -263,13 +267,12 @@ static volatile int __read_neon_cumulative_sat (void) {
asm volatile ("mrs %0,fpsr" : "=r" (_afpscr_for_qc));
return _afpscr_for_qc.b.QC;
}
static void __set_neon_cumulative_sat (int x) {
_ARM_FPSCR _afpscr_for_qc;
asm volatile ("mrs %0,fpsr" : "=r" (_afpscr_for_qc));
_afpscr_for_qc.b.QC = x;
asm volatile ("msr fpsr,%0" : : "r" (_afpscr_for_qc));
return;
}
#define __set_neon_cumulative_sat(x, depend) { \
_ARM_FPSCR _afpscr_for_qc; \
asm volatile ("mrs %0,fpsr" : "=r" (_afpscr_for_qc)); \
_afpscr_for_qc.b.QC = x; \
asm volatile ("msr fpsr,%1" : "=X" (depend) : "r" (_afpscr_for_qc)); \
}
#else
static volatile int __read_neon_cumulative_sat (void) {
_ARM_FPSCR _afpscr_for_qc;
@ -277,13 +280,12 @@ static volatile int __read_neon_cumulative_sat (void) {
return _afpscr_for_qc.b.QC;
}
static void __set_neon_cumulative_sat (int x) {
_ARM_FPSCR _afpscr_for_qc;
asm volatile ("vmrs %0,fpscr" : "=r" (_afpscr_for_qc));
_afpscr_for_qc.b.QC = x;
asm volatile ("vmsr fpscr,%0" : : "r" (_afpscr_for_qc));
return;
}
#define __set_neon_cumulative_sat(x, depend) { \
_ARM_FPSCR _afpscr_for_qc; \
asm volatile ("vmrs %0,fpscr" : "=r" (_afpscr_for_qc)); \
_afpscr_for_qc.b.QC = x; \
asm volatile ("vmsr fpscr,%1" : "=X" (depend) : "r" (_afpscr_for_qc)); \
}
#endif
/* Declare expected cumulative saturation results, one for each

2
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
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@ -18,7 +18,7 @@ void FNNAME (INSN_NAME) (void)
/* vector_res = OP(vector1,vector2), then store the result. */
#define TEST_BINARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
Set_Neon_Cumulative_Sat(0); \
Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N)); \
VECT_VAR(vector_res, T1, W, N) = \
INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N)); \

2
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
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@ -17,7 +17,7 @@ void FNNAME (INSN_NAME) (void)
{
/* y=OP(x), then store the result. */
#define TEST_UNARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
Set_Neon_Cumulative_Sat(0); \
Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N)); \
VECT_VAR(vector_res, T1, W, N) = \
INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \