sse.md (*sse2_maskmovdqu): Emit addr32 prefix when Pmode != word_mode.
* config/i386/sse.md (*sse2_maskmovdqu): Emit addr32 prefix when Pmode != word_mode. Add length_address attribute. (sse3_monitor_<mode>): Merge from sse3_monitor and sse3_monitor64_<mode> insn patterns. Emit addr32 prefix when Pmode != word_mode. Update insn length attribute. * config/i386/i386.c (ix86_option_override_internal): Update ix86_gen_monitor selection for merged sse3_monitor insn. From-SVN: r201708
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@ -1,3 +1,13 @@
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2013-08-13 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/sse.md (*sse2_maskmovdqu): Emit addr32 prefix
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when Pmode != word_mode. Add length_address attribute.
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(sse3_monitor_<mode>): Merge from sse3_monitor and
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sse3_monitor64_<mode> insn patterns. Emit addr32 prefix when
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Pmode != word_mode. Update insn length attribute.
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* config/i386/i386.c (ix86_option_override_internal): Update
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ix86_gen_monitor selection for merged sse3_monitor insn.
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2013-08-13 Julian Brown <julian@codesourcery.com>
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* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Don't
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@ -57,7 +67,7 @@
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2013-08-13 David Malcolm <dmalcolm@redhat.com>
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* config/i386/t-i386 (i386.o): Rename stray PIPELINE_H to
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PASS_MANAGER_H
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PASS_MANAGER_H.
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2013-08-12 Paolo Carlini <paolo.carlini@oracle.com>
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@ -4170,24 +4170,19 @@ ix86_option_override_internal (bool main_args_p)
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ix86_gen_leave = gen_leave_rex64;
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if (Pmode == DImode)
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{
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ix86_gen_monitor = gen_sse3_monitor64_di;
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ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_di;
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ix86_gen_tls_local_dynamic_base_64
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= gen_tls_local_dynamic_base_64_di;
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}
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else
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{
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ix86_gen_monitor = gen_sse3_monitor64_si;
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ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_si;
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ix86_gen_tls_local_dynamic_base_64
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= gen_tls_local_dynamic_base_64_si;
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}
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}
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else
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{
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ix86_gen_leave = gen_leave;
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ix86_gen_monitor = gen_sse3_monitor;
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}
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ix86_gen_leave = gen_leave;
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if (Pmode == DImode)
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{
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@ -4199,6 +4194,7 @@ ix86_option_override_internal (bool main_args_p)
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ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di;
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ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi;
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ix86_gen_probe_stack_range = gen_probe_stack_rangedi;
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ix86_gen_monitor = gen_sse3_monitor_di;
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}
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else
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{
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@ -4210,6 +4206,7 @@ ix86_option_override_internal (bool main_args_p)
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ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si;
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ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi;
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ix86_gen_probe_stack_range = gen_probe_stack_rangesi;
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ix86_gen_monitor = gen_sse3_monitor_si;
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}
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#ifdef USE_IX86_CLD
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@ -7731,9 +7731,17 @@
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(mem:V16QI (match_dup 0))]
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UNSPEC_MASKMOV))]
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"TARGET_SSE2"
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"%vmaskmovdqu\t{%2, %1|%1, %2}"
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{
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/* We can't use %^ here due to ASM_OUTPUT_OPCODE processing
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that requires %v to be at the beginning of the opcode name. */
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if (Pmode != word_mode)
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fputs ("\taddr32", asm_out_file);
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return "%vmaskmovdqu\t{%2, %1|%1, %2}";
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}
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[(set_attr "type" "ssemov")
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(set_attr "prefix_data16" "1")
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(set (attr "length_address")
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(symbol_ref ("Pmode != word_mode")))
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;; The implicit %rdi operand confuses default length_vex computation.
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(set (attr "length_vex")
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(symbol_ref ("3 + REX_SSE_REGNO_P (REGNO (operands[2]))")))
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@ -7781,26 +7789,18 @@
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"mwait"
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[(set_attr "length" "3")])
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(define_insn "sse3_monitor"
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[(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
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(match_operand:SI 1 "register_operand" "c")
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(match_operand:SI 2 "register_operand" "d")]
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UNSPECV_MONITOR)]
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"TARGET_SSE3 && !TARGET_64BIT"
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"monitor\t%0, %1, %2"
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[(set_attr "length" "3")])
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(define_insn "sse3_monitor64_<mode>"
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(define_insn "sse3_monitor_<mode>"
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[(unspec_volatile [(match_operand:P 0 "register_operand" "a")
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(match_operand:SI 1 "register_operand" "c")
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(match_operand:SI 2 "register_operand" "d")]
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UNSPECV_MONITOR)]
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"TARGET_SSE3 && TARGET_64BIT"
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"TARGET_SSE3"
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;; 64bit version is "monitor %rax,%rcx,%rdx". But only lower 32bits in
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;; RCX and RDX are used. Since 32bit register operands are implicitly
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;; zero extended to 64bit, we only need to set up 32bit registers.
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"monitor"
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[(set_attr "length" "3")])
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"%^monitor"
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[(set (attr "length")
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(symbol_ref ("(Pmode != word_mode) + 3")))])
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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