atomic_base.h (atomic_thread_fence): Call builtin.
2011-11-07 Andrew MacLeod <amacleod@redhat.com> libstdc++-v3 * include/bits/atomic_base.h (atomic_thread_fence): Call builtin. (atomic_signal_fence): Call builtin. (atomic_flag::test_and_set): Call __atomic_exchange when it is lockfree, otherwise fall back to call __sync_lock_test_and_set. (atomic_flag::clear): Call __atomic_store when it is lockfree, otherwise fall back to call __sync_lock_release. gcc * doc/extend.texi: Docuemnt behaviour change for __atomic_exchange and __atomic_store. * optabs.c (expand_atomic_exchange): Expand to __sync_lock_test_and_set only when originated from that builtin. (expand_atomic_store): Expand to __sync_lock_release when originated from that builtin. * builtins.c (expand_builtin_sync_lock_test_and_set): Add flag that expand_atomic_exchange call originated from here. (expand_builtin_sync_lock_release): Add flag that expand_atomic_store call originated from here. (expand_builtin_atomic_exchange): Add origination flag. (expand_builtin_atomic_store): Add origination flag. * expr.h (expand_atomic_exchange, expand_atomic_store): Add boolean parameters to indicate implementation fall back options. From-SVN: r181111
This commit is contained in:
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@ -1,3 +1,20 @@
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2011-11-07 Andrew MacLeod <amacleod@redhat.com>
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* doc/extend.texi: Docuemnt behaviour change for __atomic_exchange and
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__atomic_store.
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* optabs.c (expand_atomic_exchange): Expand to __sync_lock_test_and_set
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only when originated from that builtin.
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(expand_atomic_store): Expand to __sync_lock_release when originated
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from that builtin.
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* builtins.c (expand_builtin_sync_lock_test_and_set): Add flag that
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expand_atomic_exchange call originated from here.
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(expand_builtin_sync_lock_release): Add flag that expand_atomic_store
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call originated from here.
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(expand_builtin_atomic_exchange): Add origination flag.
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(expand_builtin_atomic_store): Add origination flag.
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* expr.h (expand_atomic_exchange, expand_atomic_store): Add boolean
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parameters to indicate implementation fall back options.
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2011-11-07 Georg-Johann Lay <avr@gjlay.de>
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* config/avr/avr.c (output_reload_in_const): Can handle CONSTANT_P
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@ -5221,7 +5221,7 @@ expand_builtin_sync_lock_test_and_set (enum machine_mode mode, tree exp,
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mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode);
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val = expand_expr_force_mode (CALL_EXPR_ARG (exp, 1), mode);
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return expand_atomic_exchange (target, mem, val, MEMMODEL_ACQUIRE);
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return expand_atomic_exchange (target, mem, val, MEMMODEL_ACQUIRE, true);
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}
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/* Expand the __sync_lock_release intrinsic. EXP is the CALL_EXPR. */
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@ -5234,7 +5234,7 @@ expand_builtin_sync_lock_release (enum machine_mode mode, tree exp)
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/* Expand the operands. */
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mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode);
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expand_atomic_store (mem, const0_rtx, MEMMODEL_RELEASE);
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expand_atomic_store (mem, const0_rtx, MEMMODEL_RELEASE, true);
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}
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/* Given an integer representing an ``enum memmodel'', verify its
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@ -5285,7 +5285,7 @@ expand_builtin_atomic_exchange (enum machine_mode mode, tree exp, rtx target)
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mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode);
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val = expand_expr_force_mode (CALL_EXPR_ARG (exp, 1), mode);
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return expand_atomic_exchange (target, mem, val, model);
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return expand_atomic_exchange (target, mem, val, model, false);
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}
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/* Expand the __atomic_compare_exchange intrinsic:
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@ -5402,7 +5402,7 @@ expand_builtin_atomic_store (enum machine_mode mode, tree exp)
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mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode);
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val = expand_expr_force_mode (CALL_EXPR_ARG (exp, 1), mode);
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return expand_atomic_store (mem, val, model);
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return expand_atomic_store (mem, val, model, false);
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}
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/* Expand the __atomic_fetch_XXX intrinsic:
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@ -6910,9 +6910,7 @@ contents of @code{*@var{ptr}} in @code{*@var{ret}}.
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@deftypefn {Built-in Function} void __atomic_store_n (@var{type} *ptr, @var{type} val, int memmodel)
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This built-in function implements an atomic store operation. It writes
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@code{@var{val}} into @code{*@var{ptr}}. On targets which are limited,
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0 may be the only valid value. This mimics the behaviour of
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@code{__sync_lock_release} on such hardware.
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@code{@var{val}} into @code{*@var{ptr}}.
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The valid memory model variants are
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@code{__ATOMIC_RELAXED}, @code{__ATOMIC_SEQ_CST}, and @code{__ATOMIC_RELEASE}.
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@ -6930,10 +6928,6 @@ This built-in function implements an atomic exchange operation. It writes
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@var{val} into @code{*@var{ptr}}, and returns the previous contents of
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@code{*@var{ptr}}.
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On targets which are limited, a value of 1 may be the only valid value
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written. This mimics the behaviour of @code{__sync_lock_test_and_set} on
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such hardware.
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The valid memory model variants are
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@code{__ATOMIC_RELAXED}, @code{__ATOMIC_SEQ_CST}, @code{__ATOMIC_ACQUIRE},
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@code{__ATOMIC_RELEASE}, and @code{__ATOMIC_ACQ_REL}.
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@ -215,9 +215,9 @@ rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, enum machine_mode,
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rtx expand_sync_operation (rtx, rtx, enum rtx_code);
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rtx expand_sync_fetch_operation (rtx, rtx, enum rtx_code, bool, rtx);
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rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel);
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rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel, bool);
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rtx expand_atomic_load (rtx, rtx, enum memmodel);
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rtx expand_atomic_store (rtx, rtx, enum memmodel);
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rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
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rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
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bool);
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void expand_atomic_thread_fence (enum memmodel);
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78
gcc/optabs.c
78
gcc/optabs.c
@ -7256,10 +7256,13 @@ expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
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atomically store VAL in MEM and return the previous value in MEM.
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MEMMODEL is the memory model variant to use.
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TARGET is an option place to stick the return value. */
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TARGET is an optional place to stick the return value.
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USE_TEST_AND_SET indicates whether __sync_lock_test_and_set should be used
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as a fall back if the atomic_exchange pattern does not exist. */
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rtx
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expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
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expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model,
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bool use_test_and_set)
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{
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enum machine_mode mode = GET_MODE (mem);
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enum insn_code icode;
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@ -7284,32 +7287,40 @@ expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
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acquire barrier. If the pattern exists, and the memory model is stronger
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than acquire, add a release barrier before the instruction.
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The barrier is not needed if sync_lock_test_and_set doesn't exist since
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it will expand into a compare-and-swap loop. */
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it will expand into a compare-and-swap loop.
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icode = direct_optab_handler (sync_lock_test_and_set_optab, mode);
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last_insn = get_last_insn ();
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if ((icode != CODE_FOR_nothing) && (model == MEMMODEL_SEQ_CST ||
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model == MEMMODEL_RELEASE ||
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model == MEMMODEL_ACQ_REL))
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expand_builtin_mem_thread_fence (model);
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Some targets have non-compliant test_and_sets, so it would be incorrect
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to emit a test_and_set in place of an __atomic_exchange. The test_and_set
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builtin shares this expander since exchange can always replace the
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test_and_set. */
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if (icode != CODE_FOR_nothing)
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if (use_test_and_set)
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{
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struct expand_operand ops[3];
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icode = direct_optab_handler (sync_lock_test_and_set_optab, mode);
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last_insn = get_last_insn ();
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if ((icode != CODE_FOR_nothing) && (model == MEMMODEL_SEQ_CST ||
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model == MEMMODEL_RELEASE ||
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model == MEMMODEL_ACQ_REL))
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expand_builtin_mem_thread_fence (model);
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create_output_operand (&ops[0], target, mode);
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create_fixed_operand (&ops[1], mem);
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/* VAL may have been promoted to a wider mode. Shrink it if so. */
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create_convert_operand_to (&ops[2], val, mode, true);
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if (maybe_expand_insn (icode, 3, ops))
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return ops[0].value;
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if (icode != CODE_FOR_nothing)
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{
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struct expand_operand ops[3];
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create_output_operand (&ops[0], target, mode);
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create_fixed_operand (&ops[1], mem);
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/* VAL may have been promoted to a wider mode. Shrink it if so. */
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create_convert_operand_to (&ops[2], val, mode, true);
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if (maybe_expand_insn (icode, 3, ops))
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return ops[0].value;
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}
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/* Remove any fence that was inserted since a compare and swap loop is
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already a full memory barrier. */
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if (last_insn != get_last_insn ())
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delete_insns_since (last_insn);
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}
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/* Remove any fence we may have inserted since a compare and swap loop is a
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full memory barrier. */
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if (last_insn != get_last_insn ())
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delete_insns_since (last_insn);
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/* Otherwise, use a compare-and-swap loop for the exchange. */
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if (can_compare_and_swap_p (mode))
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{
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@ -7489,10 +7500,11 @@ expand_atomic_load (rtx target, rtx mem, enum memmodel model)
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/* This function expands the atomic store operation:
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Atomically store VAL in MEM.
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MEMMODEL is the memory model variant to use.
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USE_RELEASE is true if __sync_lock_release can be used as a fall back.
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function returns const0_rtx if a pattern was emitted. */
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rtx
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expand_atomic_store (rtx mem, rtx val, enum memmodel model)
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expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
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{
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enum machine_mode mode = GET_MODE (mem);
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enum insn_code icode;
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@ -7509,12 +7521,30 @@ expand_atomic_store (rtx mem, rtx val, enum memmodel model)
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return const0_rtx;
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}
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/* If using __sync_lock_release is a viable alternative, try it. */
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if (use_release)
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{
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icode = direct_optab_handler (sync_lock_release_optab, mode);
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if (icode != CODE_FOR_nothing)
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{
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create_fixed_operand (&ops[0], mem);
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create_input_operand (&ops[1], const0_rtx, mode);
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if (maybe_expand_insn (icode, 2, ops))
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{
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/* lock_release is only a release barrier. */
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if (model == MEMMODEL_SEQ_CST)
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expand_builtin_mem_thread_fence (model);
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return const0_rtx;
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}
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}
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}
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/* If the size of the object is greater than word size on this target,
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a default store will not be atomic, Try a mem_exchange and throw away
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the result. If that doesn't work, don't do anything. */
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if (GET_MODE_PRECISION(mode) > BITS_PER_WORD)
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{
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rtx target = expand_atomic_exchange (NULL_RTX, mem, val, model);
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rtx target = expand_atomic_exchange (NULL_RTX, mem, val, model, false);
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if (target)
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return const0_rtx;
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else
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@ -1,3 +1,12 @@
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2011-11-07 Andrew MacLeod <amacleod@redhat.com>
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* include/bits/atomic_base.h (atomic_thread_fence): Call builtin.
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(atomic_signal_fence): Call builtin.
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(atomic_flag::test_and_set): Call __atomic_exchange when it is lockfree,
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otherwise fall back to call __sync_lock_test_and_set.
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(atomic_flag::clear): Call __atomic_store when it is lockfree,
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otherwise fall back to call __sync_lock_release.
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2011-11-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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PR bootstrap/50982
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@ -69,10 +69,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
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}
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void
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atomic_thread_fence(memory_order) noexcept;
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atomic_thread_fence(memory_order __m) noexcept
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{
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__atomic_thread_fence (__m);
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}
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void
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atomic_signal_fence(memory_order) noexcept;
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atomic_signal_fence(memory_order __m) noexcept
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{
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__atomic_signal_fence (__m);
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}
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/// kill_dependency
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template<typename _Tp>
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@ -261,13 +267,35 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
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bool
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test_and_set(memory_order __m = memory_order_seq_cst) noexcept
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{
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return __atomic_exchange_n(&_M_i, 1, __m);
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/* The standard *requires* this to be lock free. If exchange is not
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always lock free, the resort to the old test_and_set. */
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if (__atomic_always_lock_free (sizeof (_M_i), 0))
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return __atomic_exchange_n(&_M_i, 1, __m);
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else
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{
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/* Sync test and set is only guaranteed to be acquire. */
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if (__m == memory_order_seq_cst || __m == memory_order_release
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|| __m == memory_order_acq_rel)
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atomic_thread_fence (__m);
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return __sync_lock_test_and_set (&_M_i, 1);
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}
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}
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bool
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test_and_set(memory_order __m = memory_order_seq_cst) volatile noexcept
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{
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return __atomic_exchange_n(&_M_i, 1, __m);
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/* The standard *requires* this to be lock free. If exchange is not
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always lock free, the resort to the old test_and_set. */
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if (__atomic_always_lock_free (sizeof (_M_i), 0))
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return __atomic_exchange_n(&_M_i, 1, __m);
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else
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{
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/* Sync test and set is only guaranteed to be acquire. */
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if (__m == memory_order_seq_cst || __m == memory_order_release
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|| __m == memory_order_acq_rel)
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atomic_thread_fence (__m);
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return __sync_lock_test_and_set (&_M_i, 1);
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}
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}
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void
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@ -277,7 +305,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
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__glibcxx_assert(__m != memory_order_acquire);
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__glibcxx_assert(__m != memory_order_acq_rel);
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__atomic_store_n(&_M_i, 0, __m);
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/* The standard *requires* this to be lock free. If store is not always
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lock free, the resort to the old style __sync_lock_release. */
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if (__atomic_always_lock_free (sizeof (_M_i), 0))
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__atomic_store_n(&_M_i, 0, __m);
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else
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{
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__sync_lock_release (&_M_i, 0);
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/* __sync_lock_release is only guaranteed to be a release barrier. */
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if (__m == memory_order_seq_cst)
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atomic_thread_fence (__m);
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}
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}
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void
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@ -287,7 +325,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
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__glibcxx_assert(__m != memory_order_acquire);
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__glibcxx_assert(__m != memory_order_acq_rel);
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__atomic_store_n(&_M_i, 0, __m);
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/* The standard *requires* this to be lock free. If store is not always
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lock free, the resort to the old style __sync_lock_release. */
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if (__atomic_always_lock_free (sizeof (_M_i), 0))
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__atomic_store_n(&_M_i, 0, __m);
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else
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{
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__sync_lock_release (&_M_i, 0);
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/* __sync_lock_release is only guaranteed to be a release barrier. */
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if (__m == memory_order_seq_cst)
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atomic_thread_fence (__m);
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}
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}
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};
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