rs6000.c (struct processor_costs): Change semantics of fields to include the COST_N_INSNS scaling...
* rs6000.c (struct processor_costs): Change semantics of fields to include the COST_N_INSNS scaling, and update all initializers. (rs6000_rtx_costs): Don't use COSTS_N_INSNS on rs6000_cost fields. Use COSTS_N_INSNS(1) for NOT, SIGN_EXTEND, ZERO_EXTEND and COMPARE. Use rs6000_cost->fp for both FLOAT_TRUNCATE and UNSPEC_FRSP. When optimizing for size, use COSTS_N_INSNS(1) for CALL and IF_THEN_ELSE. From-SVN: r84512
This commit is contained in:
Roger Sayle
Roger Sayle
parent
e08b5a758a
commit
06a67bdd66
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@ -1,3 +1,12 @@
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2004-07-11 Roger Sayle <roger@eyesopen.com>
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* rs6000.c (struct processor_costs): Change semantics of fields to
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include the COST_N_INSNS scaling, and update all initializers.
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(rs6000_rtx_costs): Don't use COSTS_N_INSNS on rs6000_cost fields.
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Use COSTS_N_INSNS(1) for NOT, SIGN_EXTEND, ZERO_EXTEND and COMPARE.
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Use rs6000_cost->fp for both FLOAT_TRUNCATE and UNSPEC_FRSP. When
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optimizing for size, use COSTS_N_INSNS(1) for CALL and IF_THEN_ELSE.
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2004-07-11 Joseph S. Myers <jsm@polyomino.org.uk>
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* LANGUAGES: Remove obsolete information.
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@ -305,286 +305,286 @@ const struct processor_costs *rs6000_cost;
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/* Instruction size costs on 32bit processors. */
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static const
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struct processor_costs size32_cost = {
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1, /* mulsi */
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1, /* mulsi_const */
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1, /* mulsi_const9 */
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1, /* muldi */
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1, /* divsi */
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1, /* divdi */
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1, /* fp */
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1, /* dmul */
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1, /* sdiv */
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1, /* ddiv */
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COSTS_N_INSNS (1), /* mulsi */
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COSTS_N_INSNS (1), /* mulsi_const */
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COSTS_N_INSNS (1), /* mulsi_const9 */
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COSTS_N_INSNS (1), /* muldi */
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COSTS_N_INSNS (1), /* divsi */
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COSTS_N_INSNS (1), /* divdi */
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COSTS_N_INSNS (1), /* fp */
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COSTS_N_INSNS (1), /* dmul */
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COSTS_N_INSNS (1), /* sdiv */
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COSTS_N_INSNS (1), /* ddiv */
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};
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/* Instruction size costs on 64bit processors. */
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static const
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struct processor_costs size64_cost = {
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1, /* mulsi */
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1, /* mulsi_const */
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1, /* mulsi_const9 */
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1, /* muldi */
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1, /* divsi */
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1, /* divdi */
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1, /* fp */
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1, /* dmul */
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1, /* sdiv */
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1, /* ddiv */
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COSTS_N_INSNS (1), /* mulsi */
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COSTS_N_INSNS (1), /* mulsi_const */
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COSTS_N_INSNS (1), /* mulsi_const9 */
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COSTS_N_INSNS (1), /* muldi */
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COSTS_N_INSNS (1), /* divsi */
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COSTS_N_INSNS (1), /* divdi */
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COSTS_N_INSNS (1), /* fp */
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COSTS_N_INSNS (1), /* dmul */
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COSTS_N_INSNS (1), /* sdiv */
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COSTS_N_INSNS (1), /* ddiv */
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};
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/* Instruction costs on RIOS1 processors. */
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static const
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struct processor_costs rios1_cost = {
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5, /* mulsi */
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4, /* mulsi_const */
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3, /* mulsi_const9 */
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5, /* muldi */
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19, /* divsi */
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19, /* divdi */
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2, /* fp */
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2, /* dmul */
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19, /* sdiv */
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19, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (3), /* mulsi_const9 */
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COSTS_N_INSNS (5), /* muldi */
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COSTS_N_INSNS (19), /* divsi */
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COSTS_N_INSNS (19), /* divdi */
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COSTS_N_INSNS (2), /* fp */
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COSTS_N_INSNS (2), /* dmul */
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COSTS_N_INSNS (19), /* sdiv */
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COSTS_N_INSNS (19), /* ddiv */
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};
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/* Instruction costs on RIOS2 processors. */
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static const
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struct processor_costs rios2_cost = {
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2, /* mulsi */
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2, /* mulsi_const */
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2, /* mulsi_const9 */
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2, /* muldi */
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13, /* divsi */
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13, /* divdi */
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2, /* fp */
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2, /* dmul */
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17, /* sdiv */
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17, /* ddiv */
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COSTS_N_INSNS (2), /* mulsi */
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COSTS_N_INSNS (2), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (2), /* muldi */
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COSTS_N_INSNS (13), /* divsi */
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COSTS_N_INSNS (13), /* divdi */
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COSTS_N_INSNS (2), /* fp */
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COSTS_N_INSNS (2), /* dmul */
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COSTS_N_INSNS (17), /* sdiv */
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COSTS_N_INSNS (17), /* ddiv */
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};
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/* Instruction costs on RS64A processors. */
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static const
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struct processor_costs rs64a_cost = {
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20, /* mulsi */
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12, /* mulsi_const */
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8, /* mulsi_const9 */
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34, /* muldi */
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65, /* divsi */
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67, /* divdi */
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4, /* fp */
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4, /* dmul */
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31, /* sdiv */
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31, /* ddiv */
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COSTS_N_INSNS (20), /* mulsi */
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COSTS_N_INSNS (12), /* mulsi_const */
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COSTS_N_INSNS (8), /* mulsi_const9 */
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COSTS_N_INSNS (34), /* muldi */
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COSTS_N_INSNS (65), /* divsi */
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COSTS_N_INSNS (67), /* divdi */
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COSTS_N_INSNS (4), /* fp */
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COSTS_N_INSNS (4), /* dmul */
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COSTS_N_INSNS (31), /* sdiv */
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COSTS_N_INSNS (31), /* ddiv */
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};
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/* Instruction costs on MPCCORE processors. */
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static const
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struct processor_costs mpccore_cost = {
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2, /* mulsi */
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2, /* mulsi_const */
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2, /* mulsi_const9 */
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2, /* muldi */
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6, /* divsi */
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6, /* divdi */
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4, /* fp */
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5, /* dmul */
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10, /* sdiv */
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17, /* ddiv */
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COSTS_N_INSNS (2), /* mulsi */
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COSTS_N_INSNS (2), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (2), /* muldi */
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COSTS_N_INSNS (6), /* divsi */
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COSTS_N_INSNS (6), /* divdi */
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COSTS_N_INSNS (4), /* fp */
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COSTS_N_INSNS (5), /* dmul */
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COSTS_N_INSNS (10), /* sdiv */
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COSTS_N_INSNS (17), /* ddiv */
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};
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/* Instruction costs on PPC403 processors. */
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static const
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struct processor_costs ppc403_cost = {
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4, /* mulsi */
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4, /* mulsi_const */
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4, /* mulsi_const9 */
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4, /* muldi */
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33, /* divsi */
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33, /* divdi */
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11, /* fp */
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11, /* dmul */
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11, /* sdiv */
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11, /* ddiv */
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COSTS_N_INSNS (4), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (4), /* mulsi_const9 */
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COSTS_N_INSNS (4), /* muldi */
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COSTS_N_INSNS (33), /* divsi */
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COSTS_N_INSNS (33), /* divdi */
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COSTS_N_INSNS (11), /* fp */
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COSTS_N_INSNS (11), /* dmul */
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COSTS_N_INSNS (11), /* sdiv */
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COSTS_N_INSNS (11), /* ddiv */
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};
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/* Instruction costs on PPC405 processors. */
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static const
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struct processor_costs ppc405_cost = {
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5, /* mulsi */
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4, /* mulsi_const */
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3, /* mulsi_const9 */
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5, /* muldi */
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35, /* divsi */
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35, /* divdi */
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11, /* fp */
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11, /* dmul */
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11, /* sdiv */
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11, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (3), /* mulsi_const9 */
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COSTS_N_INSNS (5), /* muldi */
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COSTS_N_INSNS (35), /* divsi */
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COSTS_N_INSNS (35), /* divdi */
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COSTS_N_INSNS (11), /* fp */
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COSTS_N_INSNS (11), /* dmul */
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COSTS_N_INSNS (11), /* sdiv */
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COSTS_N_INSNS (11), /* ddiv */
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};
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/* Instruction costs on PPC440 processors. */
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static const
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struct processor_costs ppc440_cost = {
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3, /* mulsi */
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2, /* mulsi_const */
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2, /* mulsi_const9 */
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3, /* muldi */
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34, /* divsi */
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34, /* divdi */
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5, /* fp */
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5, /* dmul */
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19, /* sdiv */
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33, /* ddiv */
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COSTS_N_INSNS (3), /* mulsi */
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COSTS_N_INSNS (2), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (3), /* muldi */
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COSTS_N_INSNS (34), /* divsi */
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COSTS_N_INSNS (34), /* divdi */
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COSTS_N_INSNS (5), /* fp */
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COSTS_N_INSNS (5), /* dmul */
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COSTS_N_INSNS (19), /* sdiv */
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COSTS_N_INSNS (33), /* ddiv */
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};
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/* Instruction costs on PPC601 processors. */
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static const
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struct processor_costs ppc601_cost = {
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5, /* mulsi */
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5, /* mulsi_const */
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5, /* mulsi_const9 */
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5, /* muldi */
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36, /* divsi */
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36, /* divdi */
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4, /* fp */
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5, /* dmul */
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17, /* sdiv */
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31, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (5), /* mulsi_const */
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COSTS_N_INSNS (5), /* mulsi_const9 */
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COSTS_N_INSNS (5), /* muldi */
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COSTS_N_INSNS (36), /* divsi */
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COSTS_N_INSNS (36), /* divdi */
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COSTS_N_INSNS (4), /* fp */
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COSTS_N_INSNS (5), /* dmul */
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COSTS_N_INSNS (17), /* sdiv */
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COSTS_N_INSNS (31), /* ddiv */
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};
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/* Instruction costs on PPC603 processors. */
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static const
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struct processor_costs ppc603_cost = {
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5, /* mulsi */
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3, /* mulsi_const */
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2, /* mulsi_const9 */
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5, /* muldi */
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37, /* divsi */
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37, /* divdi */
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3, /* fp */
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4, /* dmul */
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18, /* sdiv */
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33, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (3), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (5), /* muldi */
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COSTS_N_INSNS (37), /* divsi */
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COSTS_N_INSNS (37), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (4), /* dmul */
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COSTS_N_INSNS (18), /* sdiv */
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COSTS_N_INSNS (33), /* ddiv */
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};
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/* Instruction costs on PPC604 processors. */
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static const
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struct processor_costs ppc604_cost = {
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4, /* mulsi */
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4, /* mulsi_const */
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4, /* mulsi_const9 */
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4, /* muldi */
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20, /* divsi */
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20, /* divdi */
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3, /* fp */
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3, /* dmul */
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18, /* sdiv */
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32, /* ddiv */
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COSTS_N_INSNS (4), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (4), /* mulsi_const9 */
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COSTS_N_INSNS (4), /* muldi */
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COSTS_N_INSNS (20), /* divsi */
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COSTS_N_INSNS (20), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (3), /* dmul */
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COSTS_N_INSNS (18), /* sdiv */
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COSTS_N_INSNS (32), /* ddiv */
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};
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/* Instruction costs on PPC604e processors. */
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static const
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struct processor_costs ppc604e_cost = {
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2, /* mulsi */
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2, /* mulsi_const */
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2, /* mulsi_const9 */
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2, /* muldi */
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20, /* divsi */
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20, /* divdi */
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3, /* fp */
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3, /* dmul */
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18, /* sdiv */
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32, /* ddiv */
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COSTS_N_INSNS (2), /* mulsi */
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COSTS_N_INSNS (2), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (2), /* muldi */
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COSTS_N_INSNS (20), /* divsi */
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COSTS_N_INSNS (20), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (3), /* dmul */
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COSTS_N_INSNS (18), /* sdiv */
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COSTS_N_INSNS (32), /* ddiv */
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};
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/* Instruction costs on PPC620 processors. */
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static const
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struct processor_costs ppc620_cost = {
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5, /* mulsi */
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4, /* mulsi_const */
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3, /* mulsi_const9 */
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7, /* muldi */
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21, /* divsi */
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37, /* divdi */
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3, /* fp */
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3, /* dmul */
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18, /* sdiv */
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32, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (3), /* mulsi_const9 */
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COSTS_N_INSNS (7), /* muldi */
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COSTS_N_INSNS (21), /* divsi */
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COSTS_N_INSNS (37), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (3), /* dmul */
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COSTS_N_INSNS (18), /* sdiv */
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COSTS_N_INSNS (32), /* ddiv */
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};
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/* Instruction costs on PPC630 processors. */
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static const
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struct processor_costs ppc630_cost = {
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5, /* mulsi */
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4, /* mulsi_const */
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3, /* mulsi_const9 */
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7, /* muldi */
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21, /* divsi */
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37, /* divdi */
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3, /* fp */
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3, /* dmul */
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17, /* sdiv */
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21, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (4), /* mulsi_const */
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COSTS_N_INSNS (3), /* mulsi_const9 */
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COSTS_N_INSNS (7), /* muldi */
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COSTS_N_INSNS (21), /* divsi */
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COSTS_N_INSNS (37), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (3), /* dmul */
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COSTS_N_INSNS (17), /* sdiv */
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COSTS_N_INSNS (21), /* ddiv */
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};
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/* Instruction costs on PPC750 and PPC7400 processors. */
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static const
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struct processor_costs ppc750_cost = {
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5, /* mulsi */
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3, /* mulsi_const */
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2, /* mulsi_const9 */
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5, /* muldi */
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17, /* divsi */
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17, /* divdi */
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3, /* fp */
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3, /* dmul */
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17, /* sdiv */
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31, /* ddiv */
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COSTS_N_INSNS (5), /* mulsi */
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COSTS_N_INSNS (3), /* mulsi_const */
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COSTS_N_INSNS (2), /* mulsi_const9 */
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COSTS_N_INSNS (5), /* muldi */
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COSTS_N_INSNS (17), /* divsi */
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COSTS_N_INSNS (17), /* divdi */
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COSTS_N_INSNS (3), /* fp */
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COSTS_N_INSNS (3), /* dmul */
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COSTS_N_INSNS (17), /* sdiv */
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COSTS_N_INSNS (31), /* ddiv */
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};
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/* Instruction costs on PPC7450 processors. */
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static const
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struct processor_costs ppc7450_cost = {
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4, /* mulsi */
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3, /* mulsi_const */
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3, /* mulsi_const9 */
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4, /* muldi */
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23, /* divsi */
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23, /* divdi */
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5, /* fp */
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5, /* dmul */
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21, /* sdiv */
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||||
35, /* ddiv */
|
||||
COSTS_N_INSNS (4), /* mulsi */
|
||||
COSTS_N_INSNS (3), /* mulsi_const */
|
||||
COSTS_N_INSNS (3), /* mulsi_const9 */
|
||||
COSTS_N_INSNS (4), /* muldi */
|
||||
COSTS_N_INSNS (23), /* divsi */
|
||||
COSTS_N_INSNS (23), /* divdi */
|
||||
COSTS_N_INSNS (5), /* fp */
|
||||
COSTS_N_INSNS (5), /* dmul */
|
||||
COSTS_N_INSNS (21), /* sdiv */
|
||||
COSTS_N_INSNS (35), /* ddiv */
|
||||
};
|
||||
|
||||
/* Instruction costs on PPC8540 processors. */
|
||||
static const
|
||||
struct processor_costs ppc8540_cost = {
|
||||
4, /* mulsi */
|
||||
4, /* mulsi_const */
|
||||
4, /* mulsi_const9 */
|
||||
4, /* muldi */
|
||||
19, /* divsi */
|
||||
19, /* divdi */
|
||||
4, /* fp */
|
||||
4, /* dmul */
|
||||
29, /* sdiv */
|
||||
29, /* ddiv */
|
||||
COSTS_N_INSNS (4), /* mulsi */
|
||||
COSTS_N_INSNS (4), /* mulsi_const */
|
||||
COSTS_N_INSNS (4), /* mulsi_const9 */
|
||||
COSTS_N_INSNS (4), /* muldi */
|
||||
COSTS_N_INSNS (19), /* divsi */
|
||||
COSTS_N_INSNS (19), /* divdi */
|
||||
COSTS_N_INSNS (4), /* fp */
|
||||
COSTS_N_INSNS (4), /* dmul */
|
||||
COSTS_N_INSNS (29), /* sdiv */
|
||||
COSTS_N_INSNS (29), /* ddiv */
|
||||
};
|
||||
|
||||
/* Instruction costs on POWER4 and POWER5 processors. */
|
||||
static const
|
||||
struct processor_costs power4_cost = {
|
||||
3, /* mulsi */
|
||||
2, /* mulsi_const */
|
||||
2, /* mulsi_const9 */
|
||||
4, /* muldi */
|
||||
18, /* divsi */
|
||||
34, /* divdi */
|
||||
3, /* fp */
|
||||
3, /* dmul */
|
||||
17, /* sdiv */
|
||||
17, /* ddiv */
|
||||
COSTS_N_INSNS (3), /* mulsi */
|
||||
COSTS_N_INSNS (2), /* mulsi_const */
|
||||
COSTS_N_INSNS (2), /* mulsi_const9 */
|
||||
COSTS_N_INSNS (4), /* muldi */
|
||||
COSTS_N_INSNS (18), /* divsi */
|
||||
COSTS_N_INSNS (34), /* divdi */
|
||||
COSTS_N_INSNS (3), /* fp */
|
||||
COSTS_N_INSNS (3), /* dmul */
|
||||
COSTS_N_INSNS (17), /* sdiv */
|
||||
COSTS_N_INSNS (17), /* ddiv */
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -16531,10 +16531,10 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
case PLUS:
|
||||
if (mode == DFmode)
|
||||
*total = GET_CODE (XEXP (x, 0)) == MULT
|
||||
? COSTS_N_INSNS (rs6000_cost->dmul)
|
||||
: COSTS_N_INSNS (rs6000_cost->fp);
|
||||
? rs6000_cost->dmul
|
||||
: rs6000_cost->fp;
|
||||
else if (mode == SFmode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->fp);
|
||||
*total = rs6000_cost->fp;
|
||||
else
|
||||
*total = ((GET_CODE (XEXP (x, 1)) == CONST_INT
|
||||
&& ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1))
|
||||
|
|
@ -16547,10 +16547,10 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
case MINUS:
|
||||
if (mode == DFmode)
|
||||
*total = GET_CODE (XEXP (x, 0)) == MULT
|
||||
? COSTS_N_INSNS (rs6000_cost->dmul)
|
||||
: COSTS_N_INSNS (rs6000_cost->fp);
|
||||
? rs6000_cost->dmul
|
||||
: rs6000_cost->fp;
|
||||
else if (mode == SFmode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->fp);
|
||||
*total = rs6000_cost->fp;
|
||||
else
|
||||
*total = COSTS_N_INSNS (1);
|
||||
return true;
|
||||
|
|
@ -16570,26 +16570,26 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
{
|
||||
if (INTVAL (XEXP (x, 1)) >= -256
|
||||
&& INTVAL (XEXP (x, 1)) <= 255)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->mulsi_const9);
|
||||
*total = rs6000_cost->mulsi_const9;
|
||||
else
|
||||
*total = COSTS_N_INSNS (rs6000_cost->mulsi_const);
|
||||
*total = rs6000_cost->mulsi_const;
|
||||
}
|
||||
else if (mode == DFmode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->dmul);
|
||||
*total = rs6000_cost->dmul;
|
||||
else if (mode == SFmode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->fp);
|
||||
*total = rs6000_cost->fp;
|
||||
else if (mode == DImode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->muldi);
|
||||
*total = rs6000_cost->muldi;
|
||||
else
|
||||
*total = COSTS_N_INSNS (rs6000_cost->mulsi);
|
||||
*total = rs6000_cost->mulsi;
|
||||
return true;
|
||||
|
||||
case DIV:
|
||||
case MOD:
|
||||
if (FLOAT_MODE_P (mode))
|
||||
{
|
||||
*total = mode == DFmode ? COSTS_N_INSNS (rs6000_cost->ddiv)
|
||||
: COSTS_N_INSNS (rs6000_cost->sdiv);
|
||||
*total = mode == DFmode ? rs6000_cost->ddiv
|
||||
: rs6000_cost->sdiv;
|
||||
return true;
|
||||
}
|
||||
if (GET_CODE (XEXP (x, 1)) == CONST_INT
|
||||
|
|
@ -16603,9 +16603,9 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
case UDIV:
|
||||
case UMOD:
|
||||
if (GET_MODE (XEXP (x, 1)) == DImode)
|
||||
*total = COSTS_N_INSNS (rs6000_cost->divdi);
|
||||
*total = rs6000_cost->divdi;
|
||||
else
|
||||
*total = COSTS_N_INSNS (rs6000_cost->divsi);
|
||||
*total = rs6000_cost->divsi;
|
||||
return true;
|
||||
|
||||
case FFS:
|
||||
|
|
@ -16615,7 +16615,7 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
case NEG:
|
||||
case ABS:
|
||||
if (FLOAT_MODE_P (mode))
|
||||
*total = COSTS_N_INSNS (rs6000_cost->fp);
|
||||
*total = rs6000_cost->fp;
|
||||
else
|
||||
*total = COSTS_N_INSNS (1);
|
||||
return true;
|
||||
|
|
@ -16625,9 +16625,43 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
|
|||
*total = COSTS_N_INSNS (1) + 1;
|
||||
return true;
|
||||
|
||||
case NOT:
|
||||
case SIGN_EXTEND:
|
||||
case ZERO_EXTEND:
|
||||
case COMPARE:
|
||||
*total = COSTS_N_INSNS (1);
|
||||
break;
|
||||
|
||||
case FLOAT_TRUNCATE:
|
||||
*total = rs6000_cost->fp;
|
||||
return true;
|
||||
|
||||
case UNSPEC:
|
||||
switch (XINT (x, 1))
|
||||
{
|
||||
case UNSPEC_FRSP:
|
||||
*total = rs6000_cost->fp;
|
||||
return true;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case CALL:
|
||||
case IF_THEN_ELSE:
|
||||
if (optimize_size)
|
||||
{
|
||||
*total = COSTS_N_INSNS (1);
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
return false;
|
||||
break;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/* A C expression returning the cost of moving data from a register of class
|
||||
|
|
|
|||
Loading…
Reference in New Issue