parent
667f675947
commit
06c386eacf
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@ -1365,7 +1365,7 @@ output_file_start (file, f_options, f_len, W_options, W_len)
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data_section ();
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pos = fprintf (file, "\n! Hitachi SH cc1 (%s) (release E-2) arguments:", version_string);
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pos = fprintf (file, "\n! Hitachi SH cc1 (%s) (release H-1) arguments:", version_string);
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output_options (file, f_options, f_len, W_options, W_len,
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pos, 75, " ", "\n! ", "\n\n");
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}
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@ -1748,18 +1748,16 @@ hi_const (src)
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/* Find the last barrier less than MAX_COUNT bytes from FROM, or create one.
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If an HI move is found, then make sure that MAX_COUNT_HI isn't broken from that one. */
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static rtx from;
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static
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rtx
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find_barrier (from_)
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rtx from_;
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find_barrier (from)
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rtx from;
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{
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int count_si = 0;
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int count_hi = 0;
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int found_hi = 0;
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int found_si = 0;
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rtx found_barrier = 0;
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from = from_;
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while (from
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&& count_si < max_count_si
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&& count_hi < max_count_hi)
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@ -1769,8 +1767,8 @@ from = from_;
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{
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found_barrier = from;
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}
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/* Count the length of this insn - we assume that all the pcrelloads
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will work out to be only 2 bytes long */
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/* Count the length of this insn - we assume that all moves will
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be 2 bytes long, except the DIs */
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if (GET_CODE (from) == INSN &&
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GET_CODE (PATTERN (from)) == SET)
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@ -1780,7 +1778,7 @@ from = from_;
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found_hi = 1;
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else
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found_si = 1;
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inc = 2;
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inc = (GET_MODE_SIZE (GET_MODE (src)) > 4) ? 4 : 2;
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}
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else
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{
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@ -2128,12 +2126,12 @@ handle_pragma (file)
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if (psize == 9 && strncmp (pbuf, "interrupt", 9) == 0)
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{
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pragma_interrupt = 1;
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return c;
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return ' ';
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}
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if (psize == 5 && strncmp (pbuf, "trapa", 5) == 0)
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{
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pragma_interrupt = pragma_trapa = 1;
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return c;
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return ' ';
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}
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c = getc (file);
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}
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@ -2206,23 +2204,35 @@ general_movsrc_operand (op, mode)
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enum machine_mode mode;
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{
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/* Any MEM(label_ref) is ok, that's a pcrel load */
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if (GET_CODE (op) == MEM &&
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GET_CODE (XEXP (op, 0)) == LABEL_REF)
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xo if (GET_CODE (op) == MEM
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&& GET_CODE (XEXP (op, 0)) == LABEL_REF)
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return 1;
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if (GET_CODE (op) == MEM)
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{
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rtx inside = XEXP (op, 0);
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if (GET_CODE (inside) == CONST)
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inside = XEXP (inside, 0);
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if (GET_CODE (inside) == LABEL_REF)
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return 1;
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if (GET_CODE (inside) == PLUS
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&& GET_CODE (XEXP (inside,0)) == LABEL_REF
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&& GET_CODE (XEXP (inside,1)) == CONST_INT)
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return 1;
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/* No post inc allowed */
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if (GET_CODE (op) == MEM
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&& (GET_CODE (XEXP (op, 0)) == POST_DEC
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|| GET_CODE (XEXP (op, 0)) == PRE_INC
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|| GET_CODE (XEXP (op, 0)) == PRE_DEC))
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if (GET_CODE (inside) == POST_DEC
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|| GET_CODE (inside) == PRE_INC
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|| GET_CODE (inside) == PRE_DEC)
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return 0;
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/* Can't do that with large modes */
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if (GET_CODE (op) == MEM
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&& GET_CODE (XEXP (op, 0)) == POST_INC
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if (GET_CODE (inside) == POST_INC
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&& GET_MODE_SIZE (mode) > 4)
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return 0;
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}
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if ((mode == QImode || mode == HImode)
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&& (GET_CODE (op) == SUBREG
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@ -2438,12 +2448,12 @@ sh_function_arg (cum, mode, type, named)
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if (rr < NPARM_REGS)
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{
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return ((((mode) != BLKmode
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&& ((type) == 0 || !TREE_ADDRESSABLE ((tree) (type)))
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return (((type) == 0 || !TREE_ADDRESSABLE ((tree) (type)))
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&& ((type) == 0 || (mode) != BLKmode
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|| (TYPE_ALIGN ((type)) % PARM_BOUNDARY == 0))
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? gen_rtx (REG, (mode),
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(FIRST_PARM_REG + rr)) : 0)));
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(FIRST_PARM_REG + rr))
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: 0);
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}
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}
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@ -2466,8 +2476,7 @@ sh_function_arg_partial_nregs (CUM, MODE, TYPE, NAMED)
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if ((CUM) < NPARM_REGS)
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{
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if (((TYPE) == 0 || !TREE_ADDRESSABLE ((tree) (TYPE)))
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&& ((TYPE) == 0 || (MODE) != BLKmode
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|| (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0))
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&& ((TYPE) == 0 || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0))
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&& ((CUM) + ((MODE) == BLKmode
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? ROUND_ADVANCE (int_size_in_bytes (TYPE))
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: ROUND_ADVANCE (GET_MODE_SIZE (MODE))) - NPARM_REGS > 0))
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@ -31,6 +31,15 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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#define SDB_DEBUGGING_INFO 1
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/* CYGNUS LOCAL stabs-in-coff */
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/* Output DBX (stabs) debugging information if doing -gstabs. */
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#define DBX_DEBUGGING_INFO
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/* Generate SDB debugging information by default. */
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#define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
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#define SDB_DELIM ";"
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#define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)"
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@ -179,7 +188,7 @@ extern int target_flags;
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{"", TARGET_DEFAULT} \
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}
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#define TARGET_DEFAULT (FAST_BIT | BIGTABLE_BIT)
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#define TARGET_DEFAULT (FAST_BIT)
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/* Macro to define table for command options with values. */
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#define TARGET_OPTIONS \
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@ -919,7 +928,12 @@ extern int current_function_anonymous_args;
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/* The Q is a pc relative load operand */
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#define EXTRA_CONSTRAINT_Q(OP) \
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(GET_CODE (OP) == MEM && GET_CODE (XEXP (OP,0)) == LABEL_REF)
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(GET_CODE (OP) == MEM && \
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((GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
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|| (GET_CODE (XEXP (OP, 0)) == CONST \
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&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
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&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == LABEL_REF \
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&& GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT)))
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/* The U is a label ref */
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#define EXTRA_CONSTRAINT_U(OP) \
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@ -1045,7 +1059,7 @@ extern int current_function_anonymous_args;
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/* Define this if the tablejump instruction expects the table
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to contain offsets from the address of the table.
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Do not define this if the table should contain absolute addresses. */
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/*#define CASE_VECTOR_PC_RELATIVE */
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#define CASE_VECTOR_PC_RELATIVE
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/* Specify the tree operation to be used to convert reals to integers. */
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#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
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#define TEXT_SECTION_ASM_OP "\t.text"
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#define DATA_SECTION_ASM_OP "\t.data"
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#define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rdata\n"
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#define CTORS_SECTION_ASM_OP "\t.section\t.ctors\n"
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#define DTORS_SECTION_ASM_OP "\t.section\t.dtors\n"
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#define INIT_SECTION_ASM_OP "\t.section\t.init\n"
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#define EXTRA_SECTIONS in_ctors, in_dtors, in_rdata
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#define READONLY_DATA_SECTION rdata_section
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#define EXTRA_SECTIONS in_ctors, in_dtors
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#define EXTRA_SECTION_FUNCTIONS \
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void \
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ctors_section() \
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fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
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in_section = in_dtors; \
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} \
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} \
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void \
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rdata_section() \
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{ \
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if (in_section != in_rdata) \
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{ \
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fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
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in_section = in_rdata; \
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} \
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}
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/* Assemble generic sections.
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@ -1119,7 +1119,8 @@
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&& REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER)
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&& ! (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG
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&& ! reload_completed
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&& reg_overlap_mentioned_p (operands[0], operands[1]))"
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&& reg_overlap_mentioned_p (operands[0], operands[1]))
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&& ! EXTRA_CONSTRAINT_Q (operands[1])"
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[(set (match_dup 2) (match_dup 3))
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(set (match_dup 4) (match_dup 5))]
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"
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(const_int 1))
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(label_ref (match_operand 4 "" ""))
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(pc)))
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(parallel[(set (match_dup 5) (ashift:SI (match_dup 5) (const_int 2)))
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(clobber (reg:SI 18))])
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(set (match_dup 6) (plus:SI (match_dup 5) (match_dup 5)))
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(set (reg:SI 0) (label_ref (match_operand 3 "" "")))
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(set (reg:SI 0) (mem:SI (plus:SI (reg:SI 0) (match_dup 5))))
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;; (parallel[(set (reg:SI 0) (plus:SI (reg:SI 0)
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;; (mem:HI (plus:SI (reg:SI 0)
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;; (match_dup 5)))))
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;; (set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
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(parallel[(set (reg:SI 0) (plus:SI (reg:SI 0)
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(mem:HI (plus:SI (reg:SI 0)
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(match_dup 6)))))
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(set (match_dup 6) (mem:HI (plus:SI (reg:SI 0) (match_dup 6))))])
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(set (pc) (reg:SI 0))]
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""
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"
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operands[1] = copy_to_mode_reg (SImode, operands[1]);
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operands[2] = copy_to_mode_reg (SImode, operands[2]);
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operands[5] = gen_reg_rtx (SImode);
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operands[6] = gen_reg_rtx (SImode);
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}")
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(define_insn "casesi_worker"
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