* config/pdp11/pdp11.h (target_flags, TARGET_SWITCHES, TARGET_DEFAULT)
(TARGET_FPU, TARGET_SOFT_FLOAT, TARGET_AC0, TARGET_NO_AC0, TARGET_45) (TARGET_BCOPY_BUILTIN, TARGET_INT16, TARGET_INT32, TARGET_FLOAT32) (TARGET_FLOAT64, TARGET_ABSHI_BUILTIN, TARGET_BRANCH_EXPENSIVE) (TARGET_BRANCH_CHEAP, TARGET_SPLIT, TARGET_NOSPLIT) (TARGET_UNIX_ASM): Delete. (TARGET_40_PLUS): Redefine in terms of TARGET_40 and TARGET_45. * config/pdp11/2bsd.h (TARGET_UNIX_ASM_DEFAULT): Use MASK_UNIX_ASM. * config/pdp11/pdp11.c (pdp11_handle_option): New function. (TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults. * config/pdp11/pdp11.opt: New file. From-SVN: r97525
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
283da5df2d
commit
06ed4795b4
@ -1,3 +1,17 @@
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2005-04-04 Richard Sandiford <rsandifo@redhat.com>
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* config/pdp11/pdp11.h (target_flags, TARGET_SWITCHES, TARGET_DEFAULT)
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(TARGET_FPU, TARGET_SOFT_FLOAT, TARGET_AC0, TARGET_NO_AC0, TARGET_45)
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(TARGET_BCOPY_BUILTIN, TARGET_INT16, TARGET_INT32, TARGET_FLOAT32)
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(TARGET_FLOAT64, TARGET_ABSHI_BUILTIN, TARGET_BRANCH_EXPENSIVE)
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(TARGET_BRANCH_CHEAP, TARGET_SPLIT, TARGET_NOSPLIT)
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(TARGET_UNIX_ASM): Delete.
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(TARGET_40_PLUS): Redefine in terms of TARGET_40 and TARGET_45.
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* config/pdp11/2bsd.h (TARGET_UNIX_ASM_DEFAULT): Use MASK_UNIX_ASM.
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* config/pdp11/pdp11.c (pdp11_handle_option): New function.
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(TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults.
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* config/pdp11/pdp11.opt: New file.
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2005-04-03 Roger Sayle <roger@eyesopen.com>
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Alexandre Oliva <aoliva@redhat.com>
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@ -63,4 +63,4 @@ fprintf (STREAM, "~~%s:\n", NAME); \
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} while (0)
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#undef TARGET_UNIX_ASM_DEFAULT
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#define TARGET_UNIX_ASM_DEFAULT 2048
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#define TARGET_UNIX_ASM_DEFAULT MASK_UNIX_ASM
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@ -138,6 +138,7 @@ decode_pdp11_d (const struct real_format *fmt ATTRIBUTE_UNUSED,
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/* This is where the condition code register lives. */
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/* rtx cc0_reg_rtx; - no longer needed? */
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static bool pdp11_handle_option (size_t, const char *, int);
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static rtx find_addr_reg (rtx);
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static const char *singlemove_string (rtx *);
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static bool pdp11_assemble_integer (rtx, unsigned int, int);
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@ -166,6 +167,12 @@ static bool pdp11_return_in_memory (tree, tree);
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#undef TARGET_ASM_CLOSE_PAREN
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#define TARGET_ASM_CLOSE_PAREN "]"
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#undef TARGET_DEFAULT_TARGET_FLAGS
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#define TARGET_DEFAULT_TARGET_FLAGS \
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(MASK_FPU | MASK_45 | MASK_ABSHI_BUILTIN | TARGET_UNIX_ASM_DEFAULT)
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#undef TARGET_HANDLE_OPTION
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#define TARGET_HANDLE_OPTION pdp11_handle_option
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#undef TARGET_RTX_COSTS
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#define TARGET_RTX_COSTS pdp11_rtx_costs
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@ -174,6 +181,23 @@ static bool pdp11_return_in_memory (tree, tree);
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struct gcc_target targetm = TARGET_INITIALIZER;
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/* Implement TARGET_HANDLE_OPTION. */
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static bool
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pdp11_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED,
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int value ATTRIBUTE_UNUSED)
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{
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switch (code)
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{
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case OPT_m10:
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target_flags &= ~(MASK_40 | MASK_45);
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return true;
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default:
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return true;
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}
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}
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/* Nonzero if OP is a valid second operand for an arithmetic insn. */
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int
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@ -45,91 +45,9 @@ Boston, MA 02111-1307, USA. */
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/* #define DBX_DEBUGGING_INFO */
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/* Run-time compilation parameters selecting different hardware subsets.
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*/
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extern int target_flags;
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/* Macro to define tables used to set the flags.
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This is a list in braces of triplets in braces,
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each triplet being { "NAME", VALUE, DOC }
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where VALUE is the bits to set or minus the bits to clear and DOC
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is the documentation for --help (NULL if intentionally undocumented).
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An empty string NAME is used to identify the default VALUE. */
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#define TARGET_SWITCHES \
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{ { "fpu", 1, N_("Use hardware floating point") }, \
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{ "soft-float", -1, N_("Do not use hardware floating point") }, \
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/* return float result in ac0 */ \
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{ "ac0", 2, N_("Return floating point results in ac0") }, \
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{ "no-ac0", -2, N_("Return floating point results in memory") }, \
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/* is 11/40 */ \
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{ "40", 4, N_("Generate code for an 11/40") }, \
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{ "no-40", -4, "" }, \
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/* is 11/45 */ \
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{ "45", 8, N_("Generate code for an 11/45") }, \
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{ "no-45", -8, "" }, \
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/* is 11/10 */ \
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{ "10", -12, N_("Generate code for an 11/10") }, \
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/* use movmemhi for bcopy */ \
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{ "bcopy", 16, NULL }, \
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{ "bcopy-builtin", -16, NULL }, \
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/* use 32 bit for int */ \
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{ "int32", 32, N_("Use 32 bit int") }, \
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{ "no-int16", 32, N_("Use 32 bit int") }, \
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{ "int16", -32, N_("Use 16 bit int") }, \
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{ "no-int32", -32, N_("Use 16 bit int") }, \
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/* use 32 bit for float */ \
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{ "float32", 64, N_("Use 32 bit float") }, \
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{ "no-float64", 64, N_("Use 32 bit float") }, \
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{ "float64", -64, N_("Use 64 bit float") }, \
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{ "no-float32", -64, N_("Use 64 bit float") }, \
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/* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
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{ "abshi", 128, NULL }, \
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{ "no-abshi", -128, NULL }, \
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/* is branching expensive - on a PDP, it's actually really cheap */ \
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/* this is just to play around and check what code gcc generates */ \
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{ "branch-expensive", 256, NULL }, \
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{ "branch-cheap", -256, NULL }, \
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/* split instruction and data memory? */ \
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{ "split", 1024, N_("Target has split I&D") }, \
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{ "no-split", -1024, N_("Target does not have split I&D") }, \
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/* UNIX assembler syntax? */ \
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{ "unix-asm", 2048, N_("Use UNIX assembler syntax") }, \
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{ "dec-asm", -2048, N_("Use DEC assembler syntax") }, \
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/* default */ \
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{ "", TARGET_DEFAULT, NULL} \
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}
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#define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)
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#define TARGET_FPU (target_flags & 1)
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#define TARGET_SOFT_FLOAT (!TARGET_FPU)
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#define TARGET_AC0 ((target_flags & 2) && TARGET_FPU)
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#define TARGET_NO_AC0 (! TARGET_AC0)
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#define TARGET_45 (target_flags & 8)
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#define TARGET_40_PLUS ((target_flags & 4) || (target_flags & 8))
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#define TARGET_40_PLUS (TARGET_40 || TARGET_45)
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#define TARGET_10 (! TARGET_40_PLUS)
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#define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
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#define TARGET_INT16 (! TARGET_INT32)
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#define TARGET_INT32 (target_flags & 32)
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#define TARGET_FLOAT32 (target_flags & 64)
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#define TARGET_FLOAT64 (! TARGET_FLOAT32)
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#define TARGET_ABSHI_BUILTIN (target_flags & 128)
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#define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
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#define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
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#define TARGET_SPLIT (target_flags & 1024)
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#define TARGET_NOSPLIT (! TARGET_SPLIT)
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#define TARGET_UNIX_ASM (target_flags & 2048)
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#define TARGET_UNIX_ASM_DEFAULT 0
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#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
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92
gcc/config/pdp11/pdp11.opt
Normal file
92
gcc/config/pdp11/pdp11.opt
Normal file
@ -0,0 +1,92 @@
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; Options for the PDP11 port of the compiler.
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; Copyright (C) 2005 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 2, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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; WARRANTY; without even the implied warranty of MERCHANTABILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING. If not, write to the Free
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; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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; 02111-1307, USA.
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m10
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Target RejectNegative
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Generate code for an 11/10
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m40
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Target Report Mask(40)
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Generate code for an 11/40
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m45
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Target Report Mask(45)
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Generate code for an 11/45
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mabshi
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Target Report Mask(ABSHI_BUILTIN)
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Use 16-bit abs patterns
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mac0
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Target Report Mask(AC0)
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Return floating-point results in ac0 (fr0 in Unix assembler syntax)
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mbcopy
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Target RejectNegative Report Mask(BCOPY)
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Do not use inline patterns for copying memory
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mbcopy-builtin
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Target RejectNegative Report InverseMask(BCOPY, BCOPY_BUILTIN)
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Use inline patterns for copying memory
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mbranch-cheap
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Target RejectNegative Report InverseMask(BRANCH_EXPENSIVE, BRANCH_CHEAP)
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Do not pretend that branches are expensive
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mbranch-expensive
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Target RejectNegative Report Mask(BRANCH_EXPENSIVE)
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Pretend that branches are expensive
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mdec-asm
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Target RejectNegative Report InverseMask(UNIX_ASM)
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Use the DEC assembler syntax
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mfloat32
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Target Report Mask(FLOAT32)
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Use 32 bit float
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mfloat64
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Target Report InverseMask(FLOAT32, FLOAT64)
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Use 64 bit float
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mfpu
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Target RejectNegative Report Mask(FPU)
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Use hardware floating point
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mint16
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Target Report InverseMask(INT32, INT16)
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Use 16 bit int
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mint32
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Target Report Mask(INT32)
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Use 32 bit int
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msoft-float
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Target RejectNegative Report InverseMask(FPU, SOFT_FLOAT)
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Do not use hardware floating point
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msplit
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Target Report Mask(SPLIT)
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Target has split I&D
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munix-asm
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Target RejectNegative Report Mask(UNIX_ASM)
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Use UNIX assembler syntax
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