[PATCH 4/4] Add CCMP selection based on rtx costs
2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
Jiong Wang <jiong.wang@arm.com>
gcc/
* ccmp.c (expand_ccmp_expr_1): Cost the instruction sequences
generated from different expand order.
gcc/testsuite/
* gcc.target/aarch64/ccmp_1.c: Add new tests.
Co-Authored-By: Jiong Wang <jiong.wang@arm.com>
From-SVN: r232565
This commit is contained in:
Wilco Dijkstra
Jiong Wang
parent
786298dc13
commit
078fe40a48
@ -1,4 +1,10 @@
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2016-01-19 Wilco Dijkstra <wdijkstr@arm.com>
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2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
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Jiong Wang <jiong.wang@arm.com>
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* ccmp.c (expand_ccmp_expr_1): Cost the instruction sequences
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generated from different expand order.
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2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
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* /config/aarch64/aarch64.c (aarch64_if_then_else_costs):
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Add support for CCMP costing.
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65
gcc/ccmp.c
65
gcc/ccmp.c
@ -35,6 +35,7 @@ along with GCC; see the file COPYING3. If not see
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#include "tree-outof-ssa.h"
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#include "cfgexpand.h"
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#include "ccmp.h"
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#include "predict.h"
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/* The following functions expand conditional compare (CCMP) instructions.
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Here is a short description about the over all algorithm:
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@ -72,7 +73,7 @@ ccmp_candidate_p (gimple *g)
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tree rhs = gimple_assign_rhs_to_tree (g);
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tree lhs, op0, op1;
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gimple *gs0, *gs1;
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enum tree_code tcode, tcode0, tcode1;
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tree_code tcode, tcode0, tcode1;
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tcode = TREE_CODE (rhs);
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if (tcode != BIT_AND_EXPR && tcode != BIT_IOR_EXPR)
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@ -119,10 +120,10 @@ ccmp_candidate_p (gimple *g)
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PREP_SEQ returns all insns to prepare opearands for compare.
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GEN_SEQ returns all compare insns. */
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static rtx
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expand_ccmp_next (gimple *g, enum tree_code code, rtx prev,
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expand_ccmp_next (gimple *g, tree_code code, rtx prev,
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rtx *prep_seq, rtx *gen_seq)
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{
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enum rtx_code rcode;
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rtx_code rcode;
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int unsignedp = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (g)));
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gcc_assert (code == BIT_AND_EXPR || code == BIT_IOR_EXPR);
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@ -149,13 +150,15 @@ expand_ccmp_next (gimple *g, enum tree_code code, rtx prev,
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static rtx
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expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
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{
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rtx prep_seq_1, gen_seq_1;
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rtx prep_seq_2, gen_seq_2;
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tree exp = gimple_assign_rhs_to_tree (g);
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enum tree_code code = TREE_CODE (exp);
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tree_code code = TREE_CODE (exp);
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gimple *gs0 = get_gimple_for_ssa_name (TREE_OPERAND (exp, 0));
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gimple *gs1 = get_gimple_for_ssa_name (TREE_OPERAND (exp, 1));
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rtx tmp;
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enum tree_code code0 = gimple_assign_rhs_code (gs0);
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enum tree_code code1 = gimple_assign_rhs_code (gs1);
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tree_code code0 = gimple_assign_rhs_code (gs0);
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tree_code code1 = gimple_assign_rhs_code (gs1);
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gcc_assert (code == BIT_AND_EXPR || code == BIT_IOR_EXPR);
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gcc_assert (gs0 && gs1 && is_gimple_assign (gs0) && is_gimple_assign (gs1));
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@ -164,19 +167,53 @@ expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
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{
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if (TREE_CODE_CLASS (code1) == tcc_comparison)
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{
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int unsignedp0;
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enum rtx_code rcode0;
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int unsignedp0, unsignedp1;
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rtx_code rcode0, rcode1;
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int speed_p = optimize_insn_for_speed_p ();
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rtx tmp2, ret, ret2;
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unsigned cost1 = MAX_COST;
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unsigned cost2 = MAX_COST;
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unsignedp0 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs0)));
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unsignedp1 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs1)));
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rcode0 = get_rtx_code (code0, unsignedp0);
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rcode1 = get_rtx_code (code1, unsignedp1);
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tmp = targetm.gen_ccmp_first (prep_seq, gen_seq, rcode0,
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tmp = targetm.gen_ccmp_first (&prep_seq_1, &gen_seq_1, rcode0,
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gimple_assign_rhs1 (gs0),
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gimple_assign_rhs2 (gs0));
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if (!tmp)
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tmp2 = targetm.gen_ccmp_first (&prep_seq_2, &gen_seq_2, rcode1,
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gimple_assign_rhs1 (gs1),
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gimple_assign_rhs2 (gs1));
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if (!tmp && !tmp2)
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return NULL_RTX;
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return expand_ccmp_next (gs1, code, tmp, prep_seq, gen_seq);
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if (tmp != NULL)
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{
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ret = expand_ccmp_next (gs1, code, tmp, &prep_seq_1, &gen_seq_1);
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cost1 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_1), speed_p);
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cost1 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_1), speed_p);
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}
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if (tmp2 != NULL)
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{
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ret2 = expand_ccmp_next (gs0, code, tmp2, &prep_seq_2,
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&gen_seq_2);
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cost2 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_2), speed_p);
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cost2 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_2), speed_p);
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}
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if (cost2 < cost1)
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{
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*prep_seq = prep_seq_2;
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*gen_seq = gen_seq_2;
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return ret2;
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}
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*prep_seq = prep_seq_1;
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*gen_seq = gen_seq_1;
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return ret;
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}
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else
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{
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@ -230,8 +267,8 @@ expand_ccmp_expr (gimple *g)
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if (tmp)
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{
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enum insn_code icode;
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enum machine_mode cc_mode = CCmode;
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insn_code icode;
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machine_mode cc_mode = CCmode;
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tree lhs = gimple_assign_lhs (g);
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rtx_code cmp_code = GET_CODE (tmp);
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@ -241,7 +278,7 @@ expand_ccmp_expr (gimple *g)
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icode = optab_handler (cstore_optab, cc_mode);
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if (icode != CODE_FOR_nothing)
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{
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enum machine_mode mode = TYPE_MODE (TREE_TYPE (lhs));
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machine_mode mode = TYPE_MODE (TREE_TYPE (lhs));
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rtx target = gen_reg_rtx (mode);
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emit_insn (prep_seq);
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@ -1,3 +1,7 @@
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2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
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* gcc.target/aarch64/ccmp_1.c: Add new tests.
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2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
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* gcc.target/aarch64/ccmp_1.c: New testcase.
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@ -80,5 +80,16 @@ f13 (int a, int b)
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return a == 3 || a == 0;
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}
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/* { dg-final { scan-assembler "fccmp\t" } } */
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/* { dg-final { scan-assembler "fccmpe\t" } } */
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/* { dg-final { scan-assembler "cmp\t(.)+32" } } */
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/* { dg-final { scan-assembler "cmp\t(.)+33" } } */
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/* { dg-final { scan-assembler "cmp\t(.)+34" } } */
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/* { dg-final { scan-assembler "cmp\t(.)+35" } } */
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/* { dg-final { scan-assembler-times "\tcmp\tw\[0-9\]+, 0" 4 } } */
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/* { dg-final { scan-assembler-times "fcmpe\t(.)+0\\.0" 2 } } */
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/* { dg-final { scan-assembler-times "fcmp\t(.)+0\\.0" 2 } } */
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/* { dg-final { scan-assembler "adds\t" } } */
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/* { dg-final { scan-assembler-times "\tccmp\t" 11 } } */
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/* { dg-final { scan-assembler-times "fccmp\t.*0\\.0" 1 } } */
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/* { dg-final { scan-assembler-times "fccmpe\t.*0\\.0" 1 } } */
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