arm.c (thumb_base_register_rtx_p): Don't allow virtual registers as base registers for sub-word operations.
* arm.c (thumb_base_register_rtx_p): Don't allow virtual registers as base registers for sub-word operations. (thumb_legitimate_address_p): Simplify REG+REG test. From-SVN: r74739
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@ -1,3 +1,9 @@
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2003-12-17 Richard Earnshaw <rearnsha@arm.com>
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* arm.c (thumb_base_register_rtx_p): Don't allow virtual registers
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as base registers for sub-word operations.
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(thumb_legitimate_address_p): Simplify REG+REG test.
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2003-12-17 Segher Boessenkool <boessen@de.ibm.com>
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* opts.c (wrap_help): Fix overflow.
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@ -2868,7 +2868,7 @@ arm_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p)
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&& INTVAL (index) > -range);
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}
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/* Return nonzero if X is valid as an ARM state addressing register. */
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/* Return nonzero if X is valid as an Thumb state base register. */
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static int
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thumb_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p)
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{
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@ -2883,10 +2883,11 @@ thumb_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p)
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return THUMB_REGNO_MODE_OK_FOR_BASE_P (regno, mode);
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return (regno <= LAST_LO_REGNUM
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|| regno >= FIRST_PSEUDO_REGISTER
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|| regno > LAST_VIRTUAL_REGISTER
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|| regno == FRAME_POINTER_REGNUM
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|| (GET_MODE_SIZE (mode) >= 4
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&& (regno == STACK_POINTER_REGNUM
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|| x >= FIRST_PSEUDO_REGISTER
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|| x == hard_frame_pointer_rtx
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|| x == arg_pointer_rtx)));
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}
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@ -2963,8 +2964,6 @@ thumb_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p)
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if (GET_MODE_SIZE (mode) <= 4
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&& XEXP (x, 0) != frame_pointer_rtx
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&& XEXP (x, 1) != frame_pointer_rtx
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&& XEXP (x, 0) != virtual_stack_vars_rtx
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&& XEXP (x, 1) != virtual_stack_vars_rtx
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&& thumb_index_register_rtx_p (XEXP (x, 0), strict_p)
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&& thumb_index_register_rtx_p (XEXP (x, 1), strict_p))
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return 1;
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