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re PR target/41081 (redundant ZERO_EXTENDs)

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PR target/41081
	* config/rs6000/rs6000.md (rotlsi3_64, ashlsi3_64, lshrsi3_64,
	ashrsi3_64): New.

From-SVN: r151025
This commit is contained in:
Alan Modra 2009-08-23 03:53:02 +00:00 committed by Alan Modra
parent 8234e5e0e2
commit 0aa580f4d2
2 changed files with 50 additions and 0 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2009-08-23 Alan Modra <amodra@bigpond.net.au>
PR target/41081
* config/rs6000/rs6000.md (rotlsi3_64, ashlsi3_64, lshrsi3_64,
ashrsi3_64): New.
2009-08-23 Alan Modra <amodra@bigpond.net.au>
PR target/41081

44
gcc/config/rs6000/rs6000.md
View File

@ -4367,6 +4367,17 @@
{rlinm|rlwinm} %0,%1,%h2,0xffffffff"
[(set_attr "type" "var_shift_rotate,integer")])
(define_insn "*rotlsi3_64"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(zero_extend:DI
(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,i"))))]
"TARGET_64BIT"
"@
{rlnm|rlwnm} %0,%1,%2,0xffffffff
{rlinm|rlwinm} %0,%1,%h2,0xffffffff"
[(set_attr "type" "var_shift_rotate,integer")])
(define_insn "*rotlsi3_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")
(compare:CC (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")
@ -4711,6 +4722,17 @@
{sli|slwi} %0,%1,%h2"
[(set_attr "type" "var_shift_rotate,shift")])
(define_insn "*ashlsi3_64"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(zero_extend:DI
(ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,i"))))]
"TARGET_POWERPC64"
"@
{sl|slw} %0,%1,%2
{sli|slwi} %0,%1,%h2"
[(set_attr "type" "var_shift_rotate,shift")])
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")
(compare:CC (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")
@ -4948,6 +4970,17 @@
{sri|srwi} %0,%1,%h2"
[(set_attr "type" "integer,var_shift_rotate,shift")])
(define_insn "*lshrsi3_64"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(zero_extend:DI
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,i"))))]
"TARGET_POWERPC64"
"@
{sr|srw} %0,%1,%2
{sri|srwi} %0,%1,%h2"
[(set_attr "type" "var_shift_rotate,shift")])
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,?y,?y,?y")
(compare:CC (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r,r,r")
@ -5376,6 +5409,17 @@
{srai|srawi} %0,%1,%h2"
[(set_attr "type" "var_shift_rotate,shift")])
(define_insn "*ashrsi3_64"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(sign_extend:DI
(ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,i"))))]
"TARGET_POWERPC64"
"@
{sra|sraw} %0,%1,%2
{srai|srawi} %0,%1,%h2"
[(set_attr "type" "var_shift_rotate,shift")])
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,?y,?y")
(compare:CC (ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r,r,r,r")