From 0b47e4c1cdabbb5e7bce3c0358fd82595be2fc60 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Mon, 9 Jul 2001 13:42:28 -0600 Subject: [PATCH] Makefile.in (OBJS): Add ssa-ccp.o * Makefile.in (OBJS): Add ssa-ccp.o (ssa-ccp.o): Add dependencies. * toplev.c (DFI_ssa_ccp): New dump file enum. (dump_file): Add entry for dumping after SSA CCP. (flag_ssa_ccp): New flag variable. (f_options): Add -fssa-ccp. (rest_of_compilation): Run SSA CCP if requested. * timevar.def (TV_SSA_CCP): New timevar. * ssa.c (mark_phi_and_copy_regs): Handle deleted PHI nodes. * doc/gcc.texi (Passes): Add documentation for SSA CCP pass. Fix minor typo in SSA DCE documentation. * doc/invoke.texi: Add documentation for new flag -fssa-ccp. Add documentation for new dump option. Renumber dump files appropriately. * po/POTFILES.in: Add ssa-ccp.c From-SVN: r43872 --- gcc/ChangeLog | 22 +++++++++++++++++ gcc/Makefile.in | 15 +++++++----- gcc/doc/gcc.texi | 19 ++++++++++++++- gcc/doc/invoke.texi | 59 ++++++++++++++++++++++++--------------------- gcc/po/ChangeLog | 4 +++ gcc/po/POTFILES.in | 1 + gcc/ssa.c | 4 ++- gcc/timevar.def | 1 + gcc/toplev.c | 27 +++++++++++++++++++-- 9 files changed, 115 insertions(+), 37 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3dbc4517763..b7b60912c84 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +Mon Jul 9 13:26:40 2001 Jeffrey A Law (law@cygnus.com) + + * Makefile.in (OBJS): Add ssa-ccp.o + (ssa-ccp.o): Add dependencies. + * toplev.c (DFI_ssa_ccp): New dump file enum. + (dump_file): Add entry for dumping after SSA CCP. + (flag_ssa_ccp): New flag variable. + (f_options): Add -fssa-ccp. + (rest_of_compilation): Run SSA CCP if requested. + * timevar.def (TV_SSA_CCP): New timevar. + * ssa.c (mark_phi_and_copy_regs): Handle deleted PHI nodes. + * doc/gcc.texi (Passes): Add documentation for SSA CCP pass. + Fix minor typo in SSA DCE documentation. + * doc/invoke.texi: Add documentation for new flag -fssa-ccp. + Add documentation for new dump option. Renumber dump files + appropriately. + Mon Jul 9 21:36:00 CEST 2001 Jan Hubicka * emit-rtl.c (gen_highpart_mode): New. @@ -235,8 +252,13 @@ Mon Jul 9 06:41:07 2001 Richard Kenner Delete. * config/m88k/m88k.c (m88k_end_prologue, m88k_begin_epilogue): Rename an use in target struct, make static. +<<<<<<< ChangeLog + * ia64/ia64.h (FUNCTION_END_PROLOGUE, FUNCTION_BEGIN_EPILOGUE): Delete. +======= * config/ia64/ia64.h (FUNCTION_END_PROLOGUE, FUNCTION_BEGIN_EPILOGUE): Delete. +>>>>>>> 1.10591 + 2001-07-08 Richard Henderson diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 0cffa257c46..76631d781e4 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -734,7 +734,7 @@ C_OBJS = c-parse.o c-lang.o $(C_AND_OBJC_OBJS) OBJS = \ alias.o bb-reorder.o bitmap.o builtins.o caller-save.o calls.o \ - combine.o conflict.o convert.o cse.o cselib.o dbxout.o ssa-dce.o \ + combine.o conflict.o convert.o cse.o cselib.o dbxout.o \ dependence.o df.o diagnostic.o doloop.o dominance.o dwarf2asm.o \ dwarf2out.o dwarfout.o emit-rtl.o except.o explow.o expmed.o expr.o \ final.o flow.o fold-const.o function.o gcse.o genrtl.o ggc-common.o \ @@ -745,9 +745,9 @@ OBJS = \ print-tree.o profile.o real.o recog.o reg-stack.o regclass.o regmove.o \ regrename.o reload.o reload1.o reorg.o resource.o rtl.o rtlanal.o \ sbitmap.o sched-deps.o sched-ebb.o sched-rgn.o sched-vis.o sdbout.o \ - sibcall.o simplify-rtx.o splay-tree.o ssa.o stmt.o stor-layout.o \ - stringpool.o timevar.o toplev.o tree.o unroll.o varasm.o varray.o \ - version.o xcoffout.o \ + sibcall.o simplify-rtx.o splay-tree.o ssa.o ssa-ccp.o ssa-dce.o \ + stmt.o stor-layout.o stringpool.o timevar.o toplev.o tree.o unroll.o \ + varasm.o varray.o version.o xcoffout.o \ $(GGC) $(out_object_file) $(EXTRA_OBJS) BACKEND = main.o libbackend.a @@ -1444,8 +1444,11 @@ lcm.o : lcm.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) $(REGS_H) hard-reg-set.h flags.h ssa.o : ssa.c $(CONFIG_H) $(SYSTEM_H) $(REGS_H) varray.h $(EXPR_H) \ hard-reg-set.h flags.h function.h real.h insn-config.h $(RECOG_H) \ $(BASIC_BLOCK_H) output.h ssa.h -ssa-dce.o : ssa-dce.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) hard-reg-set.h $(BASIC_BLOCK_H) \ - ssa.h insn-config.h $(RECOG_H) output.h +ssa-dce.o : ssa-dce.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) hard-reg-set.h \ + $(BASIC_BLOCK_H) ssa.h insn-config.h $(RECOG_H) output.h +ssa-ccp.o : ssa-ccp.c $(CONFIG_H) system.h $(RTL_H) hard-reg-set.h \ + $(BASIC_BLOCK_H) ssa.h insn-config.h $(RECOG_H) output.h \ + errors.h $(GGC_H) df.h function.h df.o : df.c $(CONFIG_H) system.h $(RTL_H) insn-config.h $(RECOG_H) \ function.h $(REGS_H) $(OBSTACK_H) hard-reg-set.h $(BASIC_BLOCK_H) df.h conflict.o : conflict.c $(CONFIG_H) $(SYSTEM_H) $(OBSTACK_H) $(HASHTAB_H) \ diff --git a/gcc/doc/gcc.texi b/gcc/doc/gcc.texi index 7e0cd1a155d..7bfc680ffcd 100644 --- a/gcc/doc/gcc.texi +++ b/gcc/doc/gcc.texi @@ -3446,10 +3446,27 @@ The option @option{-de} causes a debugging dump of the RTL code after this pass. This dump file's name is made by appending @samp{.ssa} to the input file name. @itemize @bullet +@cindex SSA Conditional Constant Propagation +@cindex Conditional Constant Propagation, SSA based +@cindex conditional constant propagation +@opindex fssa-ccp +@item +SSA Conditional Constant Propagation. Turned on by the @option{-fssa-ccp} +SSA Aggressive Dead Code Elimination. Turned on by the @option{-fssa-dce} +option. This pass performs conditional constant propagation to simplify +instructions including conditional branches. This pass is more aggressive +than the constant propgation done by the CSE and GCSE pases, but operates +in linear time. + +@opindex dW +The option @option{-dW} causes a debugging dump of the RTL code after +this pass. This dump file's name is made by appending @samp{.ssaccp} to +the input file name. + @cindex SSA DCE @cindex DCE, SSA based @cindex dead code elimination -@opindex fdce +@opindex fssa-dce @item SSA Aggressive Dead Code Elimination. Turned on by the @option{-fssa-dce} option. This pass performs elimination of code considered unnecessary because diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 573f8b87ef8..f97abae9030 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -272,7 +272,7 @@ in the following sections. -fregmove -frename-registers @gol -frerun-cse-after-loop -frerun-loop-opt @gol -fschedule-insns -fschedule-insns2 @gol --fsingle-precision-constant -fssa -fssa-dce @gol +-fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol -fstrength-reduce -fstrict-aliasing -fthread-jumps -ftrapv @gol -funroll-all-loops -funroll-loops @gol --param @var{name}=@var{value} @@ -2859,19 +2859,19 @@ Here are the possible letters for use in @var{letters}, and their meanings: Annotate the assembler output with miscellaneous debugging information. @item b @opindex db -Dump after computing branch probabilities, to @file{@var{file}.13.bp}. +Dump after computing branch probabilities, to @file{@var{file}.14.bp}. @item B @opindex dB -Dump after block reordering, to @file{@var{file}.27.bbro}. +Dump after block reordering, to @file{@var{file}.28.bbro}. @item c @opindex dc -Dump after instruction combination, to the file @file{@var{file}.15.combine}. +Dump after instruction combination, to the file @file{@var{file}.16.combine}. @item C @opindex dC -Dump after the first if conversion, to the file @file{@var{file}.16.ce}. +Dump after the first if conversion, to the file @file{@var{file}.17.ce}. @item d @opindex dd -Dump after delayed branch scheduling, to @file{@var{file}.30.dbr}. +Dump after delayed branch scheduling, to @file{@var{file}.31.dbr}. @item D @opindex dD Dump all macro definitions, at the end of preprocessing, in addition to @@ -2879,29 +2879,29 @@ normal output. @item e @opindex de Dump after SSA optimizations, to @file{@var{file}.04.ssa} and -@file{@var{file}.06.ussa}. +@file{@var{file}.07.ussa}. @item E @opindex dE -Dump after the second if conversion, to @file{@var{file}.25.ce2}. +Dump after the second if conversion, to @file{@var{file}.26.ce2}. @item f @opindex df -Dump after life analysis, to @file{@var{file}.14.life}. +Dump after life analysis, to @file{@var{file}.15.life}. @item F @opindex dF -Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.08.addressof}. +Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.09.addressof}. @item g @opindex dg -Dump after global register allocation, to @file{@var{file}.20.greg}. +Dump after global register allocation, to @file{@var{file}.21.greg}. @item h @opindex dh Dump after finalization of EH handling code, to @file{@var{file}.02.eh}. @item o @item o @opindex do -Dump after post-reload CSE and other optimizations, to @file{@var{file}.21.postreload}. +Dump after post-reload CSE and other optimizations, to @file{@var{file}.22.postreload}. @item G @opindex dG -Dump after GCSE, to @file{@var{file}.09.gcse}. +Dump after GCSE, to @file{@var{file}.10.gcse}. @item i @opindex di Dump after sibling call optimizations, to @file{@var{file}.01.sibling}. @@ -2910,54 +2910,54 @@ Dump after sibling call optimizations, to @file{@var{file}.01.sibling}. Dump after the first jump optimization, to @file{@var{file}.03.jump}. @item J @opindex dJ -Dump after the last jump optimization, to @file{@var{file}.28.jump2}. +Dump after the last jump optimization, to @file{@var{file}.29.jump2}. @item k @opindex dk -Dump after conversion from registers to stack, to @file{@var{file}.31.stack}. +Dump after conversion from registers to stack, to @file{@var{file}.32.stack}. @item l @opindex dl -Dump after local register allocation, to @file{@var{file}.19.lreg}. +Dump after local register allocation, to @file{@var{file}.20.lreg}. @item L @opindex dL -Dump after loop optimization, to @file{@var{file}.10.loop}. +Dump after loop optimization, to @file{@var{file}.11.loop}. @item M @opindex dM Dump after performing the machine dependent reorganisation pass, to -@file{@var{file}.29.mach}. +@file{@var{file}.30.mach}. @item n @opindex dn -Dump after register renumbering, to @file{@var{file}.24.rnreg}. +Dump after register renumbering, to @file{@var{file}.25.rnreg}. @item N @opindex dN -Dump after the register move pass, to @file{@var{file}.17.regmove}. +Dump after the register move pass, to @file{@var{file}.18.regmove}. @item r @opindex dr Dump after RTL generation, to @file{@var{file}.00.rtl}. @item R @opindex dR Dump after the second instruction scheduling pass, to -@file{@var{file}.26.sched2}. +@file{@var{file}.27.sched2}. @item s @opindex ds Dump after CSE (including the jump optimization that sometimes follows -CSE), to @file{@var{file}.07.cse}. +CSE), to @file{@var{file}.08.cse}. @item S @opindex dS Dump after the first instruction scheduling pass, to -@file{@var{file}.18.sched}. +@file{@var{file}.19.sched}. @item t @opindex dt Dump after the second CSE pass (including the jump optimization that -sometimes follows CSE), to @file{@var{file}.11.cse2}. +sometimes follows CSE), to @file{@var{file}.12.cse2}. @item w @opindex dw -Dump after the second flow pass, to @file{@var{file}.22.flow2}. +Dump after the second flow pass, to @file{@var{file}.23.flow2}. @item X @opindex dX -Dump after SSA aggressive dead code elimination, to @file{@var{file}.05.ssadce}. +Dump after SSA aggressive dead code elimination, to @file{@var{file}.06.ssadce}. @item z @opindex dz -Dump after the peephole pass, to @file{@var{file}.23.peephole2}. +Dump after the peephole pass, to @file{@var{file}.24.peephole2}. @item a @opindex da Produce all the dumps listed above. @@ -3751,6 +3751,11 @@ flow graph is translated into SSA form, optimizations are performed, and the flow graph is translated back from SSA form. Users should not specify this option, since it is not yet ready for production use. +@item -fssa-ccp +@opindex fssa-ccp +Perform Sparse Conditional Constant Propagation in SSA form. Requires +@option{-fssa}. Like @option{-fssa}, this is an experimental feature. + @item -fssa-dce @opindex fssa-dce Perform aggressive dead-code elimination in SSA form. Requires @option{-fssa}. diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index bd6e8c4ceab..62f8867b818 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +Mon Jul 9 13:27:15 2001 Jeffrey A Law (law@cygnus.com) + + * POTFILES.in: Add ssa-ccp.c + Thu Jun 28 16:11:30 2001 Jeffrey A Law (law@cygnus.com) * POTFILES.in: Add df.c and df.h diff --git a/gcc/po/POTFILES.in b/gcc/po/POTFILES.in index 12d1dd7ce2b..03f1ae36c76 100644 --- a/gcc/po/POTFILES.in +++ b/gcc/po/POTFILES.in @@ -1008,6 +1008,7 @@ sibcall.c simplify-rtx.c ssa.c ssa.h +ssa-ccp.c ssa-dce.c stack.h stmt.c diff --git a/gcc/ssa.c b/gcc/ssa.c index cad10ca71a6..0aeb92091f9 100644 --- a/gcc/ssa.c +++ b/gcc/ssa.c @@ -1924,7 +1924,9 @@ mark_phi_and_copy_regs (phi_set) rtx pattern; rtx src; - if (insn == NULL) + if (insn == NULL + || (GET_CODE (insn) == NOTE + && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)) continue; pattern = PATTERN (insn); /* Sometimes we get PARALLEL insns. These aren't phi nodes or diff --git a/gcc/timevar.def b/gcc/timevar.def index 884eedb2e04..f07a7d26434 100644 --- a/gcc/timevar.def +++ b/gcc/timevar.def @@ -70,6 +70,7 @@ DEFTIMEVAR (TV_REORDER_BLOCKS , "reorder blocks") DEFTIMEVAR (TV_SHORTEN_BRANCH , "shorten branches") DEFTIMEVAR (TV_REG_STACK , "reg stack") DEFTIMEVAR (TV_TO_SSA , "convert to SSA") +DEFTIMEVAR (TV_SSA_CCP , "SSA CCP") DEFTIMEVAR (TV_SSA_DCE , "SSA aggressive DCE") DEFTIMEVAR (TV_FROM_SSA , "convert from SSA") DEFTIMEVAR (TV_FINAL , "final") diff --git a/gcc/toplev.c b/gcc/toplev.c index 94b830e9952..7406d43cdbb 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -254,6 +254,7 @@ enum dump_file_index DFI_eh, DFI_jump, DFI_ssa, + DFI_ssa_ccp, DFI_ssa_dce, DFI_ussa, DFI_cse, @@ -290,7 +291,7 @@ enum dump_file_index Remaining -d letters: " o q u " - " H K OPQ TUVW YZ" + " H K OPQ TUV YZ" */ struct dump_file_info dump_file[DFI_MAX] = @@ -300,6 +301,7 @@ struct dump_file_info dump_file[DFI_MAX] = { "eh", 'h', 0, 0, 0 }, { "jump", 'j', 0, 0, 0 }, { "ssa", 'e', 1, 0, 0 }, + { "ssaccp", 'W', 1, 0, 0 }, { "ssadce", 'X', 1, 0, 0 }, { "ussa", 'e', 1, 0, 0 }, /* Yes, duplicate enable switch. */ { "cse", 's', 0, 0, 0 }, @@ -818,7 +820,10 @@ int flag_gnu_linker = 1; /* Enable SSA. */ int flag_ssa = 0; -/* Enable dead code elimination. */ +/* Enable ssa conditional constant propagation. */ +int flag_ssa_ccp = 0; + +/* Enable ssa aggressive dead code elimination. */ int flag_ssa_dce = 0; /* Tag all structures with __attribute__(packed). */ @@ -1142,6 +1147,8 @@ lang_independent_options f_options[] = N_("Instrument function entry/exit with profiling calls") }, {"ssa", &flag_ssa, 1, N_("Enable SSA optimizations") }, + {"ssa-ccp", &flag_ssa_ccp, 1, + N_("Enable SSA conditonal constant propagation") }, {"ssa-dce", &flag_ssa_dce, 1, N_("Enable aggressive SSA dead code elimination") }, {"leading-underscore", &flag_leading_underscore, 1, @@ -2964,6 +2971,22 @@ rest_of_compilation (decl) close_dump_file (DFI_ssa, print_rtl_with_bb, insns); timevar_pop (TV_TO_SSA); + /* Perform sparse conditional constant propagation, if requested. */ + if (flag_ssa_ccp) + { + timevar_push (TV_SSA_CCP); + open_dump_file (DFI_ssa_ccp, decl); + + ssa_const_prop (); + + close_dump_file (DFI_ssa_ccp, print_rtl_with_bb, get_insns ()); + timevar_pop (TV_SSA_CCP); + } + + /* It would be useful to cleanup the CFG at this point, but block + merging and possibly other transformations might leave a PHI + node in the middle of a basic block, which is a strict no-no. */ + /* The SSA implementation uses basic block numbers in its phi nodes. Thus, changing the control-flow graph or the basic blocks, e.g., calling find_basic_blocks () or cleanup_cfg (),