rs6000: Improve fusion assembler output
This improves the output for load and store fusion a little. In most cases it removes the comment output, because that makes the generated assembler code hard to read, and equivalent info is available with -dp anyway. For the vector loads it puts the comment on the second insn, where it doesn't interfere with other debug comments. * config/rs6000/rs6000-protos.h (emit_fusion_addis): Remove last two parameters from prototype. * config/rs6000/rs6000.c (emit_fusion_addis): Remove last two parameters. Don't print a comment. (emit_fusion_gpr_load): Adjust. (emit_fusion_load_store): Adjust. * config/rs6000/rs6000.md (*fusion_p9_<mode>_constant): Adjust. * config/rs6000/vsx.md (two peepholes): Print the "vector load fusion" comment on the second line. gcc/testsuite/ * gcc.target/powerpc/fusion.c: Add -dp to options. Adjust the expected output. * gcc.target/powerpc/fusion3.c: Ditto. * gcc.target/powerpc/fusion4.c: Ditto. From-SVN: r255350
This commit is contained in:
Segher Boessenkool
Segher Boessenkool
parent
81094bcb45
commit
0bcd172e9d
@ -1,3 +1,15 @@
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2017-12-01 Segher Boessenkool <segher@kernel.crashing.org>
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* config/rs6000/rs6000-protos.h (emit_fusion_addis): Remove last two
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parameters from prototype.
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* config/rs6000/rs6000.c (emit_fusion_addis): Remove last two
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parameters. Don't print a comment.
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(emit_fusion_gpr_load): Adjust.
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(emit_fusion_load_store): Adjust.
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* config/rs6000/rs6000.md (*fusion_p9_<mode>_constant): Adjust.
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* config/rs6000/vsx.md (two peepholes): Print the "vector load fusion"
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comment on the second line.
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2017-12-01 Segher Boessenkool <segher@kernel.crashing.org>
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PR target/43871
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@ -96,7 +96,7 @@ extern bool quad_address_p (rtx, machine_mode, bool);
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extern bool quad_load_store_p (rtx, rtx);
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extern bool fusion_gpr_load_p (rtx, rtx, rtx, rtx);
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extern void expand_fusion_gpr_load (rtx *);
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extern void emit_fusion_addis (rtx, rtx, const char *, const char *);
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extern void emit_fusion_addis (rtx, rtx);
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extern void emit_fusion_load_store (rtx, rtx, rtx, const char *);
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extern const char *emit_fusion_gpr_load (rtx, rtx);
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extern bool fusion_p9_p (rtx, rtx, rtx, rtx);
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@ -38630,16 +38630,10 @@ expand_fusion_gpr_load (rtx *operands)
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sequence. */
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void
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emit_fusion_addis (rtx target, rtx addis_value, const char *comment,
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const char *mode_name)
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emit_fusion_addis (rtx target, rtx addis_value)
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{
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rtx fuse_ops[10];
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char insn_template[80];
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const char *addis_str = NULL;
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const char *comment_str = ASM_COMMENT_START;
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if (*comment_str == ' ')
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comment_str++;
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/* Emit the addis instruction. */
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fuse_ops[0] = target;
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@ -38719,9 +38713,7 @@ emit_fusion_addis (rtx target, rtx addis_value, const char *comment,
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if (!addis_str)
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fatal_insn ("Could not generate addis value for fusion", addis_value);
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sprintf (insn_template, "%s\t\t%s %s, type %s", addis_str, comment_str,
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comment, mode_name);
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output_asm_insn (insn_template, fuse_ops);
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output_asm_insn (addis_str, fuse_ops);
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}
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/* Emit a D-form load or store instruction that is the second instruction
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@ -38854,7 +38846,6 @@ emit_fusion_gpr_load (rtx target, rtx mem)
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rtx addr;
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rtx load_offset;
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const char *load_str = NULL;
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const char *mode_name = NULL;
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machine_mode mode;
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if (GET_CODE (mem) == ZERO_EXTEND)
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@ -38870,25 +38861,21 @@ emit_fusion_gpr_load (rtx target, rtx mem)
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switch (mode)
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{
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case E_QImode:
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mode_name = "char";
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load_str = "lbz";
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break;
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case E_HImode:
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mode_name = "short";
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load_str = "lhz";
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break;
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case E_SImode:
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case E_SFmode:
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mode_name = (mode == SFmode) ? "float" : "int";
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load_str = "lwz";
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break;
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case E_DImode:
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case E_DFmode:
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gcc_assert (TARGET_POWERPC64);
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mode_name = (mode == DFmode) ? "double" : "long";
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load_str = "ld";
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break;
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@ -38897,7 +38884,7 @@ emit_fusion_gpr_load (rtx target, rtx mem)
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}
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/* Emit the addis instruction. */
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emit_fusion_addis (target, addis_value, "gpr load fusion", mode_name);
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emit_fusion_addis (target, addis_value);
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/* Emit the D-form load instruction. */
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emit_fusion_load_store (target, target, load_offset, load_str);
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@ -39166,7 +39153,7 @@ emit_fusion_p9_load (rtx reg, rtx mem, rtx tmp_reg)
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fusion_split_address (addr, &hi, &lo);
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/* Emit the addis instruction. */
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emit_fusion_addis (tmp_reg, hi, "power9 load fusion", GET_MODE_NAME (mode));
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emit_fusion_addis (tmp_reg, hi);
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/* Emit the D-form load instruction. */
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emit_fusion_load_store (reg, tmp_reg, lo, load_string);
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@ -39253,7 +39240,7 @@ emit_fusion_p9_store (rtx mem, rtx reg, rtx tmp_reg)
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fusion_split_address (addr, &hi, &lo);
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/* Emit the addis instruction. */
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emit_fusion_addis (tmp_reg, hi, "power9 store fusion", GET_MODE_NAME (mode));
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emit_fusion_addis (tmp_reg, hi);
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/* Emit the D-form load instruction. */
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emit_fusion_load_store (reg, tmp_reg, lo, store_string);
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@ -14110,7 +14110,7 @@
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UNSPEC_FUSION_P9))]
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"TARGET_P9_FUSION"
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{
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emit_fusion_addis (operands[0], operands[1], "constant", "<MODE>");
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emit_fusion_addis (operands[0], operands[1]);
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return "ori %0,%0,%2";
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}
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[(set_attr "type" "two")
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@ -4160,7 +4160,7 @@
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(mem:VSX_M (plus:P (match_dup 0)
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(match_operand:P 3 "int_reg_operand" ""))))]
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"TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
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"li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3"
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"li %0,%1\;lx<VSX_M:VSm>x %x2,%0,%3\t\t\t# vector load fusion"
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[(set_attr "length" "8")
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(set_attr "type" "vecload")])
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@ -4171,7 +4171,7 @@
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(mem:VSX_M (plus:P (match_operand:P 3 "int_reg_operand" "")
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(match_dup 0))))]
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"TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
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"li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3"
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"li %0,%1\;lx<VSX_M:VSm>x %x2,%0,%3\t\t\t# vector load fusion"
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[(set_attr "length" "8")
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(set_attr "type" "vecload")])
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@ -1,3 +1,10 @@
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2017-12-01 Segher Boessenkool <segher@kernel.crashing.org>
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* gcc.target/powerpc/fusion.c: Add -dp to options. Adjust the expected
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output.
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* gcc.target/powerpc/fusion3.c: Ditto.
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* gcc.target/powerpc/fusion4.c: Ditto.
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2017-12-01 Michael Meissner <meissner@linux.vnet.ibm.com>
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PR target/81959
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@ -2,7 +2,7 @@
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/* { dg-skip-if "" { powerpc*-*-darwin* } } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
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/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */
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/* { dg-options "-mcpu=power7 -mtune=power8 -O3 -dp" } */
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#define LARGE 0x12345
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@ -13,7 +13,7 @@ int fusion_short (short *p){ return p[LARGE]; }
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int fusion_int (int *p){ return p[LARGE]; }
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unsigned fusion_uns (unsigned *p){ return p[LARGE]; }
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/* { dg-final { scan-assembler-times "gpr load fusion" 6 } } */
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/* { dg-final { scan-assembler-times "fusion_gpr_load" 6 } } */
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/* { dg-final { scan-assembler-times "lbz" 2 } } */
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/* { dg-final { scan-assembler-times "extsb" 1 } } */
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/* { dg-final { scan-assembler-times "lhz" 2 } } */
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@ -2,7 +2,7 @@
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/* { dg-skip-if "" { powerpc*-*-darwin* } } */
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/* { dg-require-effective-target powerpc_p9vector_ok } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
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/* { dg-options "-mcpu=power7 -mtune=power9 -O3" } */
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/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -dp" } */
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#define LARGE 0x12345
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@ -12,7 +12,7 @@ int fusion_double_read (double *p){ return p[LARGE]; }
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void fusion_float_write (float *p, float f){ p[LARGE] = f; }
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void fusion_double_write (double *p, double d){ p[LARGE] = d; }
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/* { dg-final { scan-assembler "load fusion, type SF" } } */
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/* { dg-final { scan-assembler "load fusion, type DF" } } */
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/* { dg-final { scan-assembler "store fusion, type SF" } } */
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/* { dg-final { scan-assembler "store fusion, type DF" } } */
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/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_load} } } */
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/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_load} } } */
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/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_store} } } */
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/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_store} } } */
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@ -1,8 +1,7 @@
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/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } } */
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/* { dg-require-effective-target powerpc_p9vector_ok } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
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/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float" } */
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/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float -dp" } */
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#define LARGE 0x12345
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@ -10,4 +9,4 @@ float fusion_float_read (float *p){ return p[LARGE]; }
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void fusion_float_write (float *p, float f){ p[LARGE] = f; }
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/* { dg-final { scan-assembler "store fusion, type SF" } } */
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/* { dg-final { scan-assembler {fusion_gpr_[sd]i_sf_store} } } */
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