i386.h (MAYBE_NON_Q_CLASS_P): New.
* config/i386/i386.h (MAYBE_NON_Q_CLASS_P): New. * config/i386/i386.c (ix86_secondary_reload): Use INTEGER_CLASS_P and MAYBE_NON_Q_CLASS_P where appropriate. From-SVN: r201415
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@ -1,3 +1,9 @@
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2013-08-01 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.h (MAYBE_NON_Q_CLASS_P): New.
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* config/i386/i386.c (ix86_secondary_reload): Use INTEGER_CLASS_P and
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MAYBE_NON_Q_CLASS_P where appropriate.
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2013-08-01 Jan Hubicka <jh@suse.cz>
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* cgraph.h (release_function_body): Declare.
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@ -26,13 +32,16 @@
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* tree-inline-transfrom.c (can_remove_node_now_p_1): Do not remove
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symbols used as abstract origins.
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* cgraphunit.c (analyze_functions): Update.
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* ipa.c (symtab_remove_unreachable_nodes): Recompute used_as_abstract_origin.
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* ipa.c (symtab_remove_unreachable_nodes): Recompute
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used_as_abstract_origin.
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* tree-inline.c (tree_function_versioning): Update
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used_as_abstract_origin; be ready for DECL_RESULT and DECL_ARGUMENTS to be
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NULL.
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used_as_abstract_origin; be ready for DECL_RESULT and
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DECL_ARGUMENTS to be NULL.
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* lto-symtab.c (lto_symtab_merge_symbols): Merge duplicated nodes for abstract functions.
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* cgraph.h (symtab_real_symbol_p): Abstract declarations are not real symbols.
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* lto-symtab.c (lto_symtab_merge_symbols): Merge duplicated nodes
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for abstract functions.
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* cgraph.h (symtab_real_symbol_p): Abstract declarations are not
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real symbols.
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2013-08-01 Jan Hubicka <jh@suse.cz>
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@ -74,8 +83,7 @@
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(emit_fusion_gpr_load): Emit the instructions for power8 load
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fusion to GPRs.
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* config/rs6000/vsx.md (VSX_M2): New iterator for fusion
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peepholes.
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* config/rs6000/vsx.md (VSX_M2): New iterator for fusion peepholes.
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(VSX load fusion peepholes): New peepholes to fuse together an
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addi instruction with a VSX load instruction.
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@ -92,21 +100,22 @@
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(arm*-*-*): Add arm/aarch-common-protos.h to tm_p_file.
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* config/arm/arm.c (arm_early_load_addr_dep): Move from here to ...
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(arm_early_store_addr_dep): Likewise.
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(arm_no_early_alu_shift_dep: Likewise.
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(arm_no_early_alu_shift_value_dep: Likewise.
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(arm_no_early_mul_dep: Likewise.
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(arm_no_early_store_addr_dep: Likewise.
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(arm_mac_accumulator_is_mul_result: Likewise.
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(arm_mac_accumulator_is_result: Likewise.
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(arm_no_early_alu_shift_dep): Likewise.
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(arm_no_early_alu_shift_value_dep): Likewise.
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(arm_no_early_mul_dep): Likewise.
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(arm_no_early_store_addr_dep): Likewise.
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(arm_mac_accumulator_is_mul_result): Likewise.
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(arm_mac_accumulator_is_result): Likewise.
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* config/arm/aarch-common.c: ... here. New file.
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* config/arm/arm-protos.h (arm_early_load_addr_dep): Move from here to ...
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* config/arm/arm-protos.h (arm_early_load_addr_dep): Move from
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here to ...
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(arm_early_store_addr_dep): Likewise.
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(arm_no_early_alu_shift_dep: Likewise.
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(arm_no_early_alu_shift_value_dep: Likewise.
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(arm_no_early_mul_dep: Likewise.
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(arm_no_early_store_addr_dep: Likewise.
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(arm_mac_accumulator_is_mul_result: Likewise.
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(arm_mac_accumulator_is_result: Likewise.
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(arm_no_early_alu_shift_dep): Likewise.
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(arm_no_early_alu_shift_value_dep): Likewise.
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(arm_no_early_mul_dep): Likewise.
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(arm_no_early_store_addr_dep): Likewise.
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(arm_mac_accumulator_is_mul_result): Likewise.
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(arm_mac_accumulator_is_result): Likewise.
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* config/arm/aarch-common-protos.h: ... here. New file.
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* config/arm/t-arm (aarch-common.o): Define.
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@ -33822,7 +33822,7 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
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if (TARGET_64BIT
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&& MEM_P (x)
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&& GET_MODE_SIZE (mode) > UNITS_PER_WORD
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&& rclass == GENERAL_REGS
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&& INTEGER_CLASS_P (rclass)
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&& !offsettable_memref_p (x))
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{
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sri->icode = (in_p
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@ -33838,12 +33838,8 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
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intermediate register on 32bit targets. */
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if (!TARGET_64BIT
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&& !in_p && mode == QImode
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&& (rclass == GENERAL_REGS
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|| rclass == LEGACY_REGS
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|| rclass == NON_Q_REGS
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|| rclass == SIREG
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|| rclass == DIREG
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|| rclass == INDEX_REGS))
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&& INTEGER_CLASS_P (rclass)
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&& MAYBE_NON_Q_CLASS_P (rclass))
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{
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int regno;
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@ -1288,13 +1288,16 @@ enum reg_class
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#define MAYBE_FLOAT_CLASS_P(CLASS) \
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reg_classes_intersect_p ((CLASS), FLOAT_REGS)
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#define MAYBE_SSE_CLASS_P(CLASS) \
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reg_classes_intersect_p (SSE_REGS, (CLASS))
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reg_classes_intersect_p ((CLASS), SSE_REGS)
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#define MAYBE_MMX_CLASS_P(CLASS) \
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reg_classes_intersect_p (MMX_REGS, (CLASS))
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reg_classes_intersect_p ((CLASS), MMX_REGS)
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#define Q_CLASS_P(CLASS) \
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reg_class_subset_p ((CLASS), Q_REGS)
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#define MAYBE_NON_Q_CLASS_P(CLASS) \
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reg_classes_intersect_p ((CLASS), NON_Q_REGS)
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/* Give names of register classes as strings for dump file. */
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#define REG_CLASS_NAMES \
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