diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 66d7d86ba2f..1358d4b3542 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-09-25 Richard Biener + + PR tree-optimization/91896 + * tree-vect-loop.c (vectorizable_reduction): The single + def-use cycle optimization cannot apply when there's more + than one pattern stmt involved. + 2019-09-26 Richard Biener * tree-vect-loop.c (vect_analyze_loop_operations): Analyze diff --git a/gcc/expr.c b/gcc/expr.c index 2f2b53f8b69..7a7070670ed 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -7230,12 +7230,13 @@ get_inner_reference (tree exp, poly_int64_pod *pbitsize, *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) || TYPE_UNSIGNED (TREE_TYPE (exp))); - /* For vector types, with the correct size of access, use the mode of - inner type. */ - if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE - && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) - && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) - mode = TYPE_MODE (TREE_TYPE (exp)); + /* For vector element types with the correct size of access or for + vector typed accesses use the mode of the access type. */ + if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE + && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) + && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) + || VECTOR_TYPE_P (TREE_TYPE (exp))) + mode = TYPE_MODE (TREE_TYPE (exp)); } else { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8d75c29feb1..19ad3936b64 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-09-26 Richard Biener + + PR middle-end/91897 + * gcc.target/i386/pr91897.c: New testcase. + 2019-09-26 Martin Sebor PR tree-optimization/91914 diff --git a/gcc/testsuite/gcc.target/i386/pr91897.c b/gcc/testsuite/gcc.target/i386/pr91897.c new file mode 100644 index 00000000000..0615ad2fdca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr91897.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx" } */ + +typedef double Double16 __attribute__((vector_size(8*16))); + +void mult(Double16 *res, const Double16 *v1, const Double16 *v2) +{ + *res = *v1 * *v2; +} + +/* We want 4 ymm loads and 4 ymm stores. */ +/* { dg-final { scan-assembler-times "movapd" 8 } } */