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mips-cpus.def (loongson3a): Mark as a MIPS64r2 processor.

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gcc/
2014-03-04  Heiher  <r@hev.cc>

	* config/mips/mips-cpus.def (loongson3a): Mark as a MIPS64r2 processor.
	* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Adjust accordingly.

From-SVN: r208330
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Heiher 2014-03-05 04:09:50 +06:30 committed by Richard Sandiford
parent 66b03f816a
commit 0c72fa788d
3 changed files with 8 additions and 3 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2014-03-04 Heiher <r@hev.cc>
* config/mips/mips-cpus.def (loongson3a): Mark as a MIPS64r2 processor.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Adjust accordingly.
2014-03-04 Uros Bizjak <ubizjak@gmail.com>
* config/i386/predicates.md (const2356_operand): Change to ...

2
gcc/config/mips/mips-cpus.def
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@ -145,9 +145,9 @@ MIPS_CPU ("sb1", PROCESSOR_SB1, 64, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("sb1a", PROCESSOR_SB1A, 64, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("sr71000", PROCESSOR_SR71000, 64, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("xlr", PROCESSOR_XLR, 64, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("loongson3a", PROCESSOR_LOONGSON_3A, 64, PTF_AVOID_BRANCHLIKELY)
/* MIPS64 Release 2 processors. */
MIPS_CPU ("loongson3a", PROCESSOR_LOONGSON_3A, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon2", PROCESSOR_OCTEON2, 65, PTF_AVOID_BRANCHLIKELY)

4
gcc/config/mips/mips.h
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@ -701,8 +701,8 @@ struct mips_cpu_info {
%{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \
|march=34k*|march=74k*|march=m14k*|march=1004k*: -mips32r2} \
%{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \
|march=xlr|march=loongson3a: -mips64} \
%{march=mips64r2|march=octeon|march=xlp: -mips64r2} \
|march=xlr: -mips64} \
%{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \
%{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
/* A spec that infers a -mhard-float or -msoft-float setting from an