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2010-xx-xx Mingjie Xing <mingjie.xing@gmail.com> 

gcc/testsuite/
2010-xx-xx  Mingjie Xing  <mingjie.xing@gmail.com>

	* lib/target-supports.exp (check_effective_target_vect_int): Return
	true for Loongson targets.
	(check_effective_target_vect_shift): Likewise.
	(check_effective_target_vect_no_int_max): Likewise.
	(check_effective_target_vect_no_align): Likewise.
	(check_effective_target_vect_short_mult): Likewise.

From-SVN: r163247
This commit is contained in:
Mingjie Xing 2010-08-14 19:46:25 +00:00 committed by Richard Sandiford
parent a44ecea126
commit 0d108d1595
2 changed files with 25 additions and 6 deletions
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9
gcc/testsuite/ChangeLog
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@ -1,3 +1,12 @@
2010-08-14 Mingjie Xing <mingjie.xing@gmail.com>
* lib/target-supports.exp (check_effective_target_vect_int): Return
true for Loongson targets.
(check_effective_target_vect_shift): Likewise.
(check_effective_target_vect_no_int_max): Likewise.
(check_effective_target_vect_no_align): Likewise.
(check_effective_target_vect_short_mult): Likewise.
2010-08-14 Uros Bizjak <ubizjak@gmail.com>
* g++.dg/cast.C: Change fields of structures to "long" to pass

22
gcc/testsuite/lib/target-supports.exp
View File

@ -1620,7 +1620,9 @@ proc check_effective_target_vect_int { } {
|| [istarget sparc*-*-*]
|| [istarget alpha*-*-*]
|| [istarget ia64-*-*]
|| [check_effective_target_arm32] } {
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
set et_vect_int_saved 1
}
}
@ -2156,7 +2158,9 @@ proc check_effective_target_vect_shift { } {
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [check_effective_target_arm32] } {
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
set et_vect_shift_saved 1
}
}
@ -2270,7 +2274,9 @@ proc check_effective_target_vect_no_int_max { } {
set et_vect_no_int_max_saved 0
if { [istarget sparc*-*-*]
|| [istarget spu-*-*]
|| [istarget alpha*-*-*] } {
|| [istarget alpha*-*-*]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
set et_vect_no_int_max_saved 1
}
}
@ -2643,7 +2649,9 @@ proc check_effective_target_vect_no_align { } {
if { [istarget mipsisa64*-*-*]
|| [istarget sparc*-*-*]
|| [istarget ia64-*-*]
|| [check_effective_target_arm32] } {
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
set et_vect_no_align_saved 1
}
}
@ -2833,8 +2841,10 @@ proc check_effective_target_vect_short_mult { } {
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget powerpc*-*-*]
|| [check_effective_target_arm32] } {
|| [istarget powerpc*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
set et_vect_short_mult_saved 1
}
}