i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE.
* config/i386/i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE. From-SVN: r237451
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2016-06-14 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (signbittf2): Emit sse_movmskps for TARGET_SSE.
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2016-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* expmed.h: Close parenthesis in "at your option" in copyright
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@ -16201,16 +16201,25 @@
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(define_expand "signbittf2"
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[(use (match_operand:SI 0 "register_operand"))
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(use (match_operand:TF 1 "register_operand"))]
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"TARGET_SSE4_1"
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"TARGET_SSE"
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{
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rtx mask = ix86_build_signbit_mask (TFmode, 0, 0);
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rtx scratch = gen_reg_rtx (QImode);
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if (TARGET_SSE4_1)
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{
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rtx mask = ix86_build_signbit_mask (TFmode, 0, 0);
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rtx scratch = gen_reg_rtx (QImode);
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emit_insn (gen_ptesttf2 (operands[1], mask));
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ix86_expand_setcc (scratch, NE,
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gen_rtx_REG (CCZmode, FLAGS_REG), const0_rtx);
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emit_insn (gen_ptesttf2 (operands[1], mask));
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ix86_expand_setcc (scratch, NE,
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gen_rtx_REG (CCZmode, FLAGS_REG), const0_rtx);
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emit_insn (gen_zero_extendqisi2 (operands[0], scratch));
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emit_insn (gen_zero_extendqisi2 (operands[0], scratch));
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}
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else
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{
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emit_insn (gen_sse_movmskps (operands[0],
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gen_lowpart (V4SFmode, operands[1])));
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emit_insn (gen_andsi3 (operands[0], operands[0], GEN_INT (0x8)));
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}
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DONE;
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})
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