aarch64: Add 64 bit setter getter fpsr fpcr
gcc/ChangeLog * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums for 64bits fpsr/fpcr getter setters builtin variants. (aarch64_init_fpsr_fpcr_builtins): New function. (aarch64_general_init_builtins): Modify to make use of the later. (aarch64_expand_fpsr_fpcr_setter): New function. (aarch64_general_expand_builtin): Modify to make use of the later. * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>) (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and generalizing 'get_fpcr', 'set_fpsr'. * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int iterators. (fpscr_name): New int attribute. * doc/extend.texi (__builtin_aarch64_get_fpcr64) (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64) (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in Functions. gcc/testsuite/ChangeLog * gcc.target/aarch64/get_fpcr64_1.c: New test. * gcc.target/aarch64/set_fpcr64_1.c: New test. * gcc.target/aarch64/get_fpsr64_1.c: New test. * gcc.target/aarch64/set_fpsr64_1.c: New test.
This commit is contained in:
Andrea Corallo
parent
685d8dafb4
commit
0d7e5fa655
@ -450,6 +450,11 @@ enum aarch64_builtins
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AARCH64_BUILTIN_GET_FPSR,
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AARCH64_BUILTIN_SET_FPSR,
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AARCH64_BUILTIN_GET_FPCR64,
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AARCH64_BUILTIN_SET_FPCR64,
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AARCH64_BUILTIN_GET_FPSR64,
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AARCH64_BUILTIN_SET_FPSR64,
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AARCH64_BUILTIN_RSQRT_DF,
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AARCH64_BUILTIN_RSQRT_SF,
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AARCH64_BUILTIN_RSQRT_V2DF,
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@ -1247,32 +1252,63 @@ aarch64_init_memtag_builtins (void)
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#undef AARCH64_INIT_MEMTAG_BUILTINS_DECL
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}
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/* Initialize fpsr fpcr getters and setters. */
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static void
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aarch64_init_fpsr_fpcr_builtins (void)
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{
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tree ftype_set
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= build_function_type_list (void_type_node, unsigned_type_node, NULL);
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tree ftype_get
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= build_function_type_list (unsigned_type_node, NULL);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpcr",
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ftype_get,
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AARCH64_BUILTIN_GET_FPCR);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpcr",
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ftype_set,
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AARCH64_BUILTIN_SET_FPCR);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPSR]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpsr",
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ftype_get,
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AARCH64_BUILTIN_GET_FPSR);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPSR]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpsr",
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ftype_set,
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AARCH64_BUILTIN_SET_FPSR);
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ftype_set
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= build_function_type_list (void_type_node, long_long_unsigned_type_node,
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NULL);
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ftype_get
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= build_function_type_list (long_long_unsigned_type_node, NULL);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR64]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpcr64",
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ftype_get,
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AARCH64_BUILTIN_GET_FPCR64);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR64]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpcr64",
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ftype_set,
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AARCH64_BUILTIN_SET_FPCR64);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPSR64]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpsr64",
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ftype_get,
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AARCH64_BUILTIN_GET_FPSR64);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPSR64]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpsr64",
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ftype_set,
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AARCH64_BUILTIN_SET_FPSR64);
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}
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/* Initialize all builtins in the AARCH64_BUILTIN_GENERAL group. */
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void
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aarch64_general_init_builtins (void)
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{
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tree ftype_set_fpr
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= build_function_type_list (void_type_node, unsigned_type_node, NULL);
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tree ftype_get_fpr
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= build_function_type_list (unsigned_type_node, NULL);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpcr",
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ftype_get_fpr,
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AARCH64_BUILTIN_GET_FPCR);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpcr",
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ftype_set_fpr,
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AARCH64_BUILTIN_SET_FPCR);
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aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPSR]
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= aarch64_general_add_builtin ("__builtin_aarch64_get_fpsr",
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ftype_get_fpr,
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AARCH64_BUILTIN_GET_FPSR);
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aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPSR]
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= aarch64_general_add_builtin ("__builtin_aarch64_set_fpsr",
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ftype_set_fpr,
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AARCH64_BUILTIN_SET_FPSR);
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aarch64_init_fpsr_fpcr_builtins ();
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aarch64_init_fp16_types ();
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@ -1878,6 +1914,16 @@ aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target)
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return target;
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}
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/* Expand an expression EXP as fpsr or cpsr setter (depending on
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UNSPEC) using MODE. */
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static void
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aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp)
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{
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tree arg = CALL_EXPR_ARG (exp, 0);
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rtx op = force_reg (mode, expand_normal (arg));
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emit_insn (gen_aarch64_set (unspec, mode, op));
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}
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/* Expand an expression EXP that calls built-in function FCODE,
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with result going to TARGET if that's convenient. IGNORE is true
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if the result of the builtin is ignored. */
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@ -1886,35 +1932,35 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target,
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int ignore)
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{
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int icode;
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rtx pat, op0;
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rtx op0;
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tree arg0;
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switch (fcode)
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{
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case AARCH64_BUILTIN_GET_FPCR:
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case AARCH64_BUILTIN_SET_FPCR:
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case AARCH64_BUILTIN_GET_FPSR:
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case AARCH64_BUILTIN_SET_FPSR:
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if ((fcode == AARCH64_BUILTIN_GET_FPCR)
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|| (fcode == AARCH64_BUILTIN_GET_FPSR))
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{
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icode = (fcode == AARCH64_BUILTIN_GET_FPSR) ?
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CODE_FOR_get_fpsr : CODE_FOR_get_fpcr;
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target = gen_reg_rtx (SImode);
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pat = GEN_FCN (icode) (target);
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}
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else
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{
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target = NULL_RTX;
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icode = (fcode == AARCH64_BUILTIN_SET_FPSR) ?
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CODE_FOR_set_fpsr : CODE_FOR_set_fpcr;
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arg0 = CALL_EXPR_ARG (exp, 0);
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op0 = force_reg (SImode, expand_normal (arg0));
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pat = GEN_FCN (icode) (op0);
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}
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emit_insn (pat);
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emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, SImode, target));
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return target;
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case AARCH64_BUILTIN_SET_FPCR:
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aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, SImode, exp);
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return target;
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case AARCH64_BUILTIN_GET_FPSR:
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emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, SImode, target));
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return target;
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case AARCH64_BUILTIN_SET_FPSR:
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aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, SImode, exp);
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return target;
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case AARCH64_BUILTIN_GET_FPCR64:
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emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, DImode, target));
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return target;
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case AARCH64_BUILTIN_SET_FPCR64:
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aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, DImode, exp);
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return target;
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case AARCH64_BUILTIN_GET_FPSR64:
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emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, DImode, target));
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return target;
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case AARCH64_BUILTIN_SET_FPSR64:
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aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, DImode, exp);
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return target;
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case AARCH64_PAUTH_BUILTIN_AUTIA1716:
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case AARCH64_PAUTH_BUILTIN_PACIA1716:
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case AARCH64_PAUTH_BUILTIN_AUTIB1716:
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@ -7230,37 +7230,21 @@
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[(set_attr "length" "12")
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(set_attr "type" "multiple")])
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;; Write Floating-point Control Register.
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(define_insn "set_fpcr"
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[(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_SET_FPCR)]
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;; Write into the Floating-point Status or Control Register.
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(define_insn "@aarch64_set_<fpscr_name><GPI:mode>"
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[(unspec_volatile [(match_operand:GPI 0 "register_operand" "r")] SET_FPSCR)]
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""
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"msr\\tfpcr, %0"
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"msr\\t<fpscr_name>, %0"
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[(set_attr "type" "mrs")])
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;; Read Floating-point Control Register.
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(define_insn "get_fpcr"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(unspec_volatile:SI [(const_int 0)] UNSPECV_GET_FPCR))]
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;; Read into the Floating-point Status or Control Register.
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(define_insn "@aarch64_get_<fpscr_name><GPI:mode>"
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[(set (match_operand:GPI 0 "register_operand" "=r")
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(unspec_volatile:GPI [(const_int 0)] GET_FPSCR))]
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""
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"mrs\\t%0, fpcr"
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"mrs\\t%0, <fpscr_name>"
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[(set_attr "type" "mrs")])
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;; Write Floating-point Status Register.
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(define_insn "set_fpsr"
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[(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_SET_FPSR)]
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""
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"msr\\tfpsr, %0"
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[(set_attr "type" "mrs")])
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;; Read Floating-point Status Register.
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(define_insn "get_fpsr"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(unspec_volatile:SI [(const_int 0)] UNSPECV_GET_FPSR))]
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""
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"mrs\\t%0, fpsr"
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[(set_attr "type" "mrs")])
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;; Define the subtract-one-and-jump insns so loop.c
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;; knows what to generate.
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(define_expand "doloop_end"
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@ -3453,3 +3453,17 @@
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(define_int_attr unspec [(UNSPEC_WHILERW "UNSPEC_WHILERW")
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(UNSPEC_WHILEWR "UNSPEC_WHILEWR")])
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;; Iterators and attributes for fpcr fpsr getter setters
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(define_int_iterator GET_FPSCR
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[UNSPECV_GET_FPSR UNSPECV_GET_FPCR])
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(define_int_iterator SET_FPSCR
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[UNSPECV_SET_FPSR UNSPECV_SET_FPCR])
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(define_int_attr fpscr_name
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[(UNSPECV_GET_FPSR "fpsr")
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(UNSPECV_SET_FPSR "fpsr")
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(UNSPECV_GET_FPCR "fpcr")
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(UNSPECV_SET_FPCR "fpcr")])
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@ -13881,6 +13881,11 @@ unsigned int __builtin_aarch64_get_fpcr ()
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void __builtin_aarch64_set_fpcr (unsigned int)
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unsigned int __builtin_aarch64_get_fpsr ()
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void __builtin_aarch64_set_fpsr (unsigned int)
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unsigned long long __builtin_aarch64_get_fpcr64 ()
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void __builtin_aarch64_set_fpcr64 (unsigned long long)
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unsigned long long __builtin_aarch64_get_fpsr64 ()
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void __builtin_aarch64_set_fpsr64 (unsigned long long)
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@end smallexample
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@node Alpha Built-in Functions
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10
gcc/testsuite/gcc.target/aarch64/get_fpcr64_1.c
Normal file
10
gcc/testsuite/gcc.target/aarch64/get_fpcr64_1.c
Normal file
@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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long long unsigned
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get_fpcr64 ()
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{
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return __builtin_aarch64_get_fpcr64 ();
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}
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/* { dg-final { scan-assembler-times {\tmrs\tx0, fpcr\n} 1 } } */
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10
gcc/testsuite/gcc.target/aarch64/get_fpsr64_1.c
Normal file
10
gcc/testsuite/gcc.target/aarch64/get_fpsr64_1.c
Normal file
@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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long long unsigned
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get_fpsr64 ()
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{
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return __builtin_aarch64_get_fpsr64 ();
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}
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/* { dg-final { scan-assembler-times {\tmrs\tx0, fpsr\n} 1 } } */
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10
gcc/testsuite/gcc.target/aarch64/set_fpcr64_1.c
Normal file
10
gcc/testsuite/gcc.target/aarch64/set_fpcr64_1.c
Normal file
@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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void
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set_fpcr64 (long long unsigned x)
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{
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return __builtin_aarch64_set_fpcr64 (x);
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}
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/* { dg-final { scan-assembler-times {\tmsr\tfpcr, x0\n} 1 } } */
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10
gcc/testsuite/gcc.target/aarch64/set_fpsr64_1.c
Normal file
10
gcc/testsuite/gcc.target/aarch64/set_fpsr64_1.c
Normal file
@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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void
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set_fpsr64 (long long unsigned x)
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{
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return __builtin_aarch64_set_fpsr64 (x);
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}
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/* { dg-final { scan-assembler-times {\tmsr\tfpsr, x0\n} 1 } } */
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