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m68hc11.md ("*addhi3_68hc12"): Accept any constant when adding to X and Y since leax/leay are fast. 

* config/m68hc11/m68hc11.md ("*addhi3_68hc12"): Accept any constant
	when adding to X and Y since leax/leay are fast.
	("*addhi3"): Accept 'I' constraint when adding to address register.
	("rotlhi3"): Operand 1 must be a register_operand.
	(peephole2): New peephole to optimize some adds.
	* config/m68hc11/m68hc11.h (CONST_OK_FOR_LETTER_P): Use 'I' constraint
	to represent -2 .. 2 small integer range.

From-SVN: r64127
This commit is contained in:
Stephane Carrez 2003-03-10 22:51:02 +01:00 committed by Stephane Carrez
parent ae5b570e57
commit 0e01d661aa
3 changed files with 40 additions and 6 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2003-03-10 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11.md ("*addhi3_68hc12"): Accept any constant
when adding to X and Y since leax/leay are fast.
("*addhi3"): Accept 'I' constraint when adding to address register.
("rotlhi3"): Operand 1 must be a register_operand.
(peephole2): New peephole to optimize some adds.
* config/m68hc11/m68hc11.h (CONST_OK_FOR_LETTER_P): Use 'I' constraint
to represent -2 .. 2 small integer range.
2003-03-10 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11.c (m68hc11_gen_rotate): Set carry before

1
gcc/config/m68hc11/m68hc11.h
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@ -856,6 +856,7 @@ extern enum reg_class m68hc11_tmp_regs_class;
(C) == 'L' ? ((VALUE) >= -65536 && (VALUE) <= 65535) : \
(C) == 'M' ? ((VALUE) & 0x0ffffL) == 0 : \
(C) == 'N' ? ((VALUE) == 1 || (VALUE) == -1) : \
(C) == 'I' ? ((VALUE) >= -2 && (VALUE) <= 2) : \
(C) == 'O' ? (VALUE) == 16 : \
(C) == 'P' ? ((VALUE) <= 2 && (VALUE) >= -8) : 0)

35
gcc/config/m68hc11/m68hc11.md
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@ -2089,9 +2089,9 @@
}")
(define_insn "*addhi3_68hc12"
[(set (match_operand:HI 0 "register_operand" "=xy,d,xy*z*w,xy*z*w,xy*z")
[(set (match_operand:HI 0 "register_operand" "=xyd,d,xy*z*w,xy*z*w,xy*z")
(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,xy*zw,0")
(match_operand:HI 2 "general_operand" "N,im*A*wu,id,id,!mu*A")))]
(match_operand:HI 2 "general_operand" "i,m*A*wu,id,id,!mu*A")))]
"TARGET_M6812"
"*
{
@ -2278,9 +2278,9 @@
}")
(define_insn "*addhi3"
[(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d*A")
(plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0")
(match_operand:HI 2 "general_operand" "N,i,I,mi*A*d,!u*d*w")))]
[(set (match_operand:HI 0 "hard_reg_operand" "=A,dA,d,!A,d*A,!d*A")
(plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0,0")
(match_operand:HI 2 "general_operand" "N,I,i,I,mi*A*d,!u*d*w")))]
"TARGET_M6811"
"*
{
@ -5812,7 +5812,7 @@
(define_expand "rotlhi3"
[(set (match_operand:HI 0 "register_operand" "")
(rotate:HI (match_operand:HI 1 "general_operand" "")
(rotate:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "general_operand" "")))]
""
"
@ -6783,6 +6783,29 @@
(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 2))]
"")
;;
;; Replace a "ldd <mem>; addd #N; std <mem>" into a
;; "ldx <mem>; leax; stx <mem>" if we have a free X/Y register
;; and the constant is small.
;;
(define_peephole2
[(set (match_operand:HI 0 "hard_reg_operand" "")
(match_operand:HI 1 "general_operand" ""))
(set (match_dup 0) (plus:HI (match_dup 0)
(match_operand:HI 2 "const_int_operand" "")))
(set (match_operand:HI 3 "nonimmediate_operand" "")
(match_dup 0))
(match_scratch:HI 4 "xy")]
"D_REG_P (operands[0])
&& (TARGET_M6812
|| (INTVAL (operands[2]) >= -2 && INTVAL (operands[2]) <= 2))
&& peep2_reg_dead_p (3, operands[0])"
[(set (match_dup 4) (match_dup 1))
(set (match_dup 4) (plus:HI (match_dup 4) (match_dup 2)))
(set (match_dup 3) (match_dup 4))]
"if (reg_mentioned_p (operands[4], operands[1])) FAIL;
if (reg_mentioned_p (operands[4], operands[3])) FAIL;")
;;
;; This peephole catches the address computations generated by the reload
;; pass.