From 0e0642aa7a3f3d3da6a8cd7d323985b5861ff685 Mon Sep 17 00:00:00 2001 From: Rask Ingemann Lambertsen Date: Wed, 20 Jun 2007 19:57:32 +0000 Subject: [PATCH] re PR target/32335 (libgcc build failure, ICE in cselib_record_set, at cselib.c:1508) 2007-06-20 Rask Ingemann Lambertsen PR target/32335 * config/m32c/m32c.c (m32c_emit_epilogue): Use new HImode epilogue for TARGET_A16. * config/m32c/prologue.md (epilogue_exitd_16): New. (epilogue_reit_16): New. (epilogue_exitd): Rename to epilogue_exitd_24. (epilogue_reit): Rename to epilogue_reit_24. From-SVN: r125892 --- gcc/config/m32c/m32c.c | 9 +++++-- gcc/config/m32c/prologue.md | 48 +++++++++++++++++++++++++++---------- 2 files changed, 43 insertions(+), 14 deletions(-) diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index 097c3a3a83d..161d5edd282 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -4026,12 +4026,17 @@ m32c_emit_epilogue (void) else emit_insn (gen_poppsi (gen_rtx_REG (PSImode, FP_REGNO))); emit_insn (gen_popm (GEN_INT (cfun->machine->intr_pushm))); - emit_jump_insn (gen_epilogue_reit (GEN_INT (TARGET_A16 ? 4 : 6))); + if (TARGET_A16) + emit_jump_insn (gen_epilogue_reit_16 ()); + else + emit_jump_insn (gen_epilogue_reit_24 ()); } else if (cfun->machine->use_rts) emit_jump_insn (gen_epilogue_rts ()); + else if (TARGET_A16) + emit_jump_insn (gen_epilogue_exitd_16 ()); else - emit_jump_insn (gen_epilogue_exitd (GEN_INT (TARGET_A16 ? 2 : 4))); + emit_jump_insn (gen_epilogue_exitd_24 ()); emit_barrier (); } diff --git a/gcc/config/m32c/prologue.md b/gcc/config/m32c/prologue.md index 81d35a1c965..23a38f0a228 100644 --- a/gcc/config/m32c/prologue.md +++ b/gcc/config/m32c/prologue.md @@ -102,26 +102,50 @@ [(set_attr "flags" "x")] ) -(define_insn "epilogue_exitd" - [(set (reg:PSI SP_REGNO) - (plus:PSI (reg:PSI FB_REGNO) - (match_operand 0 "const_int_operand" "i"))) - (set (reg:PSI FB_REGNO) - (mem:PSI (reg:PSI FB_REGNO))) +(define_insn "epilogue_exitd_16" + [(set (reg:HI SP_REGNO) + (plus:HI (reg:HI FB_REGNO) + (const_int 2))) + (set (reg:HI FB_REGNO) + (mem:HI (reg:HI FB_REGNO))) (return) ] - "" + "TARGET_A16" "exitd" [(set_attr "flags" "x")] ) -(define_insn "epilogue_reit" - [(set (reg:PSI SP_REGNO) - (plus:PSI (reg:PSI SP_REGNO) - (match_operand 0 "const_int_operand" "i"))) +(define_insn "epilogue_reit_16" + [(set (reg:HI SP_REGNO) + (plus:HI (reg:HI SP_REGNO) + (const_int 4))) (return) ] - "" + "TARGET_A16" + "reit" + [(set_attr "flags" "x")] + ) + +(define_insn "epilogue_exitd_24" + [(set (reg:PSI SP_REGNO) + (plus:PSI (reg:PSI FB_REGNO) + (const_int 4))) + (set (reg:PSI FB_REGNO) + (mem:PSI (reg:PSI FB_REGNO))) + (return) + ] + "TARGET_A24" + "exitd" + [(set_attr "flags" "x")] + ) + +(define_insn "epilogue_reit_24" + [(set (reg:PSI SP_REGNO) + (plus:PSI (reg:PSI SP_REGNO) + (const_int 6))) + (return) + ] + "TARGET_A24" "reit" [(set_attr "flags" "x")] )