diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 84e25db0b2c..04024683b7a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,26 @@ +2005-03-14 Uros Bizjak + + PR target/17688 + * config/i386/i386.c (x86_use_himode_fiop): New. + (x86_use_simode_fiop): Rename from x86_use_fiop. + * config/i386/i386.h (x86_use_himode_fiop): Declare. + (TARGET_USE_HIMODE_FIOP): New. + (x86_use_simode_fiop): Rename from x86_use_fiop. + (TARGET_USE_SIMODE_FIOP): Rename from TARGET_USE_FIOP. + + * config/i386/i386.md (X87MODEI12): New mode macro define. + (*cmpfp_): Rename from *cmpfp_si. Use X87MODEI12 mode macro + to implement x87 FP compare with HImode input operands. + (*fp_jcc_8_387, splitter): Rename from *fp_jcc_8_387. + Use X87MODEI12 mode macro to handle HImode input operands. + (*fop_sf_2_i387, *fop_sf_3_i387, *fop_df_2_i387, + *fop_df_3_i387, *fop_xf_2_i387, *fop_xf_3_i387): + Renamed from *fop_sf_2_i387, *fop_sf_3_i387, *fop_df_2_i387, + *fop_df_3_i387, *fop_xf_2_i387, *fop_xf_3_i387. Use X87MODEI12 mode + macro to implement x87 operators with HImode input operands. + (fop splitters): Use X87MODEI12 mode macro to handle HImode + input operands. + 2005-03-14 Zdenek Dvorak * tree-cfg.c (find_taken_edge_cond_expr): Use zero_p instead of diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7ca47ed2f4b..bc311aaf23a 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -535,7 +535,8 @@ const int x86_branch_hints = 0; const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4 | m_NOCONA; const int x86_partial_reg_stall = m_PPRO; const int x86_use_loop = m_K6; -const int x86_use_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT); +const int x86_use_himode_fiop = m_386 | m_486 | m_K6; +const int x86_use_simode_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT); const int x86_use_mov0 = m_K6; const int x86_use_cltd = ~(m_PENT | m_K6); const int x86_read_modify_write = ~m_PENT; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 5c2046a49d7..d5b8c82b9c9 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -232,8 +232,8 @@ extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; extern const int x86_use_bit_test, x86_cmove, x86_deep_branch; extern const int x86_branch_hints, x86_unroll_strlen; extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; -extern const int x86_use_loop, x86_use_fiop, x86_use_mov0; -extern const int x86_use_cltd, x86_read_modify_write; +extern const int x86_use_loop, x86_use_himode_fiop, x86_use_simode_fiop; +extern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write; extern const int x86_read_modify, x86_split_long_moves; extern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix; extern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs; @@ -265,7 +265,8 @@ extern int x86_prefetch_sse; #define TARGET_MOVX (x86_movx & TUNEMASK) #define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK) #define TARGET_USE_LOOP (x86_use_loop & TUNEMASK) -#define TARGET_USE_FIOP (x86_use_fiop & TUNEMASK) +#define TARGET_USE_HIMODE_FIOP (x86_use_himode_fiop & TUNEMASK) +#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK) #define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK) #define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK) #define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d9a4ce599ed..61904db4b58 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -441,6 +441,9 @@ (define_asm_attributes [(set_attr "length" "128") (set_attr "type" "multi")]) + +;; All integer modes handled by integer x87 operators. +(define_mode_macro X87MODEI12 [HI SI]) ;; Scheduling descriptions @@ -895,21 +898,21 @@ ] (const_string "XF")))]) -(define_insn "*cmpfp_si" +(define_insn "*cmpfp_" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI [(compare:CCFP (match_operand 1 "register_operand" "f") (match_operator 3 "float_operator" - [(match_operand:SI 2 "memory_operand" "m")]))] + [(match_operand:X87MODEI12 2 "memory_operand" "m")]))] UNSPEC_FNSTSW))] - "TARGET_80387 && TARGET_USE_FIOP + "TARGET_80387 && TARGET_USE_MODE_FIOP && FLOAT_MODE_P (GET_MODE (operands[1])) && (GET_MODE (operands [3]) == GET_MODE (operands[1]))" "* return output_fp_compare (insn, operands, 0, 0);" [(set_attr "type" "multi") (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) ;; FP compares, step 2 ;; Move the fpsw to ax. @@ -12956,23 +12959,23 @@ && ix86_fp_jump_nontrivial_p (GET_CODE (operands[0]))" "#") -;; The order of operands in *fp_jcc_8 is forced by combine in +;; The order of operands in *fp_jcc_8_387 is forced by combine in ;; simplify_comparison () function. Float operator is treated as RTX_OBJ ;; with a precedence over other operators and is always put in the first ;; place. Swap condition and operands to match ficom instruction. -(define_insn "*fp_jcc_8_387" +(define_insn "*fp_jcc_8_387" [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operator 1 "float_operator" - [(match_operand:SI 2 "nonimmediate_operand" "m,?r")]) + [(match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r")]) (match_operand 3 "register_operand" "f,f")]) (label_ref (match_operand 4 "" "")) (pc))) (clobber (reg:CCFP FPSR_REG)) (clobber (reg:CCFP FLAGS_REG)) (clobber (match_scratch:HI 5 "=a,a"))] - "TARGET_80387 && TARGET_USE_FIOP + "TARGET_80387 && TARGET_USE_MODE_FIOP && FLOAT_MODE_P (GET_MODE (operands[3])) && GET_MODE (operands[1]) == GET_MODE (operands[3]) && !ix86_use_fcomi_compare (swap_condition (GET_CODE (operands[0]))) @@ -13019,7 +13022,7 @@ [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operator 1 "float_operator" - [(match_operand:SI 2 "memory_operand" "")]) + [(match_operand:X87MODEI12 2 "memory_operand" "")]) (match_operand 3 "register_operand" "")]) (match_operand 4 "" "") (match_operand 5 "" ""))) @@ -13041,7 +13044,7 @@ [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operator 1 "float_operator" - [(match_operand:SI 2 "register_operand" "")]) + [(match_operand:X87MODEI12 2 "register_operand" "")]) (match_operand 3 "register_operand" "")]) (match_operand 4 "" "") (match_operand 5 "" ""))) @@ -14180,14 +14183,13 @@ (const_string "fop"))) (set_attr "mode" "SF")]) - ;; ??? Add SSE splitters for these! -(define_insn "*fop_sf_2_i387" +(define_insn "*fop_sf_2_i387" [(set (match_operand:SF 0 "register_operand" "=f,f") (match_operator:SF 3 "binary_fp_operator" - [(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,?r")) + [(float:SF (match_operand:X87MODEI12 1 "nonimmediate_operand" "m,?r")) (match_operand:SF 2 "register_operand" "0,0")]))] - "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE_MATH" + "TARGET_80387 && TARGET_USE_MODE_FIOP && !TARGET_SSE_MATH" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:SF 3 "mult_operator" "") @@ -14197,14 +14199,14 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) -(define_insn "*fop_sf_3_i387" +(define_insn "*fop_sf_3_i387" [(set (match_operand:SF 0 "register_operand" "=f,f") (match_operator:SF 3 "binary_fp_operator" [(match_operand:SF 1 "register_operand" "0,0") - (float:SF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))] - "TARGET_80387 && TARGET_USE_FIOP && !TARGET_SSE_MATH" + (float:SF (match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r"))]))] + "TARGET_80387 && TARGET_USE_MODE_FIOP && !TARGET_SSE_MATH" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:SF 3 "mult_operator" "") @@ -14214,7 +14216,7 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) (define_insn "*fop_df_comm_mixed" [(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f") @@ -14328,12 +14330,13 @@ (set_attr "mode" "DF")]) ;; ??? Add SSE splitters for these! -(define_insn "*fop_df_2_i387" +(define_insn "*fop_df_2_i387" [(set (match_operand:DF 0 "register_operand" "=f,f") (match_operator:DF 3 "binary_fp_operator" - [(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,?r")) + [(float:DF (match_operand:X87MODEI12 1 "nonimmediate_operand" "m,?r")) (match_operand:DF 2 "register_operand" "0,0")]))] - "TARGET_80387 && TARGET_USE_FIOP && !(TARGET_SSE2 && TARGET_SSE_MATH)" + "TARGET_80387 && TARGET_USE_MODE_FIOP + && !(TARGET_SSE2 && TARGET_SSE_MATH)" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:DF 3 "mult_operator" "") @@ -14343,14 +14346,15 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) -(define_insn "*fop_df_3_i387" +(define_insn "*fop_df_3_i387" [(set (match_operand:DF 0 "register_operand" "=f,f") (match_operator:DF 3 "binary_fp_operator" [(match_operand:DF 1 "register_operand" "0,0") - (float:DF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))] - "TARGET_80387 && TARGET_USE_FIOP && !(TARGET_SSE2 && TARGET_SSE_MATH)" + (float:DF (match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r"))]))] + "TARGET_80387 && TARGET_USE_MODE_FIOP + && !(TARGET_SSE2 && TARGET_SSE_MATH)" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:DF 3 "mult_operator" "") @@ -14360,7 +14364,7 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) (define_insn "*fop_df_4_i387" [(set (match_operand:DF 0 "register_operand" "=f,f") @@ -14445,12 +14449,12 @@ (const_string "fop"))) (set_attr "mode" "XF")]) -(define_insn "*fop_xf_2_i387" +(define_insn "*fop_xf_2_i387" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" - [(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,?r")) + [(float:XF (match_operand:X87MODEI12 1 "nonimmediate_operand" "m,?r")) (match_operand:XF 2 "register_operand" "0,0")]))] - "TARGET_80387 && TARGET_USE_FIOP" + "TARGET_80387 && TARGET_USE_MODE_FIOP" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:XF 3 "mult_operator" "") @@ -14460,14 +14464,14 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) -(define_insn "*fop_xf_3_i387" +(define_insn "*fop_xf_3_i387" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" [(match_operand:XF 1 "register_operand" "0,0") - (float:XF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))] - "TARGET_80387 && TARGET_USE_FIOP" + (float:XF (match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r"))]))] + "TARGET_80387 && TARGET_USE_MODE_FIOP" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:XF 3 "mult_operator" "") @@ -14477,7 +14481,7 @@ ] (const_string "fop"))) (set_attr "fp_int_src" "true") - (set_attr "mode" "SI")]) + (set_attr "mode" "")]) (define_insn "*fop_xf_4_i387" [(set (match_operand:XF 0 "register_operand" "=f,f") @@ -14533,7 +14537,7 @@ (define_split [(set (match_operand 0 "register_operand" "") (match_operator 3 "binary_fp_operator" - [(float (match_operand:SI 1 "register_operand" "")) + [(float (match_operand:X87MODEI12 1 "register_operand" "")) (match_operand 2 "register_operand" "")]))] "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" @@ -14554,7 +14558,7 @@ [(set (match_operand 0 "register_operand" "") (match_operator 3 "binary_fp_operator" [(match_operand 1 "register_operand" "") - (float (match_operand:SI 2 "register_operand" ""))]))] + (float (match_operand:X87MODEI12 2 "register_operand" ""))]))] "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" [(const_int 0)]