From 0f40f9f7c68aadde4d52b4fc04d016b72451d238 Mon Sep 17 00:00:00 2001 From: Zack Weinberg Date: Thu, 28 Jun 2001 21:50:09 +0000 Subject: [PATCH] i386.md: Global update to use new string syntax where it will improve readability. * config/i386/i386.md: Global update to use new string syntax where it will improve readability. Warning fixes: (*truncdfsf2_2): Abort if which_alternative is not 0 or 1. (*adddi_1_rex64, *adddi_2_rex64, *adddi_3_rex64, *adddi_4_rex64, *adddi_5_rex64): Cast 1 to unsigned int. * read-rtl.c: Syntactic sugar for C embedded in strings in machine descriptions. (read_string): Break inner loop into separate function. Takes an int. Dispatch to read_quoted_string or read_braced_string as appropriate. Automatically insert a leading star on braced strings if STAR_IF_BRACED is true. (read_quoted_string, read_braced_string): New functions. * doc/rtl.texi, doc/md.texi: Document new syntax. Update examples to match. * rtl.c: Split RTL reader (read_rtx, read_skip_spaces, traverse_md_constants, fatal_with_file_and_line, fatal_expected_char, read_name, read_string, def_hash, def_name_eq_p, read_constants, and related data) to its own file. Weed out now-unnecessary #includes. * read-rtl.c: New file. * Makefile.in (HOST_RTL): Add read-rtl.o. (read-rtl.o): New rule. (rtl.o, $(HOST_PREFIX_1)rtl.o): Update dependencies. * doc/gcc.texi (Passes): Talk briefly about the support library used by genfoo. * doc/rtl.texi (Reading RTL): read_rtx is not available in the compiler itself. From-SVN: r43646 --- gcc/ChangeLog | 40 +- gcc/Makefile.in | 11 +- gcc/config/i386/i386.md | 2619 ++++++++++++++++++--------------------- gcc/doc/gcc.texi | 4 + gcc/doc/md.texi | 53 +- gcc/doc/rtl.texi | 24 +- gcc/read-rtl.c | 727 +++++++++++ gcc/rtl.c | 616 +-------- 8 files changed, 2036 insertions(+), 2058 deletions(-) create mode 100644 gcc/read-rtl.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1bbb00e67bc..6b7ac2938f1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,35 @@ +2001-06-28 Zack Weinberg + + * config/i386/i386.md: Global update to use new string syntax + where it will improve readability. Warning fixes: + (*truncdfsf2_2): Abort if which_alternative is not 0 or 1. + (*adddi_1_rex64, *adddi_2_rex64, *adddi_3_rex64, + *adddi_4_rex64, *adddi_5_rex64): Cast 1 to unsigned int. + + * read-rtl.c: Syntactic sugar for C embedded in strings in + machine descriptions. + (read_string): Break inner loop into separate function. Takes + an int. Dispatch to read_quoted_string or read_braced_string + as appropriate. Automatically insert a leading star on braced + strings if STAR_IF_BRACED is true. + (read_quoted_string, read_braced_string): New functions. + * doc/rtl.texi, doc/md.texi: Document new syntax. Update + examples to match. + + * rtl.c: Split RTL reader (read_rtx, read_skip_spaces, + traverse_md_constants, fatal_with_file_and_line, + fatal_expected_char, read_name, read_string, def_hash, + def_name_eq_p, read_constants, and related data) to its own + file. Weed out now-unnecessary #includes. + * read-rtl.c: New file. + * Makefile.in (HOST_RTL): Add read-rtl.o. + (read-rtl.o): New rule. + (rtl.o, $(HOST_PREFIX_1)rtl.o): Update dependencies. + * doc/gcc.texi (Passes): Talk briefly about the support + library used by genfoo. + * doc/rtl.texi (Reading RTL): read_rtx is not available in the + compiler itself. + 2001-06-28 Stan Shebs * config/darwin.h (REGISTER_TARGET_PRAGMAS): Define. @@ -121,7 +153,7 @@ Wed Jun 27 18:01:09 2001 Jeffrey A Law (law@cygnus.com) . at end of sentences preceded by a capital letter with @.. 2001-06-26 Daniel Berlin - + * doc/invoke.texi: Add description of max-gcse-passes param. * gcse.c (gcse_main): Use MAX_GCSE_PASSES instead of MAX_PASSES. @@ -439,7 +471,7 @@ Tue Jun 26 12:40:12 CEST 2001 Jan Hubicka * config/ia64/quadlib.c: New. * config/ia64/t-hpux: New. * config/i386/i386.h (INTEL_EXTENDED_IEEE_FORMAT): Define to one. - + 2001-06-25 Jim Wilson * config/i960/t-960bare (i960-c.o): Add missing header dependencies. @@ -734,7 +766,7 @@ Thu Jun 21 22:15:10 2001 J"orn Rennecke 2001-06-21 DJ Delorie * integrate.c (mark_hard_reg_initial_vals): Check for NULL. - + * integrate.c (ggc.h): Include. (initial_value_pair, initial_value_struct, setup_initial_hard_reg_value_integration): Add prototypes. @@ -796,7 +828,7 @@ Wed Jun 20 08:35:02 2001 Jeffrey A Law (law@cygnus.com) * ssa.c (rename_block): Update parameter to remove_phi_alternative (convert_from_ssa): Do create REG_DEAD and REG_UNUSED notes when - re-running life analysis. + re-running life analysis. 2001-06-20 Stan Shebs diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 62d90591d57..7534235083d 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -633,7 +633,7 @@ LIBS = $(OBSTACK) $(INTLLIBS) @LIBS@ $(VFPRINTF) $(DOPRINT) \ HOST_LIBS = $(USE_HOST_OBSTACK) $(USE_HOST_VFPRINTF) \ $(USE_HOST_DOPRINT) $(USE_HOST_STRSTR) -HOST_RTL = $(HOST_PREFIX)rtl.o $(HOST_PREFIX)bitmap.o \ +HOST_RTL = $(HOST_PREFIX)rtl.o read-rtl.o $(HOST_PREFIX)bitmap.o \ $(HOST_PREFIX)ggc-none.o gensupport.o hashtab.o safe-ctype.o HOST_PRINT = $(HOST_PREFIX)print-rtl.o @@ -1344,12 +1344,13 @@ toplev.o : toplev.c $(CONFIG_H) $(SYSTEM_H) $(TREE_H) $(RTL_H) function.h \ -c $(srcdir)/toplev.c main.o : main.c toplev.h -rtl.o : rtl.c $(GCONFIG_H) $(SYSTEM_H) $(RTL_H) bitmap.h $(GGC_H) toplev.h +rtl.o : rtl.c $(GCONFIG_H) $(SYSTEM_H) $(RTL_H) real.h $(GGC_H) $(CC) -c $(ALL_CFLAGS) -DGENERATOR_FILE $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) print-rtl.o : print-rtl.c $(GCONFIG_H) $(SYSTEM_H) $(RTL_H) hard-reg-set.h \ $(BASIC_BLOCK_H) $(CC) -c $(ALL_CFLAGS) -DGENERATOR_FILE $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + rtlanal.o : rtlanal.c $(CONFIG_H) $(SYSTEM_H) toplev.h $(RTL_H) hard-reg-set.h errors.o : errors.c $(GCONFIG_H) $(SYSTEM_H) errors.h $(CC) -c $(ALL_CFLAGS) -DGENERATOR_FILE $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) @@ -1704,6 +1705,10 @@ s-genrtl: gengenrtl$(build_exeext) $(srcdir)/move-if-change $(RTL_BASE_H) # about the target machine. They do depend on config.h itself, # since that describes the host machine. +read-rtl.o: read-rtl.c $(HCONFIG_H) $(SYSTEM_H) $(RTL_H) \ + $(OBSTACK_H) $(HASHTAB_H) + $(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(srcdir)/read-rtl.c + gensupport.o: gensupport.c $(RTL_H) $(OBSTACK_H) $(SYSTEM_H) errors.h gensupport.h $(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(srcdir)/gensupport.c @@ -1814,7 +1819,7 @@ gengenrtl.o : gengenrtl.c $(RTL_BASE_H) $(HCONFIG_H) $(SYSTEM_H) real.h # and HOST_PREFIX_1 is `foobar', just to ensure these rules don't conflict # with the rules for rtl.o, etc. $(HOST_PREFIX_1)rtl.o: $(srcdir)/rtl.c $(HCONFIG_H) $(SYSTEM_H) $(RTL_H) \ - bitmap.h $(GGC_H) toplev.h $(HASHTAB_H) + $(GGC_H) rm -f $(HOST_PREFIX)rtl.c sed -e 's/config[.]h/hconfig.h/' $(srcdir)/rtl.c > $(HOST_PREFIX)rtl.c $(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(HOST_PREFIX)rtl.c diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 713981a3c68..e788849a1e0 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1006,56 +1006,52 @@ (compare:CC (match_operand:DI 0 "nonimmediate_operand" "") (match_operand:DI 1 "x86_64_general_operand" "")))] "" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[0] = force_reg (DImode, operands[0]); ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpsi" [(set (reg:CC 17) (compare:CC (match_operand:SI 0 "cmpsi_operand" "") (match_operand:SI 1 "general_operand" "")))] "" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[0] = force_reg (SImode, operands[0]); ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmphi" [(set (reg:CC 17) (compare:CC (match_operand:HI 0 "nonimmediate_operand" "") (match_operand:HI 1 "general_operand" "")))] "" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[0] = force_reg (HImode, operands[0]); ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpqi" [(set (reg:CC 17) (compare:CC (match_operand:QI 0 "nonimmediate_operand" "") (match_operand:QI 1 "general_operand" "")))] "TARGET_QIMODE_MATH" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[0] = force_reg (QImode, operands[0]); ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_insn "cmpdi_ccno_1_rex64" [(set (reg 17) @@ -1063,8 +1059,8 @@ (match_operand:DI 1 "const0_operand" "n,n")))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" "@ - test{q}\\t{%0, %0|%0, %0} - cmp{q}\\t{%1, %0|%0, %1}" + test{q}\t{%0, %0|%0, %0} + cmp{q}\t{%1, %0|%0, %1}" [(set_attr "type" "test,icmp") (set_attr "length_immediate" "0,1") (set_attr "mode" "DI")]) @@ -1075,7 +1071,7 @@ (match_operand:DI 1 "x86_64_general_operand" "re,mr")) (const_int 0)))] "ix86_match_ccmode (insn, CCGOCmode)" - "cmp{q}\\t{%1, %0|%0, %1}" + "cmp{q}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "DI")]) @@ -1091,7 +1087,7 @@ (compare (match_operand:DI 0 "nonimmediate_operand" "mr,r") (match_operand:DI 1 "x86_64_general_operand" "re,mr")))] "TARGET_64BIT && ix86_match_ccmode (insn, CCmode)" - "cmp{q}\\t{%1, %0|%0, %1}" + "cmp{q}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "DI")]) @@ -1102,8 +1098,8 @@ (match_operand:SI 1 "const0_operand" "n,n")))] "ix86_match_ccmode (insn, CCNOmode)" "@ - test{l}\\t{%0, %0|%0, %0} - cmp{l}\\t{%1, %0|%0, %1}" + test{l}\t{%0, %0|%0, %0} + cmp{l}\t{%1, %0|%0, %1}" [(set_attr "type" "test,icmp") (set_attr "length_immediate" "0,1") (set_attr "mode" "SI")]) @@ -1114,7 +1110,7 @@ (match_operand:SI 1 "general_operand" "ri,mr")) (const_int 0)))] "ix86_match_ccmode (insn, CCGOCmode)" - "cmp{l}\\t{%1, %0|%0, %1}" + "cmp{l}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "SI")]) @@ -1131,7 +1127,7 @@ (match_operand:SI 1 "general_operand" "ri,mr")))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) && ix86_match_ccmode (insn, CCmode)" - "cmp{l}\\t{%1, %0|%0, %1}" + "cmp{l}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "SI")]) @@ -1141,8 +1137,8 @@ (match_operand:HI 1 "const0_operand" "n,n")))] "ix86_match_ccmode (insn, CCNOmode)" "@ - test{w}\\t{%0, %0|%0, %0} - cmp{w}\\t{%1, %0|%0, %1}" + test{w}\t{%0, %0|%0, %0} + cmp{w}\t{%1, %0|%0, %1}" [(set_attr "type" "test,icmp") (set_attr "length_immediate" "0,1") (set_attr "mode" "HI")]) @@ -1153,7 +1149,7 @@ (match_operand:HI 1 "general_operand" "ri,mr")) (const_int 0)))] "ix86_match_ccmode (insn, CCGOCmode)" - "cmp{w}\\t{%1, %0|%0, %1}" + "cmp{w}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "HI")]) @@ -1163,7 +1159,7 @@ (match_operand:HI 1 "general_operand" "ri,mr")))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) && ix86_match_ccmode (insn, CCmode)" - "cmp{w}\\t{%1, %0|%0, %1}" + "cmp{w}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "HI")]) @@ -1173,8 +1169,8 @@ (match_operand:QI 1 "const0_operand" "n,n")))] "ix86_match_ccmode (insn, CCNOmode)" "@ - test{b}\\t{%0, %0|%0, %0} - cmp{b}\\t{$0, %0|%0, 0}" + test{b}\t{%0, %0|%0, %0} + cmp{b}\t{$0, %0|%0, 0}" [(set_attr "type" "test,icmp") (set_attr "length_immediate" "0,1") (set_attr "mode" "QI")]) @@ -1185,7 +1181,7 @@ (match_operand:QI 1 "general_operand" "qi,mq")))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) && ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%1, %0|%0, %1}" + "cmp{b}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1195,7 +1191,7 @@ (match_operand:QI 1 "general_operand" "qi,mq")) (const_int 0)))] "ix86_match_ccmode (insn, CCGOCmode)" - "cmp{b}\\t{%1, %0|%0, %1}" + "cmp{b}\t{%1, %0|%0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1209,7 +1205,7 @@ (const_int 8) (const_int 8)) 0)))] "!TARGET_64BIT && ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%h1, %0|%0, %h1}" + "cmp{b}\t{%h1, %0|%0, %h1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1223,7 +1219,7 @@ (const_int 8) (const_int 8)) 0)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%h1, %0|%0, %h1}" + "cmp{b}\t{%h1, %0|%0, %h1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1237,7 +1233,7 @@ (const_int 8)) 0) (match_operand:QI 1 "const0_operand" "n")))] "ix86_match_ccmode (insn, CCNOmode)" - "test{b}\\t%h0, %h0" + "test{b}\t%h0, %h0" [(set_attr "type" "test") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -1264,7 +1260,7 @@ (const_int 8)) 0) (match_operand:QI 1 "general_operand" "Qmn")))] "!TARGET_64BIT && ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%1, %h0|%h0, %1}" + "cmp{b}\t{%1, %h0|%h0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1278,7 +1274,7 @@ (const_int 8)) 0) (match_operand:QI 1 "nonmemory_operand" "Qn")))] "TARGET_64BIT && ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%1, %h0|%h0, %1}" + "cmp{b}\t{%1, %h0|%h0, %1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1296,7 +1292,7 @@ (const_int 8) (const_int 8)) 0)))] "ix86_match_ccmode (insn, CCmode)" - "cmp{b}\\t{%h1, %h0|%h0, %h1}" + "cmp{b}\t{%h1, %h0|%h0, %h1}" [(set_attr "type" "icmp") (set_attr "mode" "QI")]) @@ -1310,48 +1306,44 @@ (compare:CC (match_operand:XF 0 "cmp_fp_expander_operand" "") (match_operand:XF 1 "cmp_fp_expander_operand" "")))] "TARGET_80387 && !TARGET_64BIT" - " { ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmptf" [(set (reg:CC 17) (compare:CC (match_operand:TF 0 "cmp_fp_expander_operand" "") (match_operand:TF 1 "cmp_fp_expander_operand" "")))] "TARGET_80387" - " { ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpdf" [(set (reg:CC 17) (compare:CC (match_operand:DF 0 "cmp_fp_expander_operand" "") (match_operand:DF 1 "cmp_fp_expander_operand" "")))] "TARGET_80387 || TARGET_SSE2" - " { ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpsf" [(set (reg:CC 17) (compare:CC (match_operand:SF 0 "cmp_fp_expander_operand" "") (match_operand:SF 1 "cmp_fp_expander_operand" "")))] "TARGET_80387 || TARGET_SSE" - " { ix86_compare_op0 = operands[0]; ix86_compare_op1 = operands[1]; DONE; -}") +}) ;; FP compares, step 1: ;; Set the FP condition codes. @@ -1379,13 +1371,12 @@ "TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1])) && GET_MODE (operands[1]) == GET_MODE (operands[2])" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"ftst\;fnstsw\\t%0\;fstp\\t%y0\"; + return "ftst\;fnstsw\t%0\;fstp\t%y0"; else - return \"ftst\;fnstsw\\t%0\"; -}" + return "ftst\;fnstsw\t%0"; +} [(set_attr "type" "multi") (set_attr "mode" "unknownfp")]) @@ -1543,7 +1534,7 @@ [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI [(reg 18)] 9))] "TARGET_80387" - "fnstsw\\t%0" + "fnstsw\t%0" [(set_attr "length" "2") (set_attr "mode" "SI") (set_attr "i387" "1") @@ -1659,7 +1650,7 @@ [(set (match_operand:SI 0 "push_operand" "=<") (match_operand:SI 1 "general_no_elim_operand" "ri*m"))] "!TARGET_64BIT" - "push{l}\\t%1" + "push{l}\t%1" [(set_attr "type" "push") (set_attr "mode" "SI")]) @@ -1668,7 +1659,7 @@ [(set (match_operand:SI 0 "push_operand" "=X") (match_operand:SI 1 "nonmemory_no_elim_operand" "ri"))] "TARGET_64BIT" - "push{q}\\t%q1" + "push{q}\t%q1" [(set_attr "type" "push") (set_attr "mode" "SI")]) @@ -1677,7 +1668,7 @@ (match_operand:SI 1 "general_no_elim_operand" "ri*m")) (clobber (mem:BLK (scratch)))] "!TARGET_64BIT" - "push{l}\\t%1" + "push{l}\t%1" [(set_attr "type" "push") (set_attr "mode" "SI")]) @@ -1688,7 +1679,7 @@ (plus:SI (reg:SI 7) (const_int 4))) (clobber (mem:BLK (scratch)))] "!TARGET_64BIT" - "pop{l}\\t%0" + "pop{l}\t%0" [(set_attr "type" "pop") (set_attr "mode" "SI")]) @@ -1698,7 +1689,7 @@ (set (reg:SI 7) (plus:SI (reg:SI 7) (const_int 4)))] "!TARGET_64BIT" - "pop{l}\\t%0" + "pop{l}\t%0" [(set_attr "type" "pop") (set_attr "mode" "SI")]) @@ -1707,7 +1698,7 @@ (match_operand:SI 1 "const0_operand" "i")) (clobber (reg:CC 17))] "reload_completed && (!TARGET_USE_MOV0 || optimize_size)" - "xor{l}\\t{%0, %0|%0, %0}" + "xor{l}\t{%0, %0|%0, %0}" [(set_attr "type" "alu1") (set_attr "mode" "SI") (set_attr "length_immediate" "0")]) @@ -1719,11 +1710,10 @@ "reload_completed && GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == -1 && (TARGET_PENTIUM || optimize_size)" - "* { operands[1] = constm1_rtx; - return \"or{l}\\t{%1, %0|%0, %1}\"; -}" + return "or{l}\t{%1, %0|%0, %1}"; +} [(set_attr "type" "alu1") (set_attr "mode" "SI") (set_attr "length_immediate" "1")]) @@ -1732,27 +1722,26 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=*a,r,*a,m,!*y,!rm,!*Y,!rm,!*Y") (match_operand:SI 1 "general_operand" "im,rinm,rinm,rin,rm,*y,rm,*Y,*Y"))] "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM" - "* { switch (get_attr_type (insn)) { case TYPE_SSE: if (get_attr_mode (insn) == TImode) - return \"movdqa\\t{%1, %0|%0, %1}\"; - return \"movd\\t{%1, %0|%0, %1}\"; + return "movdqa\t{%1, %0|%0, %1}"; + return "movd\t{%1, %0|%0, %1}"; case TYPE_MMX: - return \"movd\\t{%1, %0|%0, %1}\"; + return "movd\t{%1, %0|%0, %1}"; case TYPE_LEA: - return \"lea{l}\\t{%1, %0|%0, %1}\"; + return "lea{l}\t{%1, %0|%0, %1}"; default: if (flag_pic && SYMBOLIC_CONST (operands[1])) abort(); - return \"mov{l}\\t{%1, %0|%0, %1}\"; + return "mov{l}\t{%1, %0|%0, %1}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "4,5") (const_string "mmx") @@ -1774,9 +1763,9 @@ (match_operand:SI 1 "nonmemory_operand" "a,er,i"))] "TARGET_64BIT" "@ - movabs{l}\\t{%1, %P0|%P0, %1} - mov{l}\\t{%1, %a0|%a0, %1} - movabs{l}\\t{%1, %a0|%a0, %1}" + movabs{l}\t{%1, %P0|%P0, %1} + mov{l}\t{%1, %a0|%a0, %1} + movabs{l}\t{%1, %a0|%a0, %1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*,*") (set_attr "length_address" "8,0,0") @@ -1789,8 +1778,8 @@ (mem:SI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))] "TARGET_64BIT" "@ - movabs{l}\\t{%P1, %0|%0, %P1} - mov{l}\\t{%a1, %0|%0, %a1}" + movabs{l}\t{%P1, %0|%0, %P1} + mov{l}\t{%a1, %0|%0, %a1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*") (set_attr "length_address" "8,0") @@ -1804,7 +1793,7 @@ (set (match_dup 1) (match_dup 0))] "" - "xchg{l}\\t%1, %0" + "xchg{l}\t%1, %0" [(set_attr "type" "imov") (set_attr "pent_pair" "np") (set_attr "athlon_decode" "vector") @@ -1823,8 +1812,8 @@ (match_operand:HI 1 "general_no_elim_operand" "n,r*m"))] "!TARGET_64BIT" "@ - push{w}\\t{|WORD PTR }%1 - push{w}\\t%1" + push{w}\t{|WORD PTR }%1 + push{w}\t%1" [(set_attr "type" "push") (set_attr "mode" "HI")]) @@ -1833,7 +1822,7 @@ [(set (match_operand:HI 0 "push_operand" "=X") (match_operand:HI 1 "nonmemory_no_elim_operand" "ri"))] "TARGET_64BIT" - "push{q}\\t%q1" + "push{q}\t%q1" [(set_attr "type" "push") (set_attr "mode" "QI")]) @@ -1841,21 +1830,20 @@ [(set (match_operand:HI 0 "nonimmediate_operand" "=*a,r,r,*a,r,m") (match_operand:HI 1 "general_operand" "i,r,rn,rm,rm,rn"))] "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: /* movzwl is faster than movw on p2 due to partial word stalls, though not as fast as an aligned movl. */ - return \"movz{wl|x}\\t{%1, %k0|%k0, %1}\"; + return "movz{wl|x}\t{%1, %k0|%k0, %1}"; default: if (get_attr_mode (insn) == MODE_SI) - return \"mov{l}\\t{%k1, %k0|%k0, %k1}\"; + return "mov{l}\t{%k1, %k0|%k0, %k1}"; else - return \"mov{w}\\t{%1, %0|%0, %1}\"; + return "mov{w}\t{%1, %0|%0, %1}"; } -}" +} [(set (attr "type") (cond [(and (eq_attr "alternative" "0,1") (ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL") @@ -1896,9 +1884,9 @@ (match_operand:HI 1 "nonmemory_operand" "a,er,i"))] "TARGET_64BIT" "@ - movabs{w}\\t{%1, %P0|%P0, %1} - mov{w}\\t{%1, %a0|%a0, %1} - movabs{w}\\t{%1, %a0|%a0, %1}" + movabs{w}\t{%1, %P0|%P0, %1} + mov{w}\t{%1, %a0|%a0, %1} + movabs{w}\t{%1, %a0|%a0, %1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*,*") (set_attr "length_address" "8,0,0") @@ -1911,8 +1899,8 @@ (mem:HI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))] "TARGET_64BIT" "@ - movabs{w}\\t{%P1, %0|%0, %P1} - mov{w}\\t{%a1, %0|%0, %a1}" + movabs{w}\t{%P1, %0|%0, %P1} + mov{w}\t{%a1, %0|%0, %a1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*") (set_attr "length_address" "8,0") @@ -1926,7 +1914,7 @@ (set (match_dup 1) (match_dup 0))] "TARGET_PARTIAL_REG_STALL" - "xchg{w}\\t%1, %0" + "xchg{w}\t%1, %0" [(set_attr "type" "imov") (set_attr "pent_pair" "np") (set_attr "mode" "HI") @@ -1939,7 +1927,7 @@ (set (match_dup 1) (match_dup 0))] "! TARGET_PARTIAL_REG_STALL" - "xchg{l}\\t%k1, %k0" + "xchg{l}\t%k1, %k0" [(set_attr "type" "imov") (set_attr "pent_pair" "np") (set_attr "mode" "SI") @@ -1950,19 +1938,18 @@ [(set (strict_low_part (match_operand:HI 0 "nonimmediate_operand" "")) (match_operand:HI 1 "general_operand" ""))] "! TARGET_PARTIAL_REG_STALL || optimize_size" - " { /* Don't generate memory->memory moves, go through a register */ if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (HImode, operands[1]); -}") +}) (define_insn "*movstricthi_1" [(set (strict_low_part (match_operand:HI 0 "nonimmediate_operand" "+rm,r")) (match_operand:HI 1 "general_operand" "rn,m"))] "(! TARGET_PARTIAL_REG_STALL || optimize_size) && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "mov{w}\\t{%1, %0|%0, %1}" + "mov{w}\t{%1, %0|%0, %1}" [(set_attr "type" "imov") (set_attr "mode" "HI")]) @@ -1972,7 +1959,7 @@ (clobber (reg:CC 17))] "reload_completed && ((!TARGET_USE_MOV0 && !TARGET_PARTIAL_REG_STALL) || optimize_size)" - "xor{w}\\t{%0, %0|%0, %0}" + "xor{w}\t{%0, %0|%0, %0}" [(set_attr "type" "alu1") (set_attr "mode" "HI") (set_attr "length_immediate" "0")]) @@ -1992,8 +1979,8 @@ (match_operand:QI 1 "nonmemory_no_elim_operand" "n,r"))] "!TARGET_64BIT" "@ - push{w}\\t{|word ptr }%1 - push{w}\\t%w1" + push{w}\t{|word ptr }%1 + push{w}\t%w1" [(set_attr "type" "push") (set_attr "mode" "HI")]) @@ -2002,7 +1989,7 @@ [(set (match_operand:QI 0 "push_operand" "=X") (match_operand:QI 1 "nonmemory_no_elim_operand" "ri"))] "TARGET_64BIT" - "push{q}\\t%q1" + "push{q}\t%q1" [(set_attr "type" "push") (set_attr "mode" "QI")]) @@ -2020,21 +2007,20 @@ [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q ,q ,r,r ,?r,m") (match_operand:QI 1 "general_operand" " q,qn,qm,q,rn,qm,qn"))] "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: if (!ANY_QI_REG_P (operands[1]) && GET_CODE (operands[1]) != MEM) abort (); - return \"movz{bl|x}\\t{%1, %k0|%k0, %1}\"; + return "movz{bl|x}\t{%1, %k0|%k0, %1}"; default: if (get_attr_mode (insn) == MODE_SI) - return \"mov{l}\\t{%k1, %k0|%k0, %k1}\"; + return "mov{l}\t{%k1, %k0|%k0, %k1}"; else - return \"mov{b}\\t{%1, %0|%0, %1}\"; + return "mov{b}\t{%1, %0|%0, %1}"; } -}" +} [(set (attr "type") (cond [(and (eq_attr "alternative" "3") (ior (eq (symbol_ref "TARGET_PARTIAL_REG_STALL") @@ -2078,7 +2064,6 @@ (match_operand:QI 1 "register_operand" "r") (match_operand:QI 2 "register_operand" "=&q")])] "" - " { rtx op0, op1, op2; op0 = operands[0]; op1 = operands[1]; op2 = operands[2]; @@ -2092,7 +2077,7 @@ } emit_insn (gen_movqi (op0, op1)); DONE; -}") +}) (define_insn "*swapqi" [(set (match_operand:QI 0 "register_operand" "+r") @@ -2100,7 +2085,7 @@ (set (match_dup 1) (match_dup 0))] "" - "xchg{b}\\t%1, %0" + "xchg{b}\t%1, %0" [(set_attr "type" "imov") (set_attr "pent_pair" "np") (set_attr "mode" "QI") @@ -2111,19 +2096,18 @@ [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "")) (match_operand:QI 1 "general_operand" ""))] "! TARGET_PARTIAL_REG_STALL" - " { /* Don't generate memory->memory moves, go through a register */ if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (QImode, operands[1]); -}") +}) (define_insn "*movstrictqi_1" [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q")) (match_operand:QI 1 "general_operand" "*qn,m"))] "! TARGET_PARTIAL_REG_STALL && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "mov{b}\\t{%1, %0|%0, %1}" + "mov{b}\t{%1, %0|%0, %1}" [(set_attr "type" "imov") (set_attr "mode" "QI")]) @@ -2132,7 +2116,7 @@ (match_operand:QI 1 "const0_operand" "i")) (clobber (reg:CC 17))] "reload_completed && (!TARGET_USE_MOV0 || optimize_size)" - "xor{b}\\t{%0, %0|%0, %0}" + "xor{b}\t{%0, %0|%0, %0}" [(set_attr "type" "alu1") (set_attr "mode" "QI") (set_attr "length_immediate" "0")]) @@ -2143,7 +2127,7 @@ (const_int 8) (const_int 8)))] "" - "movs{bl|x}\\t{%h1, %0|%0, %h1}" + "movs{bl|x}\t{%h1, %0|%0, %h1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -2153,7 +2137,7 @@ (const_int 8) (const_int 8)))] "" - "movs{bl|x}\\t{%h1, %k0|%k0, %h1}" + "movs{bl|x}\t{%h1, %k0|%k0, %h1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -2163,16 +2147,15 @@ (const_int 8) (const_int 8)))] "!TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: - return \"movs{bl|x}\\t{%h1, %k0|%k0, %h1}\"; + return "movs{bl|x}\t{%h1, %k0|%k0, %h1}"; default: - return \"mov{b}\\t{%h1, %0|%0, %h1}\"; + return "mov{b}\t{%h1, %0|%0, %h1}"; } -}" +} [(set (attr "type") (if_then_else (and (match_operand:QI 0 "register_operand" "") (ior (not (match_operand:QI 0 "q_regs_operand" "")) @@ -2191,16 +2174,15 @@ (const_int 8) (const_int 8)))] "TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: - return \"movs{bl|x}\\t{%h1, %k0|%k0, %h1}\"; + return "movs{bl|x}\t{%h1, %k0|%k0, %h1}"; default: - return \"mov{b}\\t{%h1, %0|%0, %h1}\"; + return "mov{b}\t{%h1, %0|%0, %h1}"; } -}" +} [(set (attr "type") (if_then_else (and (match_operand:QI 0 "register_operand" "") (ior (not (match_operand:QI 0 "q_regs_operand" "")) @@ -2221,9 +2203,9 @@ (match_operand:QI 1 "nonmemory_operand" "a,er,i"))] "TARGET_64BIT" "@ - movabs{q}\\t{%1, %P0|%P0, %1} - mov{q}\\t{%1, %a0|%a0, %1} - movabs{q}\\t{%1, %a0|%a0, %1}" + movabs{q}\t{%1, %P0|%P0, %1} + mov{q}\t{%1, %a0|%a0, %1} + movabs{q}\t{%1, %a0|%a0, %1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*,*") (set_attr "length_address" "8,0,0") @@ -2236,8 +2218,8 @@ (mem:QI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))] "TARGET_64BIT" "@ - movabs{q}\\t{%P1, %0|%0, %P1} - mov{q}\\t{%a1, %0|%0, %a1}" + movabs{q}\t{%P1, %0|%0, %P1} + mov{q}\t{%a1, %0|%0, %a1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*") (set_attr "length_address" "8,0") @@ -2251,7 +2233,7 @@ (const_int 8) (const_int 8)))] "" - "movz{bl|x}\\t{%h1, %0|%0, %h1}" + "movz{bl|x}\t{%h1, %0|%0, %h1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -2261,16 +2243,15 @@ (const_int 8) (const_int 8)) 0))] "!TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: - return \"movz{bl|x}\\t{%h1, %k0|%k0, %h1}\"; + return "movz{bl|x}\t{%h1, %k0|%k0, %h1}"; default: - return \"mov{b}\\t{%h1, %0|%0, %h1}\"; + return "mov{b}\t{%h1, %0|%0, %h1}"; } -}" +} [(set (attr "type") (if_then_else (and (match_operand:QI 0 "register_operand" "") (ior (not (match_operand:QI 0 "q_regs_operand" "")) @@ -2289,16 +2270,15 @@ (const_int 8) (const_int 8)) 0))] "TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOVX: - return \"movz{bl|x}\\t{%h1, %k0|%k0, %h1}\"; + return "movz{bl|x}\t{%h1, %k0|%k0, %h1}"; default: - return \"mov{b}\\t{%h1, %0|%0, %h1}\"; + return "mov{b}\t{%h1, %0|%0, %h1}"; } -}" +} [(set (attr "type") (if_then_else (ior (not (match_operand:QI 0 "q_regs_operand" "")) (ne (symbol_ref "TARGET_MOVX") @@ -2316,7 +2296,7 @@ (const_int 8)) (match_operand:SI 1 "general_operand" "Qmn"))] "!TARGET_64BIT" - "mov{b}\\t{%b1, %h0|%h0, %b1}" + "mov{b}\t{%b1, %h0|%h0, %b1}" [(set_attr "type" "imov") (set_attr "mode" "QI")]) @@ -2326,7 +2306,7 @@ (const_int 8)) (match_operand:SI 1 "nonmemory_operand" "Qn"))] "TARGET_64BIT" - "mov{b}\\t{%b1, %h0|%h0, %b1}" + "mov{b}\t{%b1, %h0|%h0, %b1}" [(set_attr "type" "imov") (set_attr "mode" "QI")]) @@ -2338,7 +2318,7 @@ (const_int 8)) (const_int 255)))] "" - "mov{b}\\t{%h1, %h0|%h0, %h1}" + "mov{b}\t{%h1, %h0|%h0, %h1}" [(set_attr "type" "imov") (set_attr "mode" "QI")]) @@ -2359,7 +2339,7 @@ (match_operand:DI 1 "general_no_elim_operand" "re*m,n"))] "TARGET_64BIT" "@ - push{q}\\t%1 + push{q}\t%1 #" [(set_attr "type" "push,multi") (set_attr "mode" "DI")]) @@ -2412,7 +2392,7 @@ (match_operand:DI 1 "general_no_elim_operand" "re*m")) (clobber (mem:BLK (scratch)))] "TARGET_64BIT" - "push{q}\\t%1" + "push{q}\t%1" [(set_attr "type" "push") (set_attr "mode" "DI")]) @@ -2423,7 +2403,7 @@ (plus:DI (reg:DI 7) (const_int 8))) (clobber (mem:BLK (scratch)))] "TARGET_64BIT" - "pop{q}\\t%0" + "pop{q}\t%0" [(set_attr "type" "pop") (set_attr "mode" "DI")]) @@ -2433,7 +2413,7 @@ (set (reg:DI 7) (plus:DI (reg:DI 7) (const_int 8)))] "TARGET_64BIT" - "pop{q}\\t%0" + "pop{q}\t%0" [(set_attr "type" "pop") (set_attr "mode" "DI")]) @@ -2443,7 +2423,7 @@ (clobber (reg:CC 17))] "reload_completed && (!TARGET_USE_MOV0 || optimize_size) && TARGET_64BIT" - "xor{l}\\t{%k0, %k0|%k0, %k0}" + "xor{l}\t{%k0, %k0|%k0, %k0}" [(set_attr "type" "alu1") (set_attr "mode" "SI") (set_attr "length_immediate" "0")]) @@ -2456,11 +2436,10 @@ && TARGET_64BIT && INTVAL (operands[1]) == -1 && (TARGET_PENTIUM || optimize_size)" - "* { operands[1] = constm1_rtx; - return \"or{q}\\t{%1, %0|%0, %1}\"; -}" + return "or{q}\t{%1, %0|%0, %1}"; +} [(set_attr "type" "alu1") (set_attr "mode" "DI") (set_attr "length_immediate" "1")]) @@ -2473,11 +2452,11 @@ "@ # # - movq\\t{%1, %0|%0, %1} - movq\\t{%1, %0|%0, %1} - movq\\t{%1, %0|%0, %1} - movdqa\\t{%1, %0|%0, %1} - movq\\t{%1, %0|%0, %1}" + movq\t{%1, %0|%0, %1} + movq\t{%1, %0|%0, %1} + movq\t{%1, %0|%0, %1} + movdqa\t{%1, %0|%0, %1} + movq\t{%1, %0|%0, %1}" [(set_attr "type" "*,*,mmx,mmx,sse,sse,sse") (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI")]) @@ -2504,32 +2483,31 @@ (match_operand:DI 1 "general_operand" "Z,rem,i,re,n,*y,m,*Y,*Y,*m"))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) && TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_SSE: if (register_operand (operands[0], DImode) && register_operand (operands[1], DImode)) - return \"movdqa\\t{%1, %0|%0, %1}\"; + return "movdqa\t{%1, %0|%0, %1}"; /* FALLTHRU */ case TYPE_MMX: - return \"movq\\t{%1, %0|%0, %1}\"; + return "movq\t{%1, %0|%0, %1}"; case TYPE_MULTI: - return \"#\"; + return "#"; case TYPE_LEA: - return \"lea{q}\\t{%a1, %0|%0, %a1}\"; + return "lea{q}\t{%a1, %0|%0, %a1}"; default: if (flag_pic && SYMBOLIC_CONST (operands[1])) abort (); if (get_attr_mode (insn) == MODE_SI) - return \"mov{l}\\t{%k1, %k0|%k0, %k1}\"; + return "mov{l}\t{%k1, %k0|%k0, %k1}"; else if (which_alternative == 2) - return \"movabs{q}\\t{%1, %0|%0, %1}\"; + return "movabs{q}\t{%1, %0|%0, %1}"; else - return \"mov{q}\\t{%1, %0|%0, %1}\"; + return "mov{q}\t{%1, %0|%0, %1}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "5,6") (const_string "mmx") @@ -2554,9 +2532,9 @@ (match_operand:DI 1 "nonmemory_operand" "a,er,i"))] "TARGET_64BIT" "@ - movabs{q}\\t{%1, %P0|%P0, %1} - mov{q}\\t{%1, %a0|%a0, %1} - movabs{q}\\t{%1, %a0|%a0, %1}" + movabs{q}\t{%1, %P0|%P0, %1} + mov{q}\t{%1, %a0|%a0, %1} + movabs{q}\t{%1, %a0|%a0, %1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*,*") (set_attr "length_address" "8,0,0") @@ -2569,8 +2547,8 @@ (mem:DI (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))] "TARGET_64BIT" "@ - movabs{q}\\t{%P1, %0|%0, %P1} - mov{q}\\t{%a1, %0|%0, %a1}" + movabs{q}\t{%P1, %0|%0, %P1} + mov{q}\t{%a1, %0|%0, %a1}" [(set_attr "type" "imov") (set_attr "modrm" "0,*") (set_attr "length_address" "8,0") @@ -2618,7 +2596,7 @@ (set (match_dup 1) (match_dup 0))] "TARGET_64BIT" - "xchg{q}\\t%1, %0" + "xchg{q}\t%1, %0" [(set_attr "type" "imov") (set_attr "pent_pair" "np") (set_attr "athlon_decode" "vector") @@ -2637,7 +2615,6 @@ [(set (match_operand:SF 0 "push_operand" "=<,<,<") (match_operand:SF 1 "general_no_elim_operand" "f#rx,rFm#fx,x#rf"))] "!TARGET_64BIT" - "* { switch (which_alternative) { @@ -2647,19 +2624,19 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (4); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: - return \"push{l}\\t%1\"; + return "push{l}\t%1"; case 2: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi,push,multi") (set_attr "mode" "SF,SI,SF")]) @@ -2667,7 +2644,6 @@ [(set (match_operand:SF 0 "push_operand" "=X,X,X") (match_operand:SF 1 "nonmemory_no_elim_operand" "f#rx,rF#fx,x#rf"))] "TARGET_64BIT" - "* { switch (which_alternative) { @@ -2677,20 +2653,20 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (8); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{q}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{q}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: - return \"push{q}\\t%q1\"; + return "push{q}\t%q1"; case 2: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi,push,multi") (set_attr "mode" "SF,DI,SF")]) @@ -2728,53 +2704,52 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], SFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } abort(); case 3: case 4: - return \"mov{l}\\t{%1, %0|%0, %1}\"; + return "mov{l}\t{%1, %0|%0, %1}"; case 5: - return \"pxor\\t%0, %0\"; + return "pxor\t%0, %0"; case 6: if (TARGET_PARTIAL_REG_DEPENDENCY) - return \"movaps\\t{%1, %0|%0, %1}\"; + return "movaps\t{%1, %0|%0, %1}"; else - return \"movss\\t{%1, %0|%0, %1}\"; + return "movss\t{%1, %0|%0, %1}"; case 7: case 8: - return \"movss\\t{%1, %0|%0, %1}\"; + return "movss\t{%1, %0|%0, %1}"; default: abort(); } -}" +} [(set_attr "type" "fmov,fmov,fmov,imov,imov,sse,sse,sse,sse") (set_attr "mode" "SF,SF,SF,SI,SI,TI,SF,SF,SF")]) @@ -2784,13 +2759,12 @@ (set (match_dup 1) (match_dup 0))] "reload_completed || !TARGET_SSE2" - "* { if (STACK_TOP_P (operands[0])) - return \"fxch\\t%1\"; + return "fxch\t%1"; else - return \"fxch\\t%0\"; -}" + return "fxch\t%0"; +} [(set_attr "type" "fxch") (set_attr "mode" "SF")]) @@ -2809,7 +2783,6 @@ [(set (match_operand:DF 0 "push_operand" "=<,<,<,<") (match_operand:DF 1 "general_no_elim_operand" "f#Y,Fo#fY,*r#fY,Y#f"))] "!TARGET_64BIT && !TARGET_INTEGER_DFMODE_MOVES" - "* { switch (which_alternative) { @@ -2819,19 +2792,19 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (8); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: case 2: case 3: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "DF,SI,SI,DF")]) @@ -2839,7 +2812,6 @@ [(set (match_operand:DF 0 "push_operand" "=<,<,<") (match_operand:DF 1 "general_no_elim_operand" "f#rY,rFo#fY,Y#rf"))] "TARGET_64BIT || TARGET_INTEGER_DFMODE_MOVES" - "* { switch (which_alternative) { @@ -2850,24 +2822,24 @@ operands[3] = GEN_INT (8); if (TARGET_64BIT) if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{q}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{q}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; else if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: case 2: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "DF,SI,DF")]) @@ -2907,53 +2879,52 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], DFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } abort(); case 3: case 4: - return \"#\"; + return "#"; case 5: - return \"pxor\\t%0, %0\"; + return "pxor\t%0, %0"; case 6: if (TARGET_PARTIAL_REG_DEPENDENCY) - return \"movapd\\t{%1, %0|%0, %1}\"; + return "movapd\t{%1, %0|%0, %1}"; else - return \"movsd\\t{%1, %0|%0, %1}\"; + return "movsd\t{%1, %0|%0, %1}"; case 7: case 8: - return \"movsd\\t{%1, %0|%0, %1}\"; + return "movsd\t{%1, %0|%0, %1}"; default: abort(); } -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi,sse,sse,sse,sse") (set_attr "mode" "DF,DF,DF,SI,SI,TI,DF,DF,DF")]) @@ -2965,54 +2936,53 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], DFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } abort(); case 3: case 4: - return \"#\"; + return "#"; case 5: - return \"pxor\\t%0, %0\"; + return "pxor\t%0, %0"; case 6: if (TARGET_PARTIAL_REG_DEPENDENCY) - return \"movapd\\t{%1, %0|%0, %1}\"; + return "movapd\t{%1, %0|%0, %1}"; else - return \"movsd\\t{%1, %0|%0, %1}\"; + return "movsd\t{%1, %0|%0, %1}"; case 7: case 8: - return \"movsd\\t{%1, %0|%0, %1}\"; + return "movsd\t{%1, %0|%0, %1}"; default: abort(); } -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi,sse,sse,sse,sse") (set_attr "mode" "DF,DF,DF,SI,SI,TI,DF,DF,DF")]) @@ -3036,13 +3006,12 @@ (set (match_dup 1) (match_dup 0))] "reload_completed || !TARGET_SSE2" - "* { if (STACK_TOP_P (operands[0])) - return \"fxch\\t%1\"; + return "fxch\t%1"; else - return \"fxch\\t%0\"; -}" + return "fxch\t%0"; +} [(set_attr "type" "fxch") (set_attr "mode" "DF")]) @@ -3069,7 +3038,6 @@ [(set (match_operand:XF 0 "push_operand" "=X,X,X") (match_operand:XF 1 "general_no_elim_operand" "f,Fo,*r"))] "optimize_size && !TARGET_64BIT" - "* { switch (which_alternative) { @@ -3079,18 +3047,18 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (12); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: case 2: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "XF,SI,SI")]) @@ -3098,7 +3066,6 @@ [(set (match_operand:TF 0 "push_operand" "=<,<,<") (match_operand:TF 1 "general_no_elim_operand" "f,Fo,*r"))] "optimize_size" - "* { switch (which_alternative) { @@ -3108,18 +3075,18 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (16); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: case 2: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "XF,SI,SI")]) @@ -3127,7 +3094,6 @@ [(set (match_operand:XF 0 "push_operand" "=<,<") (match_operand:XF 1 "general_no_elim_operand" "f#r,ro#f"))] "!optimize_size && !TARGET_64BIT" - "* { switch (which_alternative) { @@ -3137,17 +3103,17 @@ operands[2] = stack_pointer_rtx; operands[3] = GEN_INT (12); if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "XF,SI")]) @@ -3155,7 +3121,6 @@ [(set (match_operand:TF 0 "push_operand" "=<,<") (match_operand:TF 1 "general_no_elim_operand" "f#r,rFo#f"))] "!optimize_size" - "* { switch (which_alternative) { @@ -3166,22 +3131,22 @@ operands[3] = GEN_INT (16); if (TARGET_64BIT) if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{q}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{q}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; else if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"sub{l}\\t{%3, %2|%2, %3}\;fstp%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; else - return \"sub{l}\\t{%3, %2|%2, %3}\;fst%z0\\t%y0\"; + return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; case 1: - return \"#\"; + return "#"; default: abort (); } -}" +} [(set_attr "type" "multi") (set_attr "mode" "XF,SI")]) @@ -3227,42 +3192,41 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], XFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\;fld%z0\\t%y0\"; + return "fstp%z0\t%y0\;fld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } break; case 3: case 4: - return \"#\"; + return "#"; } abort(); -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi") (set_attr "mode" "XF,XF,XF,SI,SI")]) @@ -3274,42 +3238,41 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], TFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\;fld%z0\\t%y0\"; + return "fstp%z0\t%y0\;fld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } break; case 3: case 4: - return \"#\"; + return "#"; } abort(); -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi") (set_attr "mode" "XF,XF,XF,SI,SI")]) @@ -3322,42 +3285,41 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], XFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\;fld%z0\\t%y0\"; + return "fstp%z0\t%y0\;fld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } break; case 3: case 4: - return \"#\"; + return "#"; } abort(); -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi") (set_attr "mode" "XF,XF,XF,SI,SI")]) @@ -3369,42 +3331,41 @@ && (reload_in_progress || reload_completed || GET_CODE (operands[1]) != CONST_DOUBLE || memory_operand (operands[0], TFmode))" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\;fld%z0\\t%y0\"; + return "fstp%z0\t%y0\;fld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; case 2: switch (standard_80387_constant_p (operands[1])) { case 1: - return \"fldz\"; + return "fldz"; case 2: - return \"fld1\"; + return "fld1"; } break; case 3: case 4: - return \"#\"; + return "#"; } abort(); -}" +} [(set_attr "type" "fmov,fmov,fmov,multi,multi") (set_attr "mode" "XF,XF,XF,SI,SI")]) @@ -3450,13 +3411,12 @@ (set (match_dup 1) (match_dup 0))] "" - "* { if (STACK_TOP_P (operands[0])) - return \"fxch\\t%1\"; + return "fxch\t%1"; else - return \"fxch\\t%0\"; -}" + return "fxch\t%0"; +} [(set_attr "type" "fxch") (set_attr "mode" "XF")]) @@ -3466,13 +3426,12 @@ (set (match_dup 1) (match_dup 0))] "" - "* { if (STACK_TOP_P (operands[0])) - return \"fxch\\t%1\"; + return "fxch\t%1"; else - return \"fxch\\t%0\"; -}" + return "fxch\t%0"; +} [(set_attr "type" "fxch") (set_attr "mode" "XF")]) @@ -3482,7 +3441,6 @@ [(set (match_operand:SI 0 "register_operand" "") (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))] "" - " { if (TARGET_ZERO_EXTEND_WITH_AND && !optimize_size) { @@ -3490,7 +3448,7 @@ emit_insn (gen_zero_extendhisi2_and (operands[0], operands[1])); DONE; } -}") +}) (define_insn "zero_extendhisi2_and" [(set (match_operand:SI 0 "register_operand" "=r") @@ -3514,7 +3472,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "rm")))] "!TARGET_ZERO_EXTEND_WITH_AND || optimize_size" - "movz{wl|x}\\t{%1, %0|%0, %1}" + "movz{wl|x}\t{%1, %0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -3548,7 +3506,7 @@ [(set (match_operand:HI 0 "register_operand" "=r") (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "qm")))] "(!TARGET_ZERO_EXTEND_WITH_AND || optimize_size) && reload_completed" - "movz{bw|x}\\t{%1, %0|%0, %1}" + "movz{bw|x}\t{%1, %0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "HI")]) @@ -3618,7 +3576,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "qm")))] "(!TARGET_ZERO_EXTEND_WITH_AND || optimize_size) && reload_completed" - "movz{bl|x}\\t{%1, %0|%0, %1}" + "movz{bl|x}\t{%1, %0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -3684,7 +3642,7 @@ (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "rm,0")))] "TARGET_64BIT" "@ - mov\\t{%k1, %k0|%k0, %k1} + mov\t{%k1, %k0|%k0, %k1} #" [(set_attr "type" "imovx,imov") (set_attr "mode" "SI,DI")]) @@ -3719,8 +3677,8 @@ (zero_extend:DI (match_operand:HI 1 "nonimmediate_operand" "r,m")))] "TARGET_64BIT" "@ - movz{wl|x}\\t{%1, %k0|%k0, %1} - movz{wq|x}\\t{%1, %0|%0, %1}" + movz{wl|x}\t{%1, %k0|%k0, %1} + movz{wq|x}\t{%1, %0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI,DI")]) @@ -3729,8 +3687,8 @@ (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "Q,m")))] "TARGET_64BIT" "@ - movz{bl|x}\\t{%1, %k0|%k0, %1} - movz{bq|x}\\t{%1, %0|%0, %1}" + movz{bl|x}\t{%1, %k0|%k0, %1} + movz{bq|x}\t{%1, %0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI,DI")]) @@ -3742,14 +3700,13 @@ (clobber (reg:CC 17)) (clobber (match_scratch:SI 2 ""))])] "" - " { if (TARGET_64BIT) { emit_insn (gen_extendsidi2_rex64 (operands[0], operands[1])); DONE; } -}") +}) (define_insn "*extendsidi2_1" [(set (match_operand:DI 0 "nonimmediate_operand" "=*A,r,?r,?*o") @@ -3765,7 +3722,7 @@ "TARGET_64BIT" "@ {cltq|cdqe} - movs{lq|x}\\t{%1,%0|%0, %1}" + movs{lq|x}\t{%1,%0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "DI") (set_attr "prefix_0f" "0") @@ -3775,7 +3732,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (sign_extend:DI (match_operand:HI 1 "nonimmediate_operand" "rm")))] "TARGET_64BIT" - "movs{wq|x}\\t{%1,%0|%0, %1}" + "movs{wq|x}\t{%1,%0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "DI")]) @@ -3783,7 +3740,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (sign_extend:DI (match_operand:QI 1 "nonimmediate_operand" "qm")))] "TARGET_64BIT" - "movs{bq|x}\\t{%1,%0|%0, %1}" + "movs{bq|x}\t{%1,%0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "DI")]) @@ -3810,7 +3767,6 @@ (clobber (match_operand:SI 2 "register_operand" ""))] "reload_completed" [(const_int 0)] - " { split_di (&operands[0], 1, &operands[3], &operands[4]); @@ -3830,7 +3786,7 @@ } emit_move_insn (operands[4], operands[2]); DONE; -}") +}) ;; Extend to register case. Optimize case where source and destination ;; registers match and cases where we can use cltd. @@ -3841,7 +3797,6 @@ (clobber (match_scratch:SI 2 ""))] "reload_completed" [(const_int 0)] - " { split_di (&operands[0], 1, &operands[3], &operands[4]); @@ -3861,22 +3816,21 @@ emit_insn (gen_ashrsi3_31 (operands[4], operands[4], GEN_INT (31))); DONE; -}") +}) (define_insn "extendhisi2" [(set (match_operand:SI 0 "register_operand" "=*a,r") (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "*0,rm")))] "" - "* { switch (get_attr_prefix_0f (insn)) { case 0: - return \"{cwtl|cwde}\"; + return "{cwtl|cwde}"; default: - return \"movs{wl|x}\\t{%1,%0|%0, %1}\"; + return "movs{wl|x}\t{%1,%0|%0, %1}"; } -}" +} [(set_attr "type" "imovx") (set_attr "mode" "SI") (set (attr "prefix_0f") @@ -3895,16 +3849,15 @@ (zero_extend:DI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "*0,rm"))))] "TARGET_64BIT" - "* { switch (get_attr_prefix_0f (insn)) { case 0: - return \"{cwtl|cwde}\"; + return "{cwtl|cwde}"; default: - return \"movs{wl|x}\\t{%1,%k0|%k0, %1}\"; + return "movs{wl|x}\t{%1,%k0|%k0, %1}"; } -}" +} [(set_attr "type" "imovx") (set_attr "mode" "SI") (set (attr "prefix_0f") @@ -3922,16 +3875,15 @@ [(set (match_operand:HI 0 "register_operand" "=*a,r") (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "*0,qm")))] "" - "* { switch (get_attr_prefix_0f (insn)) { case 0: - return \"{cbtw|cbw}\"; + return "{cbtw|cbw}"; default: - return \"movs{bw|x}\\t{%1,%0|%0, %1}\"; + return "movs{bw|x}\t{%1,%0|%0, %1}"; } -}" +} [(set_attr "type" "imovx") (set_attr "mode" "HI") (set (attr "prefix_0f") @@ -3949,7 +3901,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "qm")))] "" - "movs{bl|x}\\t{%1,%0|%0, %1}" + "movs{bl|x}\t{%1,%0|%0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -3958,7 +3910,7 @@ (zero_extend:DI (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "qm"))))] "TARGET_64BIT" - "movs{bl|x}\\t{%1,%k0|%k0, %1}" + "movs{bl|x}\t{%1,%k0|%k0, %1}" [(set_attr "type" "imovx") (set_attr "mode" "SI")]) @@ -4058,43 +4010,41 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_80387 || TARGET_SSE2" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (SFmode, operands[1]); -}") +}) (define_insn "*extendsfdf2_1" [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,mf#Y,Y#f") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm#Y,f#Y,mY#f")))] "(TARGET_80387 || TARGET_SSE2) && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; case 2: - return \"cvtss2sd\\t{%1, %0|%0, %1}\"; + return "cvtss2sd\t{%1, %0|%0, %1}"; default: abort (); } -}" +} [(set_attr "type" "fmov,fmov,sse") (set_attr "mode" "SF,XF,DF")]) @@ -4103,7 +4053,7 @@ (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))] "!TARGET_80387 && TARGET_SSE2 && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "cvtss2sd\\t{%1, %0|%0, %1}" + "cvtss2sd\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "DF")]) @@ -4111,42 +4061,40 @@ [(set (match_operand:XF 0 "nonimmediate_operand" "") (float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_80387 && !TARGET_64BIT" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (SFmode, operands[1]); -}") +}) (define_insn "*extendsfxf2_1" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m") (float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))] "TARGET_80387 && !TARGET_64BIT && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\\n\\tfld%z0\\t%y0\"; + return "fstp%z0\t%y0\n\tfld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; default: abort (); } -}" +} [(set_attr "type" "fmov") (set_attr "mode" "SF,XF")]) @@ -4154,42 +4102,40 @@ [(set (match_operand:TF 0 "nonimmediate_operand" "") (float_extend:TF (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_80387" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (SFmode, operands[1]); -}") +}) (define_insn "*extendsftf2_1" [(set (match_operand:TF 0 "nonimmediate_operand" "=f,m") (float_extend:TF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))] "TARGET_80387 && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\\n\\tfld%z0\\t%y0\"; + return "fstp%z0\t%y0\n\tfld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; default: abort (); } -}" +} [(set_attr "type" "fmov") (set_attr "mode" "SF,XF")]) @@ -4197,42 +4143,40 @@ [(set (match_operand:XF 0 "nonimmediate_operand" "") (float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "")))] "TARGET_80387 && !TARGET_64BIT" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (DFmode, operands[1]); -}") +}) (define_insn "*extenddfxf2_1" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m") (float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))] "TARGET_80387 && !TARGET_64BIT && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\\n\\tfld%z0\\t%y0\"; + return "fstp%z0\t%y0\n\tfld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; default: abort (); } -}" +} [(set_attr "type" "fmov") (set_attr "mode" "DF,XF")]) @@ -4240,42 +4184,40 @@ [(set (match_operand:TF 0 "nonimmediate_operand" "") (float_extend:TF (match_operand:DF 1 "nonimmediate_operand" "")))] "TARGET_80387" - " { if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) operands[1] = force_reg (DFmode, operands[1]); -}") +}) (define_insn "*extenddftf2_1" [(set (match_operand:TF 0 "nonimmediate_operand" "=f,m") (float_extend:TF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))] "TARGET_80387 && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp\\t%y0\"; + return "fstp\t%y0"; else if (STACK_TOP_P (operands[0])) - return \"fld%z1\\t%y1\"; + return "fld%z1\t%y1"; else - return \"fst\\t%y0\"; + return "fst\t%y0"; case 1: /* There is no non-popping store to memory for XFmode. So if we need one, follow the store with a load. */ if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\\n\\tfld%z0\\t%y0\"; + return "fstp%z0\t%y0\n\tfld%z0\t%y0"; else - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; default: abort (); } -}" +} [(set_attr "type" "fmov") (set_attr "mode" "DF,XF")]) @@ -4307,19 +4249,18 @@ (match_operand:DF 1 "register_operand" "f,f,f,f"))) (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))] "TARGET_80387 && !TARGET_SSE2" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; default: abort (); } -}" +} [(set_attr "type" "fmov,multi,multi,multi") (set_attr "mode" "SF,SF,SF,SF")]) @@ -4329,21 +4270,20 @@ (match_operand:DF 1 "nonimmediate_operand" "f,f,f,f,mY"))) (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m,X"))] "TARGET_80387 && TARGET_SSE2" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; case 4: - return \"cvtsd2ss\\t{%1, %0|%0, %1}\"; + return "cvtsd2ss\t{%1, %0|%0, %1}"; default: abort (); } -}" +} [(set_attr "type" "fmov,multi,multi,multi,sse") (set_attr "mode" "SF,SF,SF,SF,DF")]) @@ -4353,19 +4293,20 @@ (match_operand:DF 1 "nonimmediate_operand" "mY,f")))] "TARGET_80387 && TARGET_SSE2 && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "* { switch (which_alternative) { case 0: - return \"cvtsd2ss\\t{%1, %0|%0, %1}\"; + return "cvtsd2ss\t{%1, %0|%0, %1}"; case 1: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; + default: + abort (); } -}" +} [(set_attr "type" "sse,fmov") (set_attr "mode" "DF,SF")]) @@ -4374,13 +4315,12 @@ (float_truncate:SF (match_operand:DF 1 "register_operand" "f")))] "TARGET_80387" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; -}" + return "fst%z0\t%y0"; +} [(set_attr "type" "fmov") (set_attr "mode" "SF")]) @@ -4389,7 +4329,7 @@ (float_truncate:SF (match_operand:DF 1 "nonimmediate_operand" "mY")))] "!TARGET_80387 && TARGET_SSE2" - "cvtsd2ss\\t{%1, %0|%0, %1}" + "cvtsd2ss\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "DF")]) @@ -4437,19 +4377,18 @@ (match_operand:XF 1 "register_operand" "f,f,f,f"))) (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))] "TARGET_80387 && !TARGET_64BIT" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; default: abort(); } -}" +} [(set_attr "type" "fmov,multi,multi,multi") (set_attr "mode" "SF")]) @@ -4458,13 +4397,12 @@ (float_truncate:SF (match_operand:XF 1 "register_operand" "f")))] "TARGET_80387 && !TARGET_64BIT" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; -}" + return "fst%z0\t%y0"; +} [(set_attr "type" "fmov") (set_attr "mode" "SF")]) @@ -4501,19 +4439,18 @@ (match_operand:TF 1 "register_operand" "f,f,f,f"))) (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m"))] "TARGET_80387" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; default: abort(); } -}" +} [(set_attr "type" "fmov,multi,multi,multi") (set_attr "mode" "SF")]) @@ -4522,13 +4459,12 @@ (float_truncate:SF (match_operand:TF 1 "register_operand" "f")))] "TARGET_80387" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; -}" + return "fst%z0\t%y0"; +} [(set_attr "type" "fmov") (set_attr "mode" "SF")]) @@ -4566,20 +4502,19 @@ (match_operand:XF 1 "register_operand" "f,f,f,f"))) (clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))] "TARGET_80387 && !TARGET_64BIT" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; default: abort(); } abort (); -}" +} [(set_attr "type" "fmov,multi,multi,multi") (set_attr "mode" "DF")]) @@ -4588,13 +4523,12 @@ (float_truncate:DF (match_operand:XF 1 "register_operand" "f")))] "TARGET_80387 && !TARGET_64BIT" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; -}" + return "fst%z0\t%y0"; +} [(set_attr "type" "fmov") (set_attr "mode" "DF")]) @@ -4631,20 +4565,19 @@ (match_operand:TF 1 "register_operand" "f,f,f,f"))) (clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))] "TARGET_80387" - "* { switch (which_alternative) { case 0: if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; + return "fst%z0\t%y0"; default: abort(); } abort (); -}" +} [(set_attr "type" "fmov,multi,multi,multi") (set_attr "mode" "DF")]) @@ -4653,13 +4586,12 @@ (float_truncate:DF (match_operand:TF 1 "register_operand" "f")))] "TARGET_80387" - "* { if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return \"fstp%z0\\t%y0\"; + return "fstp%z0\t%y0"; else - return \"fst%z0\\t%y0\"; -}" + return "fst%z0\t%y0"; +} [(set_attr "type" "fmov") (set_attr "mode" "DF")]) @@ -4721,7 +4653,6 @@ (clobber (match_dup 4)) (clobber (match_scratch:XF 5 ""))])] "TARGET_80387 || (TARGET_SSE2 && TARGET_64BIT)" - " { if (TARGET_SSE2 && TARGET_64BIT) { @@ -4738,7 +4669,7 @@ emit_i387_cw_initialization (operands[2], operands[3]); operands[4] = assign_386_stack_local (DImode, 0); } -}") +}) (define_expand "fix_truncsfdi2" [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") @@ -4748,7 +4679,6 @@ (clobber (match_dup 4)) (clobber (match_scratch:XF 5 ""))])] "TARGET_80387 || (TARGET_SSE && TARGET_64BIT)" - " { if (TARGET_SSE2 && TARGET_64BIT) { @@ -4765,7 +4695,7 @@ emit_i387_cw_initialization (operands[2], operands[3]); operands[4] = assign_386_stack_local (DImode, 0); } -}") +}) (define_insn "*fix_truncdi_1" [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r") @@ -4801,14 +4731,14 @@ [(set (match_operand:DI 0 "register_operand" "=r") (fix:DI (match_operand:SF 1 "nonimmediate_operand" "xm")))] "TARGET_SSE && TARGET_64BIT" - "cvttss2si{q}\\t{%1, %0|%0, %1}" + "cvttss2si{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "fix_truncdfdi_sse" [(set (match_operand:DI 0 "register_operand" "=r") (fix:DI (match_operand:DF 1 "nonimmediate_operand" "Ym")))] "TARGET_SSE2 && TARGET_64BIT" - "cvttsd2si{q}\\t{%1, %0|%0, %1}" + "cvttsd2si{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) ;; Signed conversion to SImode. @@ -4844,7 +4774,6 @@ (use (match_dup 3)) (clobber (match_dup 4))])] "TARGET_80387 || TARGET_SSE2" - " { if (TARGET_SSE2) { @@ -4861,7 +4790,7 @@ emit_i387_cw_initialization (operands[2], operands[3]); operands[4] = assign_386_stack_local (SImode, 0); } -}") +}) (define_expand "fix_truncsfsi2" [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -4870,7 +4799,6 @@ (use (match_dup 3)) (clobber (match_dup 4))])] "TARGET_80387 || TARGET_SSE" - " { if (TARGET_SSE2) { @@ -4887,7 +4815,7 @@ emit_i387_cw_initialization (operands[2], operands[3]); operands[4] = assign_386_stack_local (SImode, 0); } -}") +}) (define_insn "*fix_truncsi_1" [(set (match_operand:SI 0 "nonimmediate_operand" "=m,?r") @@ -4905,14 +4833,14 @@ [(set (match_operand:SI 0 "register_operand" "=r") (fix:SI (match_operand:SF 1 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "cvttss2si\\t{%1, %0|%0, %1}" + "cvttss2si\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "fix_truncdfsi_sse" [(set (match_operand:SI 0 "register_operand" "=r") (fix:SI (match_operand:DF 1 "nonimmediate_operand" "Ym")))] "TARGET_SSE2" - "cvttsd2si\\t{%1, %0|%0, %1}" + "cvttsd2si\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_split @@ -5009,7 +4937,7 @@ [(set (match_operand:HI 0 "memory_operand" "=m") (unspec:HI [(reg:HI 18)] 11))] "TARGET_80387" - "fnstcw\\t%0" + "fnstcw\t%0" [(set_attr "length" "2") (set_attr "mode" "HI") (set_attr "i387" "1") @@ -5019,7 +4947,7 @@ [(set (reg:HI 18) (unspec:HI [(match_operand:HI 0 "memory_operand" "m")] 12))] "TARGET_80387" - "fldcw\\t%0" + "fldcw\t%0" [(set_attr "length" "2") (set_attr "mode" "HI") (set_attr "i387" "1") @@ -5036,7 +4964,7 @@ (float:SF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && !TARGET_SSE" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "SF") @@ -5053,9 +4981,9 @@ (float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)" "@ - fild%z1\\t%1 + fild%z1\t%1 # - cvtsi2ss\\t{%1, %0|%0, %1}" + cvtsi2ss\t{%1, %0|%0, %1}" [(set_attr "type" "fmov,multi,sse") (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) @@ -5064,7 +4992,7 @@ [(set (match_operand:SF 0 "register_operand" "=x") (float:SF (match_operand:SI 1 "nonimmediate_operand" "mr")))] "TARGET_SSE" - "cvtsi2ss\\t{%1, %0|%0, %1}" + "cvtsi2ss\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) @@ -5080,7 +5008,7 @@ (float:SF (match_operand:DI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && (!TARGET_SSE || !TARGET_64BIT || TARGET_MIX_SSE_I387)" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "SF") @@ -5091,9 +5019,9 @@ (float:SF (match_operand:DI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && TARGET_64BIT && (!TARGET_SSE || TARGET_MIX_SSE_I387)" "@ - fild%z1\\t%1 + fild%z1\t%1 # - cvtsi2ss{q}\\t{%1, %0|%0, %1}" + cvtsi2ss{q}\t{%1, %0|%0, %1}" [(set_attr "type" "fmov,multi,sse") (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) @@ -5102,7 +5030,7 @@ [(set (match_operand:SF 0 "register_operand" "=x") (float:SF (match_operand:DI 1 "nonimmediate_operand" "mr")))] "TARGET_SSE && TARGET_64BIT" - "cvtsi2ss{q}\\t{%1, %0|%0, %1}" + "cvtsi2ss{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) @@ -5112,7 +5040,7 @@ (float:DF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && !TARGET_SSE2" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "DF") @@ -5129,9 +5057,9 @@ (float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)" "@ - fild%z1\\t%1 + fild%z1\t%1 # - cvtsi2sd\\t{%1, %0|%0, %1}" + cvtsi2sd\t{%1, %0|%0, %1}" [(set_attr "type" "fmov,multi,sse") (set_attr "mode" "DF") (set_attr "fp_int_src" "true")]) @@ -5140,7 +5068,7 @@ [(set (match_operand:DF 0 "register_operand" "=Y") (float:DF (match_operand:SI 1 "nonimmediate_operand" "mr")))] "TARGET_SSE2" - "cvtsi2sd\\t{%1, %0|%0, %1}" + "cvtsi2sd\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "DF") (set_attr "fp_int_src" "true")]) @@ -5156,7 +5084,7 @@ (float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && (!TARGET_SSE2 || !TARGET_64BIT)" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "DF") @@ -5167,9 +5095,9 @@ (float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && TARGET_64BIT && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)" "@ - fild%z1\\t%1 + fild%z1\t%1 # - cvtsi2sd{q}\\t{%1, %0|%0, %1}" + cvtsi2sd{q}\t{%1, %0|%0, %1}" [(set_attr "type" "fmov,multi,sse") (set_attr "mode" "DF") (set_attr "fp_int_src" "true")]) @@ -5178,7 +5106,7 @@ [(set (match_operand:DF 0 "register_operand" "=Y") (float:DF (match_operand:DI 1 "nonimmediate_operand" "mr")))] "TARGET_SSE2" - "cvtsi2sd{q}\\t{%1, %0|%0, %1}" + "cvtsi2sd{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "DF") (set_attr "fp_int_src" "true")]) @@ -5188,7 +5116,7 @@ (float:XF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && !TARGET_64BIT" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5199,7 +5127,7 @@ (float:TF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5210,7 +5138,7 @@ (float:XF (match_operand:SI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && !TARGET_64BIT" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5221,7 +5149,7 @@ (float:TF (match_operand:SI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5232,7 +5160,7 @@ (float:XF (match_operand:DI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387 && !TARGET_64BIT" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5243,7 +5171,7 @@ (float:TF (match_operand:DI 1 "nonimmediate_operand" "m,r")))] "TARGET_80387" "@ - fild%z1\\t%1 + fild%z1\t%1 #" [(set_attr "type" "fmov,multi") (set_attr "mode" "XF") @@ -5256,14 +5184,13 @@ "reload_completed && FLOAT_MODE_P (GET_MODE (operands[0])) && FP_REG_P (operands[0])" [(const_int 0)] - " { operands[2] = ix86_force_to_memory (GET_MODE (operands[1]), operands[1]); operands[2] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[2]); emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[2])); ix86_free_from_memory (GET_MODE (operands[1])); DONE; -}") +}) ;; Add instructions @@ -5312,7 +5239,7 @@ (match_operand:DI 2 "x86_64_general_operand" "re,rm"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (PLUS, DImode, operands)" - "adc{q}\\t{%2, %0|%0, %2}" + "adc{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "mode" "DI") @@ -5324,7 +5251,7 @@ (set (match_operand:DI 0 "nonimmediate_operand" "=rm,r") (plus:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, DImode, operands)" - "add{q}\\t{%2, %0|%0, %2}" + "add{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -5335,7 +5262,7 @@ (match_operand:SI 2 "general_operand" "ri,rm"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (PLUS, SImode, operands)" - "adc{l}\\t{%2, %0|%0, %2}" + "adc{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "mode" "SI") @@ -5349,7 +5276,7 @@ (match_operand:SI 2 "general_operand" "rim")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" - "adc{l}\\t{%2, %k0|%k0, %2}" + "adc{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "mode" "SI") @@ -5361,7 +5288,7 @@ (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") (plus:SI (match_dup 1) (match_dup 2)))] "ix86_binary_operator_ok (PLUS, SImode, operands)" - "add{l}\\t{%2, %0|%0, %2}" + "add{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -5371,7 +5298,7 @@ (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q") (plus:QI (match_dup 1) (match_dup 2)))] "ix86_binary_operator_ok (PLUS, QImode, operands)" - "add{b}\\t{%2, %0|%0, %2}" + "add{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -5387,7 +5314,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (match_operand:SI 1 "address_operand" "p"))] "!TARGET_64BIT" - "lea{l}\\t{%a1, %0|%0, %a1}" + "lea{l}\t{%a1, %0|%0, %a1}" [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5395,7 +5322,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (subreg:SI (match_operand:DI 1 "address_operand" "p") 0))] "TARGET_64BIT" - "lea{l}\\t{%a1, %0|%0, %a1}" + "lea{l}\t{%a1, %0|%0, %a1}" [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5403,7 +5330,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (subreg:SI (match_operand:DI 1 "address_operand" "p") 0)))] "TARGET_64BIT" - "lea{l}\\t{%a1, %k0|%k0, %a1}" + "lea{l}\t{%a1, %k0|%k0, %a1}" [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5411,7 +5338,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (match_operand:DI 1 "address_operand" "p"))] "TARGET_64BIT" - "lea{q}\\t{%a1, %0|%0, %a1}" + "lea{q}\t{%a1, %0|%0, %a1}" [(set_attr "type" "lea") (set_attr "mode" "DI")]) @@ -5433,7 +5360,6 @@ "#" "&& reload_completed" [(const_int 0)] - " { rtx pat; operands[0] = gen_lowpart (SImode, operands[0]); @@ -5446,7 +5372,7 @@ pat = gen_rtx_SUBREG (SImode, pat, 0); emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat)); DONE; -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5463,12 +5389,11 @@ (zero_extend:DI (subreg:SI (plus:DI (plus:DI (match_dup 1) (match_dup 2)) (match_dup 3)) 0)))] - " { operands[1] = gen_lowpart (Pmode, operands[1]); operands[2] = gen_lowpart (Pmode, operands[2]); operands[3] = gen_lowpart (Pmode, operands[3]); -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5486,7 +5411,6 @@ "#" "&& reload_completed" [(const_int 0)] - " { rtx pat; operands[0] = gen_lowpart (SImode, operands[0]); @@ -5498,7 +5422,7 @@ pat = gen_rtx_SUBREG (SImode, pat, 0); emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat)); DONE; -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5515,11 +5439,10 @@ (zero_extend:DI (subreg:SI (plus:DI (mult:DI (match_dup 1) (match_dup 2)) (match_dup 3)) 0)))] - " { operands[1] = gen_lowpart (Pmode, operands[1]); operands[3] = gen_lowpart (Pmode, operands[3]); -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5537,7 +5460,6 @@ "#" "&& reload_completed" [(const_int 0)] - " { rtx pat; operands[0] = gen_lowpart (SImode, operands[0]); @@ -5553,7 +5475,7 @@ pat = gen_rtx_SUBREG (SImode, pat, 0); emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat)); DONE; -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5572,12 +5494,11 @@ (match_dup 2)) (match_dup 3)) (match_dup 4)) 0)))] - " { operands[1] = gen_lowpart (Pmode, operands[1]); operands[3] = gen_lowpart (Pmode, operands[3]); operands[4] = gen_lowpart (Pmode, operands[4]); -}" +} [(set_attr "type" "lea") (set_attr "mode" "SI")]) @@ -5587,21 +5508,20 @@ (match_operand:DI 2 "x86_64_general_operand" "rme,re,re"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, DImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); - return \"lea{q}\\t{%a2, %0|%0, %a2}\"; + return "lea{q}\t{%a2, %0|%0, %a2}"; case TYPE_INCDEC: if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{q}\\t%0\"; + return "inc{q}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{q}\\t%0\"; + return "dec{q}\t%0"; else abort (); @@ -5613,17 +5533,17 @@ Exceptions: -128 encodes smaller than 128, so swap sign and op. */ if (GET_CODE (operands[2]) == CONST_INT /* Avoid overflows. */ - && ((INTVAL (operands[2]) & ((1 << 31) - 1))) + && ((INTVAL (operands[2]) & ((((unsigned int) 1) << 31) - 1))) && (INTVAL (operands[2]) == 128 || (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{q}\\t{%2, %0|%0, %2}\"; + return "sub{q}\t{%2, %0|%0, %2}"; } - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "2") (const_string "lea") @@ -5663,7 +5583,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -5671,9 +5590,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{q}\\t%0\"; + return "inc{q}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{q}\\t%0\"; + return "dec{q}\t%0"; else abort (); @@ -5686,17 +5605,17 @@ Exceptions: -128 encodes smaller than 128, so swap sign and op. */ if (GET_CODE (operands[2]) == CONST_INT /* Avoid overflows. */ - && ((INTVAL (operands[2]) & ((1 << 31) - 1))) + && ((INTVAL (operands[2]) & ((((unsigned int) 1) << 31) - 1))) && (INTVAL (operands[2]) == 128 || (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{q}\\t{%2, %0|%0, %2}\"; + return "sub{q}\t{%2, %0|%0, %2}"; } - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:DI 2 "incdec_operand" "") (const_string "incdec") @@ -5714,7 +5633,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -5722,9 +5640,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{q}\\t%0\"; + return "inc{q}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{q}\\t%0\"; + return "dec{q}\t%0"; else abort (); @@ -5737,17 +5655,17 @@ Exceptions: -128 encodes smaller than 128, so swap sign and op. */ if (GET_CODE (operands[2]) == CONST_INT /* Avoid overflows. */ - && ((INTVAL (operands[2]) & ((1 << 31) - 1))) + && ((INTVAL (operands[2]) & ((((unsigned int) 1) << 31) - 1))) && (INTVAL (operands[2]) == 128 || (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{q}\\t{%2, %0|%0, %2}\"; + return "sub{q}\t{%2, %0|%0, %2}"; } - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:DI 2 "incdec_operand" "") (const_string "incdec") @@ -5769,15 +5687,14 @@ (clobber (match_scratch:DI 0 "=rm"))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGCmode)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == constm1_rtx) - return \"inc{q}\\t%0\"; + return "inc{q}\t%0"; else if (operands[2] == const1_rtx) - return \"dec{q}\\t%0\"; + return "dec{q}\t%0"; else abort(); @@ -5790,12 +5707,12 @@ || (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) != 128)) /* Avoid overflows. */ - && ((INTVAL (operands[2]) & ((1 << 31) - 1)))) - return \"sub{q}\\t{%2, %0|%0, %2}\"; + && ((INTVAL (operands[2]) & ((((unsigned int) 1) << 31) - 1)))) + return "sub{q}\t{%2, %0|%0, %2}"; operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:DI 2 "incdec_operand" "") (const_string "incdec") @@ -5815,7 +5732,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -5823,9 +5739,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{q}\\t%0\"; + return "inc{q}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{q}\\t%0\"; + return "dec{q}\t%0"; else abort(); @@ -5836,17 +5752,17 @@ Exceptions: -128 encodes smaller than 128, so swap sign and op. */ if (GET_CODE (operands[2]) == CONST_INT /* Avoid overflows. */ - && ((INTVAL (operands[2]) & ((1 << 31) - 1))) + && ((INTVAL (operands[2]) & ((((unsigned int) 1) << 31) - 1))) && (INTVAL (operands[2]) == 128 || (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{q}\\t{%2, %0|%0, %2}\"; + return "sub{q}\t{%2, %0|%0, %2}"; } - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:DI 2 "incdec_operand" "") (const_string "incdec") @@ -5860,21 +5776,20 @@ (match_operand:SI 2 "general_operand" "rmni,rni,rni"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (PLUS, SImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); - return \"lea{l}\\t{%a2, %0|%0, %a2}\"; + return "lea{l}\t{%a2, %0|%0, %a2}"; case TYPE_INCDEC: if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{l}\\t%0\"; + return "inc{l}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%0\"; + return "dec{l}\t%0"; else abort(); @@ -5890,11 +5805,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; } - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "2") (const_string "lea") @@ -5917,7 +5832,6 @@ "reload_completed && true_regnum (operands[0]) != true_regnum (operands[1])" [(const_int 0)] - " { rtx pat; /* In -fPIC mode the constructs like (const (unspec [symbol_ref])) @@ -5933,7 +5847,7 @@ pat = gen_rtx_SUBREG (SImode, pat, 0); emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat)); DONE; -}") +}) ;; It may seem that nonimmediate operand is proper one for operand 1. ;; The addsi_1 pattern allows nonimmediate operand at that place and @@ -5947,19 +5861,18 @@ (match_operand:SI 2 "general_operand" "rmni,rni")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); - return \"lea{l}\\t{%a2, %k0|%k0, %a2}\"; + return "lea{l}\t{%a2, %k0|%k0, %a2}"; case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{l}\\t%k0\"; + return "inc{l}\t%k0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%k0\"; + return "dec{l}\t%k0"; else abort(); @@ -5972,11 +5885,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %k0|%k0, %2}\"; + return "sub{l}\t{%2, %k0|%k0, %2}"; } - return \"add{l}\\t{%2, %k0|%k0, %2}\"; + return "add{l}\t{%2, %k0|%k0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "1") (const_string "lea") @@ -6001,11 +5914,10 @@ && true_regnum (operands[0]) != true_regnum (operands[1])" [(set (match_dup 0) (zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))] - " { operands[1] = gen_lowpart (Pmode, operands[1]); operands[2] = gen_lowpart (Pmode, operands[2]); -}") +}) (define_insn "*addsi_2" [(set (reg 17) @@ -6020,7 +5932,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -6028,9 +5939,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{l}\\t%0\"; + return "inc{l}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%0\"; + return "dec{l}\t%0"; else abort(); @@ -6045,11 +5956,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; } - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6070,15 +5981,14 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{l}\\t%k0\"; + return "inc{l}\t%k0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%k0\"; + return "dec{l}\t%k0"; else abort(); @@ -6091,11 +6001,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %k0|%k0, %2}\"; + return "sub{l}\t{%2, %k0|%k0, %2}"; } - return \"add{l}\\t{%2, %k0|%k0, %2}\"; + return "add{l}\t{%2, %k0|%k0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6112,7 +6022,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -6120,9 +6029,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{l}\\t%0\"; + return "inc{l}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%0\"; + return "dec{l}\t%0"; else abort(); @@ -6137,11 +6046,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; } - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6160,15 +6069,14 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{l}\\t%k0\"; + return "inc{l}\t%k0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%k0\"; + return "dec{l}\t%k0"; else abort(); @@ -6181,11 +6089,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %k0|%k0, %2}\"; + return "sub{l}\t{%2, %k0|%k0, %2}"; } - return \"add{l}\\t{%2, %k0|%k0, %2}\"; + return "add{l}\t{%2, %k0|%k0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6207,15 +6115,14 @@ (clobber (match_scratch:SI 0 "=rm"))] "ix86_match_ccmode (insn, CCGCmode) && (INTVAL (operands[2]) & 0xffffffff) != 0x80000000" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == constm1_rtx) - return \"inc{l}\\t%0\"; + return "inc{l}\t%0"; else if (operands[2] == const1_rtx) - return \"dec{l}\\t%0\"; + return "dec{l}\t%0"; else abort(); @@ -6227,11 +6134,11 @@ if ((INTVAL (operands[2]) == -128 || (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) != 128))) - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6250,7 +6157,6 @@ /* Current assemblers are broken and do not allow @GOTOFF in ought but a memory context. */ && ! pic_symbolic_operand (operands[2], VOIDmode)" - "* { switch (get_attr_type (insn)) { @@ -6258,9 +6164,9 @@ if (! rtx_equal_p (operands[0], operands[1])) abort (); if (operands[2] == const1_rtx) - return \"inc{l}\\t%0\"; + return "inc{l}\t%0"; else if (operands[2] == constm1_rtx) - return \"dec{l}\\t%0\"; + return "dec{l}\t%0"; else abort(); @@ -6275,11 +6181,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; } - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:SI 2 "incdec_operand" "") (const_string "incdec") @@ -6305,19 +6211,18 @@ (clobber (reg:CC 17))] "!TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (PLUS, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: - return \"#\"; + return "#"; case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; abort(); default: @@ -6329,11 +6234,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; } - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (eq_attr "alternative" "2") (const_string "lea") @@ -6349,17 +6254,16 @@ (clobber (reg:CC 17))] "TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (PLUS, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; abort(); default: @@ -6371,11 +6275,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; } - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6392,17 +6296,16 @@ (plus:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (PLUS, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; abort(); default: @@ -6414,11 +6317,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; } - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6432,17 +6335,16 @@ (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCZmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; abort(); default: @@ -6454,11 +6356,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; } - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6473,7 +6375,6 @@ (clobber (match_scratch:HI 0 "=rm"))] "ix86_match_ccmode (insn, CCGCmode) && (INTVAL (operands[2]) & 0xffff) != 0x8000" - "* { switch (get_attr_type (insn)) { @@ -6481,9 +6382,9 @@ if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == const1_rtx) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; else abort(); @@ -6495,11 +6396,11 @@ if ((INTVAL (operands[2]) == -128 || (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) != 128))) - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6516,17 +6417,16 @@ (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCGOCmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{w}\\t%0\"; + return "inc{w}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 65535)) - return \"dec{w}\\t%0\"; + return "dec{w}\t%0"; abort(); default: @@ -6538,11 +6438,11 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{w}\\t{%2, %0|%0, %2}\"; + return "sub{w}\t{%2, %0|%0, %2}"; } - return \"add{w}\\t{%2, %0|%0, %2}\"; + return "add{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6565,20 +6465,19 @@ (clobber (reg:CC 17))] "!TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (PLUS, QImode, operands)" - "* { int widen = (which_alternative == 2); switch (get_attr_type (insn)) { case TYPE_LEA: - return \"#\"; + return "#"; case TYPE_INCDEC: if (operands[2] == const1_rtx) - return widen ? \"inc{l}\\t%k0\" : \"inc{b}\\t%0\"; + return widen ? "inc{l}\t%k0" : "inc{b}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return widen ? \"dec{l}\\t%k0\" : \"dec{b}\\t%0\"; + return widen ? "dec{l}\t%k0" : "dec{b}\t%0"; abort(); default: @@ -6591,16 +6490,16 @@ { operands[2] = GEN_INT (-INTVAL (operands[2])); if (widen) - return \"sub{l}\\t{%2, %k0|%k0, %2}\"; + return "sub{l}\t{%2, %k0|%k0, %2}"; else - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } if (widen) - return \"add{l}\\t{%k2, %k0|%k0, %k2}\"; + return "add{l}\t{%k2, %k0|%k0, %k2}"; else - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (eq_attr "alternative" "3") (const_string "lea") @@ -6616,18 +6515,17 @@ (clobber (reg:CC 17))] "TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (PLUS, QImode, operands)" - "* { int widen = (which_alternative == 2); switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return widen ? \"inc{l}\\t%k0\" : \"inc{b}\\t%0\"; + return widen ? "inc{l}\t%k0" : "inc{b}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return widen ? \"dec{l}\\t%k0\" : \"dec{b}\\t%0\"; + return widen ? "dec{l}\t%k0" : "dec{b}\t%0"; abort(); default: @@ -6640,16 +6538,16 @@ { operands[2] = GEN_INT (-INTVAL (operands[2])); if (widen) - return \"sub{l}\\t{%2, %k0|%k0, %2}\"; + return "sub{l}\t{%2, %k0|%k0, %2}"; else - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } if (widen) - return \"add{l}\\t{%k2, %k0|%k0, %k2}\"; + return "add{l}\t{%k2, %k0|%k0, %k2}"; else - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6666,17 +6564,16 @@ (plus:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (PLUS, QImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{b}\\t%0\"; + return "inc{b}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"dec{b}\\t%0\"; + return "dec{b}\t%0"; abort(); default: @@ -6685,11 +6582,11 @@ && INTVAL (operands[2]) < 0) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6703,17 +6600,16 @@ (clobber (match_scratch:QI 0 "=q"))] "ix86_match_ccmode (insn, CCZmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{b}\\t%0\"; + return "inc{b}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"dec{b}\\t%0\"; + return "dec{b}\t%0"; abort(); default: @@ -6722,11 +6618,11 @@ && INTVAL (operands[2]) < 0) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6741,7 +6637,6 @@ (clobber (match_scratch:QI 0 "=qm"))] "ix86_match_ccmode (insn, CCGCmode) && (INTVAL (operands[2]) & 0xff) != 0x80" - "* { switch (get_attr_type (insn)) { @@ -6749,9 +6644,9 @@ if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"inc{b}\\t%0\"; + return "inc{b}\t%0"; else if (operands[2] == const1_rtx) - return \"dec{b}\\t%0\"; + return "dec{b}\t%0"; else abort(); @@ -6761,11 +6656,11 @@ if (INTVAL (operands[2]) < 0) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:HI 2 "incdec_operand" "") (const_string "incdec") @@ -6782,17 +6677,16 @@ (clobber (match_scratch:QI 0 "=q"))] "ix86_match_ccmode (insn, CCGOCmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{b}\\t%0\"; + return "inc{b}\t%0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"dec{b}\\t%0\"; + return "dec{b}\t%0"; abort(); default: @@ -6801,11 +6695,11 @@ && INTVAL (operands[2]) < 0) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{b}\\t{%2, %0|%0, %2}\"; + return "sub{b}\t{%2, %0|%0, %2}"; } - return \"add{b}\\t{%2, %0|%0, %2}\"; + return "add{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6825,23 +6719,22 @@ (match_operand:QI 2 "general_operand" "Qmn"))) (clobber (reg:CC 17))] "!TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{b}\\t%h0\"; + return "inc{b}\t%h0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"dec{b}\\t%h0\"; + return "dec{b}\t%h0"; abort(); default: - return \"add{b}\\t{%2, %h0|%h0, %2}\"; + return "add{b}\t{%2, %h0|%h0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6860,23 +6753,22 @@ (match_operand:QI 2 "nonmemory_operand" "Qn"))) (clobber (reg:CC 17))] "TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_INCDEC: if (operands[2] == const1_rtx) - return \"inc{b}\\t%h0\"; + return "inc{b}\t%h0"; else if (operands[2] == constm1_rtx || (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 255)) - return \"dec{b}\\t%h0\"; + return "dec{b}\t%h0"; abort(); default: - return \"add{b}\\t{%2, %h0|%h0, %2}\"; + return "add{b}\t{%2, %h0|%h0, %2}"; } -}" +} [(set (attr "type") (if_then_else (match_operand:QI 2 "incdec_operand" "") (const_string "incdec") @@ -6898,7 +6790,7 @@ (const_int 8)))) (clobber (reg:CC 17))] "" - "add{b}\\t{%h2, %h0|%h0, %h2}" + "add{b}\t{%h2, %h0|%h0, %h2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -6976,7 +6868,7 @@ (match_operand:DI 2 "x86_64_general_operand" "re,rm")))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (MINUS, DImode, operands)" - "sbb{q}\\t{%2, %0|%0, %2}" + "sbb{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "ppro_uops" "few") @@ -6988,7 +6880,7 @@ (match_operand:DI 2 "x86_64_general_operand" "re,rm"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, DImode, operands)" - "sub{q}\\t{%2, %0|%0, %2}" + "sub{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -7002,7 +6894,7 @@ (minus:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (MINUS, DImode, operands)" - "sub{q}\\t{%2, %0|%0, %2}" + "sub{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -7014,7 +6906,7 @@ (minus:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCmode) && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{q}\\t{%2, %0|%0, %2}" + "sub{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -7026,7 +6918,7 @@ (match_operand:SI 2 "general_operand" "ri,rm")))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (MINUS, SImode, operands)" - "sbb{l}\\t{%2, %0|%0, %2}" + "sbb{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "ppro_uops" "few") @@ -7040,7 +6932,7 @@ (match_operand:SI 2 "general_operand" "ri,rm"))))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sbb{l}\\t{%2, %k0|%k0, %2}" + "sbb{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "pent_pair" "pu") (set_attr "ppro_uops" "few") @@ -7060,7 +6952,7 @@ (match_operand:SI 2 "general_operand" "ri,rm"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{l}\\t{%2, %0|%0, %2}" + "sub{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -7071,7 +6963,7 @@ (match_operand:SI 2 "general_operand" "rim")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{l}\\t{%2, %k0|%k0, %2}" + "sub{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -7085,7 +6977,7 @@ (minus:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{l}\\t{%2, %0|%0, %2}" + "sub{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -7101,7 +6993,7 @@ (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{l}\\t{%2, %k0|%k0, %2}" + "sub{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -7113,7 +7005,7 @@ (minus:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCmode) && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{l}\\t{%2, %0|%0, %2}" + "sub{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -7127,7 +7019,7 @@ (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCmode) && ix86_binary_operator_ok (MINUS, SImode, operands)" - "sub{q}\\t{%2, %0|%0, %2}" + "sub{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -7145,7 +7037,7 @@ (match_operand:HI 2 "general_operand" "ri,rm"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (MINUS, HImode, operands)" - "sub{w}\\t{%2, %0|%0, %2}" + "sub{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -7159,7 +7051,7 @@ (minus:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (MINUS, HImode, operands)" - "sub{w}\\t{%2, %0|%0, %2}" + "sub{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -7171,7 +7063,7 @@ (minus:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCmode) && ix86_binary_operator_ok (MINUS, HImode, operands)" - "sub{w}\\t{%2, %0|%0, %2}" + "sub{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -7189,7 +7081,7 @@ (match_operand:QI 2 "general_operand" "qn,qmn"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (MINUS, QImode, operands)" - "sub{b}\\t{%2, %0|%0, %2}" + "sub{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -7203,7 +7095,7 @@ (minus:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (MINUS, QImode, operands)" - "sub{b}\\t{%2, %0|%0, %2}" + "sub{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -7215,7 +7107,7 @@ (minus:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCmode) && ix86_binary_operator_ok (MINUS, QImode, operands)" - "sub{b}\\t{%2, %0|%0, %2}" + "sub{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -7267,9 +7159,9 @@ "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM) && TARGET_64BIT" "@ - imul{q}\\t{%2, %1, %0|%0, %1, %2} - imul{q}\\t{%2, %1, %0|%0, %1, %2} - imul{q}\\t{%2, %0|%0, %2}" + imul{q}\t{%2, %1, %0|%0, %1, %2} + imul{q}\t{%2, %1, %0|%0, %1, %2} + imul{q}\t{%2, %0|%0, %2}" [(set_attr "type" "imul") (set_attr "prefix_0f" "0,0,1") (set_attr "mode" "DI")]) @@ -7301,9 +7193,9 @@ ; The first is simply short-hand for the latter. But, some assemblers, ; like the SCO OSR5 COFF assembler, don't handle the first form. "@ - imul{l}\\t{%2, %1, %0|%0, %1, %2} - imul{l}\\t{%2, %1, %0|%0, %1, %2} - imul{l}\\t{%2, %0|%0, %2}" + imul{l}\t{%2, %1, %0|%0, %1, %2} + imul{l}\t{%2, %1, %0|%0, %1, %2} + imul{l}\t{%2, %0|%0, %2}" [(set_attr "type" "imul") (set_attr "prefix_0f" "0,0,1") (set_attr "mode" "SI")]) @@ -7329,9 +7221,9 @@ ; The first is simply short-hand for the latter. But, some assemblers, ; like the SCO OSR5 COFF assembler, don't handle the first form. "@ - imul{l}\\t{%2, %1, %k0|%k0, %1, %2} - imul{l}\\t{%2, %1, %k0|%k0, %1, %2} - imul{l}\\t{%2, %k0|%k0, %2}" + imul{l}\t{%2, %1, %k0|%k0, %1, %2} + imul{l}\t{%2, %1, %k0|%k0, %1, %2} + imul{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "imul") (set_attr "prefix_0f" "0,0,1") (set_attr "mode" "SI")]) @@ -7353,9 +7245,9 @@ ; %%% There was a note about "Assembler has weird restrictions", ; concerning alternative 1 when op1 == op0. True? "@ - imul{w}\\t{%2, %1, %0|%0, %1, %2} - imul{w}\\t{%2, %1, %0|%0, %1, %2} - imul{w}\\t{%2, %0|%0, %2}" + imul{w}\t{%2, %1, %0|%0, %1, %2} + imul{w}\t{%2, %1, %0|%0, %1, %2} + imul{w}\t{%2, %0|%0, %2}" [(set_attr "type" "imul") (set_attr "prefix_0f" "0,0,1") (set_attr "mode" "HI")]) @@ -7366,7 +7258,7 @@ (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] "TARGET_QIMODE_MATH" - "mul{b}\\t%2" + "mul{b}\t%2" [(set_attr "type" "imul") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -7377,7 +7269,7 @@ (zero_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm")))) (clobber (reg:CC 17))] "TARGET_QIMODE_MATH" - "mul{b}\\t%2" + "mul{b}\t%2" [(set_attr "type" "imul") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -7388,7 +7280,7 @@ (sign_extend:HI (match_operand:QI 2 "nonimmediate_operand" "qm")))) (clobber (reg:CC 17))] "TARGET_QIMODE_MATH" - "imul{b}\\t%2" + "imul{b}\t%2" [(set_attr "type" "imul") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -7399,7 +7291,7 @@ (zero_extend:TI (match_operand:DI 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC 17))] "TARGET_64BIT" - "mul{q}\\t%2" + "mul{q}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "length_immediate" "0") @@ -7412,7 +7304,7 @@ (zero_extend:DI (match_operand:SI 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC 17))] "!TARGET_64BIT" - "mul{l}\\t%2" + "mul{l}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "length_immediate" "0") @@ -7424,7 +7316,7 @@ (sign_extend:TI (match_operand:DI 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC 17))] "TARGET_64BIT" - "imul{q}\\t%2" + "imul{q}\t%2" [(set_attr "type" "imul") (set_attr "length_immediate" "0") (set_attr "mode" "DI")]) @@ -7435,7 +7327,7 @@ (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC 17))] "!TARGET_64BIT" - "imul{l}\\t%2" + "imul{l}\t%2" [(set_attr "type" "imul") (set_attr "length_immediate" "0") (set_attr "mode" "SI")]) @@ -7452,7 +7344,7 @@ (clobber (match_scratch:DI 3 "=a")) (clobber (reg:CC 17))] "TARGET_64BIT" - "mul{q}\\t%2" + "mul{q}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "length_immediate" "0") @@ -7470,7 +7362,7 @@ (clobber (match_scratch:SI 3 "=a")) (clobber (reg:CC 17))] "" - "mul{l}\\t%2" + "mul{l}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "length_immediate" "0") @@ -7488,7 +7380,7 @@ (clobber (match_scratch:SI 3 "=a")) (clobber (reg:CC 17))] "TARGET_64BIT" - "mul{l}\\t%2" + "mul{l}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "length_immediate" "0") @@ -7506,7 +7398,7 @@ (clobber (match_scratch:DI 3 "=a")) (clobber (reg:CC 17))] "TARGET_64BIT" - "imul{q}\\t%2" + "imul{q}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "mode" "DI")]) @@ -7523,7 +7415,7 @@ (clobber (match_scratch:SI 3 "=a")) (clobber (reg:CC 17))] "" - "imul{l}\\t%2" + "imul{l}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "mode" "SI")]) @@ -7540,7 +7432,7 @@ (clobber (match_scratch:SI 3 "=a")) (clobber (reg:CC 17))] "TARGET_64BIT" - "imul{l}\\t%2" + "imul{l}\t%2" [(set_attr "type" "imul") (set_attr "ppro_uops" "few") (set_attr "mode" "SI")]) @@ -7583,7 +7475,7 @@ (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] "TARGET_QIMODE_MATH" - "idiv{b}\\t%2" + "idiv{b}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "QI") (set_attr "ppro_uops" "few")]) @@ -7594,7 +7486,7 @@ (match_operand:QI 2 "nonimmediate_operand" "qm"))) (clobber (reg:CC 17))] "TARGET_QIMODE_MATH" - "div{b}\\t%2" + "div{b}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "QI") (set_attr "ppro_uops" "few")]) @@ -7675,7 +7567,7 @@ (use (match_operand:DI 4 "register_operand" "3")) (clobber (reg:CC 17))] "TARGET_64BIT" - "idiv{q}\\t%2" + "idiv{q}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "DI") (set_attr "ppro_uops" "few")]) @@ -7697,7 +7589,6 @@ (mod:DI (reg:DI 0) (match_dup 2))) (use (match_dup 3)) (clobber (reg:CC 17))])] - " { /* Avoid use of cltd in favour of a mov+shift. */ if (!TARGET_USE_CLTD && !optimize_size) @@ -7714,7 +7605,7 @@ abort(); operands[4] = operands[1]; } -}") +}) (define_expand "divmodsi4" @@ -7761,7 +7652,7 @@ (use (match_operand:SI 4 "register_operand" "3")) (clobber (reg:CC 17))] "" - "idiv{l}\\t%2" + "idiv{l}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "SI") (set_attr "ppro_uops" "few")]) @@ -7783,7 +7674,6 @@ (mod:SI (reg:SI 0) (match_dup 2))) (use (match_dup 3)) (clobber (reg:CC 17))])] - " { /* Avoid use of cltd in favour of a mov+shift. */ if (!TARGET_USE_CLTD && !optimize_size) @@ -7800,7 +7690,7 @@ abort(); operands[4] = operands[1]; } -}") +}) ;; %%% Split me. (define_insn "divmodhi4" [(set (match_operand:HI 0 "register_operand" "=a") @@ -7810,7 +7700,7 @@ (mod:HI (match_dup 1) (match_dup 2))) (clobber (reg:CC 17))] "TARGET_HIMODE_MATH" - "cwtd\;idiv{w}\\t%2" + "cwtd\;idiv{w}\t%2" [(set_attr "type" "multi") (set_attr "length_immediate" "0") (set_attr "mode" "SI")]) @@ -7823,7 +7713,7 @@ (umod:DI (match_dup 1) (match_dup 2))) (clobber (reg:CC 17))] "TARGET_64BIT" - "xor{q}\\t%3, %3\;div{q}\\t%2" + "xor{q}\t%3, %3\;div{q}\t%2" [(set_attr "type" "multi") (set_attr "length_immediate" "0") (set_attr "mode" "DI")]) @@ -7837,7 +7727,7 @@ (use (match_dup 3)) (clobber (reg:CC 17))] "TARGET_64BIT" - "div{q}\\t%2" + "div{q}\t%2" [(set_attr "type" "idiv") (set_attr "ppro_uops" "few") (set_attr "mode" "DI")]) @@ -7867,7 +7757,7 @@ (umod:SI (match_dup 1) (match_dup 2))) (clobber (reg:CC 17))] "" - "xor{l}\\t%3, %3\;div{l}\\t%2" + "xor{l}\t%3, %3\;div{l}\t%2" [(set_attr "type" "multi") (set_attr "length_immediate" "0") (set_attr "mode" "SI")]) @@ -7881,7 +7771,7 @@ (use (match_dup 3)) (clobber (reg:CC 17))] "" - "div{l}\\t%2" + "div{l}\t%2" [(set_attr "type" "idiv") (set_attr "ppro_uops" "few") (set_attr "mode" "SI")]) @@ -7924,7 +7814,7 @@ (use (match_operand:HI 4 "register_operand" "3")) (clobber (reg:CC 17))] "" - "div{w}\\t%2" + "div{w}\t%2" [(set_attr "type" "idiv") (set_attr "mode" "HI") (set_attr "ppro_uops" "few")]) @@ -7945,7 +7835,7 @@ ; (umod:DI (match_dup 1) (zero_extend:DI (match_dup 2))))) ; (clobber (reg:CC 17))] ; "" -; "div{l}\\t{%2, %0|%0, %2}" +; "div{l}\t{%2, %0|%0, %2}" ; [(set_attr "type" "idiv") ; (set_attr "ppro_uops" "few")]) @@ -7962,11 +7852,11 @@ (const_int 0)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" "@ - test{l}\\t{%k1, %k0|%k0, %k1} - test{l}\\t{%k1, %k0|%k0, %k1} - test{q}\\t{%1, %0|%0, %1} - test{q}\\t{%1, %0|%0, %1} - test{q}\\t{%1, %0|%0, %1}" + test{l}\t{%k1, %k0|%k0, %k1} + test{l}\t{%k1, %k0|%k0, %k1} + test{q}\t{%1, %0|%0, %1} + test{q}\t{%1, %0|%0, %1} + test{q}\t{%1, %0|%0, %1}" [(set_attr "type" "test") (set_attr "modrm" "0,1,0,1,1") (set_attr "mode" "SI,SI,DI,DI,DI") @@ -7979,7 +7869,7 @@ (match_operand:SI 1 "nonmemory_operand" "in,in,rin")) (const_int 0)))] "ix86_match_ccmode (insn, CCNOmode)" - "test{l}\\t{%1, %0|%0, %1}" + "test{l}\t{%1, %0|%0, %1}" [(set_attr "type" "test") (set_attr "modrm" "0,1,1") (set_attr "mode" "SI") @@ -8000,7 +7890,7 @@ (match_operand:HI 1 "nonmemory_operand" "n,n,rn")) (const_int 0)))] "ix86_match_ccmode (insn, CCNOmode)" - "test{w}\\t{%1, %0|%0, %1}" + "test{w}\t{%1, %0|%0, %1}" [(set_attr "type" "test") (set_attr "modrm" "0,1,1") (set_attr "mode" "HI") @@ -8020,17 +7910,16 @@ (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n")) (const_int 0)))] "ix86_match_ccmode (insn, CCNOmode)" - "* { if (which_alternative == 3) { if (GET_CODE (operands[1]) == CONST_INT && (INTVAL (operands[1]) & 0xffffff00)) operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff); - return \"test{l}\\t{%1, %k0|%k0, %1}\"; + return "test{l}\t{%1, %k0|%k0, %1}"; } - return \"test{b}\\t{%1, %0|%0, %1}\"; -}" + return "test{b}\t{%1, %0|%0, %1}"; +} [(set_attr "type" "test") (set_attr "modrm" "0,1,1,1") (set_attr "mode" "QI,QI,QI,SI") @@ -8061,7 +7950,7 @@ (const_int 0)))] "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff && ix86_match_ccmode (insn, CCNOmode)" - "test{b}\\t{%1, %h0|%h0, %1}" + "test{b}\t{%1, %h0|%h0, %1}" [(set_attr "type" "test") (set_attr "mode" "QI") (set_attr "length_immediate" "1") @@ -8079,7 +7968,7 @@ (match_operand:QI 1 "nonimmediate_operand" "Qm"))) (const_int 0)))] "!TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" - "test{b}\\t{%1, %h0|%h0, %1}" + "test{b}\t{%1, %h0|%h0, %1}" [(set_attr "type" "test") (set_attr "mode" "QI")]) @@ -8095,7 +7984,7 @@ (match_operand:QI 1 "register_operand" "Q"))) (const_int 0)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" - "test{b}\\t{%1, %h0|%h0, %1}" + "test{b}\t{%1, %h0|%h0, %1}" [(set_attr "type" "test") (set_attr "mode" "QI")]) @@ -8113,7 +8002,7 @@ (const_int 8))) (const_int 0)))] "ix86_match_ccmode (insn, CCNOmode)" - "test{b}\\t{%h1, %h0|%h0, %h1}" + "test{b}\t{%h1, %h0|%h0, %h1}" [(set_attr "type" "test") (set_attr "mode" "QI")]) @@ -8156,7 +8045,6 @@ (const_int 0)))] "ix86_match_ccmode (insn, CCNOmode)" [(set (reg:CCNO 17) (compare:CCNO (match_dup 3) (const_int 0)))] - " { HOST_WIDE_INT len = INTVAL (operands[1]); HOST_WIDE_INT pos = INTVAL (operands[2]); @@ -8186,7 +8074,7 @@ operands[3] = gen_rtx_AND (mode, operands[0], GEN_INT (trunc_int_for_mode (mask, mode))); -}") +}) ;; %%% This used to optimize known byte-wide and operations to memory, ;; and sometimes to QImode registers. If this is considered useful, @@ -8206,7 +8094,6 @@ (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm,L"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (AND, DImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -8225,20 +8112,20 @@ operands[1] = gen_lowpart (mode, operands[1]); if (mode == QImode) - return \"movz{bq|x}\\t{%1,%0|%0, %1}\"; + return "movz{bq|x}\t{%1,%0|%0, %1}"; else - return \"movz{wq|x}\\t{%1,%0|%0, %1}\"; + return "movz{wq|x}\t{%1,%0|%0, %1}"; } default: if (! rtx_equal_p (operands[0], operands[1])) abort (); if (get_attr_mode (insn) == MODE_SI) - return \"and{l}\\t{%k2, %k0|%k0, %k2}\"; + return "and{l}\t{%k2, %k0|%k0, %k2}"; else - return \"and{q}\\t{%2, %0|%0, %2}\"; + return "and{q}\t{%2, %0|%0, %2}"; } -}" +} [(set_attr "type" "alu,alu,alu,imovx") (set_attr "length_immediate" "*,*,*,0") (set_attr "mode" "SI,DI,DI,DI")]) @@ -8253,9 +8140,9 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (AND, DImode, operands)" "@ - and{l}\\t{%k2, %k0|%k0, %k2} - and{q}\\t{%2, %0|%0, %2} - and{q}\\t{%2, %0|%0, %2}" + and{l}\t{%k2, %k0|%k0, %k2} + and{q}\t{%2, %0|%0, %2} + and{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI,DI,DI")]) @@ -8273,7 +8160,6 @@ (match_operand:SI 2 "general_operand" "ri,rm,L"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (AND, SImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -8292,17 +8178,17 @@ operands[1] = gen_lowpart (mode, operands[1]); if (mode == QImode) - return \"movz{bl|x}\\t{%1,%0|%0, %1}\"; + return "movz{bl|x}\t{%1,%0|%0, %1}"; else - return \"movz{wl|x}\\t{%1,%0|%0, %1}\"; + return "movz{wl|x}\t{%1,%0|%0, %1}"; } default: if (! rtx_equal_p (operands[0], operands[1])) abort (); - return \"and{l}\\t{%2, %0|%0, %2}\"; + return "and{l}\t{%2, %0|%0, %2}"; } -}" +} [(set_attr "type" "alu,alu,imovx") (set_attr "length_immediate" "*,*,0") (set_attr "mode" "SI")]) @@ -8352,7 +8238,7 @@ (match_operand:SI 2 "general_operand" "rim")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)" - "and{l}\\t{%2, %k0|%k0, %2}" + "and{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8365,7 +8251,7 @@ (and:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (AND, SImode, operands)" - "and{l}\\t{%2, %0|%0, %2}" + "and{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8379,7 +8265,7 @@ (zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (AND, SImode, operands)" - "and{l}\\t{%2, %k0|%k0, %2}" + "and{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8397,7 +8283,6 @@ (match_operand:HI 2 "general_operand" "ri,rm,L"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (AND, HImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -8405,16 +8290,16 @@ if (GET_CODE (operands[2]) != CONST_INT) abort (); if (INTVAL (operands[2]) == 0xff) - return \"movz{bl|x}\\t{%b1, %k0|%k0, %b1}\"; + return "movz{bl|x}\t{%b1, %k0|%k0, %b1}"; abort (); default: if (! rtx_equal_p (operands[0], operands[1])) abort (); - return \"and{w}\\t{%2, %0|%0, %2}\"; + return "and{w}\t{%2, %0|%0, %2}"; } -}" +} [(set_attr "type" "alu,alu,imovx") (set_attr "length_immediate" "*,*,0") (set_attr "mode" "HI,HI,SI")]) @@ -8428,7 +8313,7 @@ (and:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (AND, HImode, operands)" - "and{w}\\t{%2, %0|%0, %2}" + "and{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -8448,9 +8333,9 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (AND, QImode, operands)" "@ - and{b}\\t{%2, %0|%0, %2} - and{b}\\t{%2, %0|%0, %2} - and{l}\\t{%k2, %k0|%k0, %k2}" + and{b}\t{%2, %0|%0, %2} + and{b}\t{%2, %0|%0, %2} + and{l}\t{%k2, %k0|%k0, %k2}" [(set_attr "type" "alu") (set_attr "mode" "QI,QI,SI")]) @@ -8460,7 +8345,7 @@ (match_operand:QI 1 "general_operand" "qi,qmi"))) (clobber (reg:CC 17))] "" - "and{b}\\t{%1, %0|%0, %1}" + "and{b}\t{%1, %0|%0, %1}" [(set_attr "type" "alu1") (set_attr "mode" "QI")]) @@ -8474,17 +8359,16 @@ (and:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (AND, QImode, operands)" - "* { if (which_alternative == 2) { if (GET_CODE (operands[2]) == CONST_INT && (INTVAL (operands[2]) & 0xffffff00)) operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); - return \"and{l}\\t{%2, %k0|%k0, %2}\"; + return "and{l}\t{%2, %k0|%k0, %2}"; } - return \"and{b}\\t{%2, %0|%0, %2}\"; -}" + return "and{b}\t{%2, %0|%0, %2}"; +} [(set_attr "type" "alu") (set_attr "mode" "QI,QI,SI")]) @@ -8497,7 +8381,7 @@ (set (strict_low_part (match_dup 0)) (and:QI (match_dup 0) (match_dup 1)))] "ix86_match_ccmode (insn, CCNOmode)" - "and{b}\\t{%1, %0|%0, %1}" + "and{b}\t{%1, %0|%0, %1}" [(set_attr "type" "alu1") (set_attr "mode" "QI")]) @@ -8517,7 +8401,7 @@ (match_operand 2 "const_int_operand" "n"))) (clobber (reg:CC 17))] "(unsigned HOST_WIDE_INT)INTVAL (operands[2]) <= 0xff" - "and{b}\\t{%2, %h0|%h0, %2}" + "and{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "length_immediate" "1") (set_attr "mode" "QI")]) @@ -8546,7 +8430,7 @@ (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && (unsigned HOST_WIDE_INT)INTVAL (operands[2]) <= 0xff" - "and{b}\\t{%2, %h0|%h0, %2}" + "and{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "length_immediate" "1") (set_attr "mode" "QI")]) @@ -8564,7 +8448,7 @@ (match_operand:QI 2 "general_operand" "Qm")))) (clobber (reg:CC 17))] "!TARGET_64BIT" - "and{b}\\t{%2, %h0|%h0, %2}" + "and{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -8582,7 +8466,7 @@ (match_operand 2 "ext_register_operand" "Q")))) (clobber (reg:CC 17))] "TARGET_64BIT" - "and{b}\\t{%2, %h0|%h0, %2}" + "and{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -8602,7 +8486,7 @@ (const_int 8)))) (clobber (reg:CC 17))] "" - "and{b}\\t{%h2, %h0|%h0, %h2}" + "and{b}\t{%h2, %h0|%h0, %h2}" [(set_attr "type" "alu") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -8627,7 +8511,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (IOR, DImode, operands)" - "or{q}\\t{%2, %0|%0, %2}" + "or{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -8641,7 +8525,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, DImode, operands)" - "or{q}\\t{%2, %0|%0, %2}" + "or{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -8654,7 +8538,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, DImode, operands)" - "or{q}\\t{%2, %0|%0, %2}" + "or{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -8673,7 +8557,7 @@ (match_operand:SI 2 "general_operand" "ri,rmi"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (IOR, SImode, operands)" - "or{l}\\t{%2, %0|%0, %2}" + "or{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8685,7 +8569,7 @@ (match_operand:SI 2 "general_operand" "rim")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (IOR, SImode, operands)" - "or{l}\\t{%2, %k0|%k0, %2}" + "or{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8695,7 +8579,7 @@ (match_operand:DI 2 "x86_64_zext_immediate_operand" "Z"))) (clobber (reg:CC 17))] "TARGET_64BIT" - "or{l}\\t{%2, %k0|%k0, %2}" + "or{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8708,7 +8592,7 @@ (ior:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, SImode, operands)" - "or{l}\\t{%2, %0|%0, %2}" + "or{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8723,7 +8607,7 @@ (zero_extend:DI (ior:SI (match_dup 1) (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, SImode, operands)" - "or{l}\\t{%2, %k0|%k0, %2}" + "or{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8736,7 +8620,7 @@ (ior:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, SImode, operands)" - "or{l}\\t{%2, %k0|%k0, %2}" + "or{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8748,7 +8632,7 @@ (clobber (match_scratch:SI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "or{l}\\t{%2, %0|%0, %2}" + "or{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8766,7 +8650,7 @@ (match_operand:HI 2 "general_operand" "rmi,ri"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (IOR, HImode, operands)" - "or{w}\\t{%2, %0|%0, %2}" + "or{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -8779,7 +8663,7 @@ (ior:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, HImode, operands)" - "or{w}\\t{%2, %0|%0, %2}" + "or{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -8791,7 +8675,7 @@ (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "or{w}\\t{%2, %0|%0, %2}" + "or{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -8811,9 +8695,9 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (IOR, QImode, operands)" "@ - or{b}\\t{%2, %0|%0, %2} - or{b}\\t{%2, %0|%0, %2} - or{l}\\t{%k2, %k0|%k0, %k2}" + or{b}\t{%2, %0|%0, %2} + or{b}\t{%2, %0|%0, %2} + or{l}\t{%k2, %k0|%k0, %k2}" [(set_attr "type" "alu") (set_attr "mode" "QI,QI,SI")]) @@ -8823,7 +8707,7 @@ (match_operand:QI 1 "general_operand" "qmi,qi"))) (clobber (reg:CC 17))] "" - "or{b}\\t{%1, %0|%0, %1}" + "or{b}\t{%1, %0|%0, %1}" [(set_attr "type" "alu1") (set_attr "mode" "QI")]) @@ -8836,7 +8720,7 @@ (ior:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (IOR, QImode, operands)" - "or{b}\\t{%2, %0|%0, %2}" + "or{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -8848,7 +8732,7 @@ (set (strict_low_part (match_dup 0)) (ior:QI (match_dup 0) (match_dup 1)))] "ix86_match_ccmode (insn, CCNOmode)" - "or{b}\\t{%1, %0|%0, %1}" + "or{b}\t{%1, %0|%0, %1}" [(set_attr "type" "alu1") (set_attr "mode" "QI")]) @@ -8860,7 +8744,7 @@ (clobber (match_scratch:QI 0 "=q"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "or{b}\\t{%2, %0|%0, %2}" + "or{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -8886,8 +8770,8 @@ "TARGET_64BIT && ix86_binary_operator_ok (XOR, DImode, operands)" "@ - xor{q}\\t{%2, %0|%0, %2} - xor{q}\\t{%2, %0|%0, %2}" + xor{q}\t{%2, %0|%0, %2} + xor{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI,DI")]) @@ -8902,8 +8786,8 @@ && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, DImode, operands)" "@ - xor{q}\\t{%2, %0|%0, %2} - xor{q}\\t{%2, %0|%0, %2}" + xor{q}\t{%2, %0|%0, %2} + xor{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI,DI")]) @@ -8916,7 +8800,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, DImode, operands)" - "xor{q}\\t{%2, %0|%0, %2}" + "xor{q}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "DI")]) @@ -8934,7 +8818,7 @@ (match_operand:SI 2 "general_operand" "ri,rm"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %0|%0, %2}" + "xor{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8947,7 +8831,7 @@ (match_operand:SI 2 "general_operand" "rim")))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %k0|%k0, %2}" + "xor{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8957,7 +8841,7 @@ (match_operand:DI 2 "x86_64_zext_immediate_operand" "Z"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %k0|%k0, %2}" + "xor{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8970,7 +8854,7 @@ (xor:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %0|%0, %2}" + "xor{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8985,7 +8869,7 @@ (zero_extend:DI (xor:SI (match_dup 1) (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %k0|%k0, %2}" + "xor{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -8998,7 +8882,7 @@ (xor:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, SImode, operands)" - "xor{l}\\t{%2, %k0|%k0, %2}" + "xor{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -9010,7 +8894,7 @@ (clobber (match_scratch:SI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "xor{l}\\t{%2, %0|%0, %2}" + "xor{l}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "SI")]) @@ -9028,7 +8912,7 @@ (match_operand:HI 2 "general_operand" "rmi,ri"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (XOR, HImode, operands)" - "xor{w}\\t{%2, %0|%0, %2}" + "xor{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -9041,7 +8925,7 @@ (xor:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, HImode, operands)" - "xor{w}\\t{%2, %0|%0, %2}" + "xor{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -9053,7 +8937,7 @@ (clobber (match_scratch:HI 0 "=r"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "xor{w}\\t{%2, %0|%0, %2}" + "xor{w}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "HI")]) @@ -9073,9 +8957,9 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (XOR, QImode, operands)" "@ - xor{b}\\t{%2, %0|%0, %2} - xor{b}\\t{%2, %0|%0, %2} - xor{l}\\t{%k2, %k0|%k0, %k2}" + xor{b}\t{%2, %0|%0, %2} + xor{b}\t{%2, %0|%0, %2} + xor{l}\t{%k2, %k0|%k0, %k2}" [(set_attr "type" "alu") (set_attr "mode" "QI,QI,SI")]) @@ -9092,7 +8976,7 @@ (const_int 8)))) (clobber (reg:CC 17))] "" - "xor{b}\\t{%h2, %h0|%h0, %h2}" + "xor{b}\t{%h2, %h0|%h0, %h2}" [(set_attr "type" "alu") (set_attr "length_immediate" "0") (set_attr "mode" "QI")]) @@ -9107,7 +8991,7 @@ (xor:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCNOmode) && ix86_binary_operator_ok (XOR, QImode, operands)" - "xor{b}\\t{%2, %0|%0, %2}" + "xor{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -9120,7 +9004,7 @@ (clobber (match_scratch:QI 0 "=q"))] "ix86_match_ccmode (insn, CCNOmode) && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" - "xor{b}\\t{%2, %0|%0, %2}" + "xor{b}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -9141,7 +9025,7 @@ (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8)) (match_dup 2)))] "!TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" - "xor{b}\\t{%2, %h0|%h0, %2}" + "xor{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -9162,7 +9046,7 @@ (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8)) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)" - "xor{b}\\t{%2, %h0|%h0, %2}" + "xor{b}\t{%2, %h0|%h0, %2}" [(set_attr "type" "alu") (set_attr "mode" "QI")]) @@ -9231,7 +9115,7 @@ (neg:DI (match_operand:DI 1 "nonimmediate_operand" "0"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_unary_operator_ok (NEG, DImode, operands)" - "neg{q}\\t%0" + "neg{q}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "DI")]) @@ -9246,7 +9130,7 @@ (set (match_operand:DI 0 "nonimmediate_operand" "=rm") (neg:DI (match_dup 1)))] "TARGET_64BIT && ix86_unary_operator_ok (NEG, DImode, operands)" - "neg{q}\\t%0" + "neg{q}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "DI")]) @@ -9263,7 +9147,7 @@ (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0"))) (clobber (reg:CC 17))] "ix86_unary_operator_ok (NEG, SImode, operands)" - "neg{l}\\t%0" + "neg{l}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -9275,7 +9159,7 @@ (const_int 32))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)" - "neg{l}\\t%k0" + "neg{l}\t%k0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -9290,7 +9174,7 @@ (set (match_operand:SI 0 "nonimmediate_operand" "=rm") (neg:SI (match_dup 1)))] "ix86_unary_operator_ok (NEG, SImode, operands)" - "neg{l}\\t%0" + "neg{l}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -9307,7 +9191,7 @@ (const_int 32))) (const_int 32)))] "TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)" - "neg{l}\\t%k0" + "neg{l}\t%k0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -9323,7 +9207,7 @@ (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0"))) (clobber (reg:CC 17))] "ix86_unary_operator_ok (NEG, HImode, operands)" - "neg{w}\\t%0" + "neg{w}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "HI")]) @@ -9334,7 +9218,7 @@ (set (match_operand:HI 0 "nonimmediate_operand" "=rm") (neg:HI (match_dup 1)))] "ix86_unary_operator_ok (NEG, HImode, operands)" - "neg{w}\\t%0" + "neg{w}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "HI")]) @@ -9350,7 +9234,7 @@ (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))) (clobber (reg:CC 17))] "ix86_unary_operator_ok (NEG, QImode, operands)" - "neg{b}\\t%0" + "neg{b}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "QI")]) @@ -9361,7 +9245,7 @@ (set (match_operand:QI 0 "nonimmediate_operand" "=qm") (neg:QI (match_dup 1)))] "ix86_unary_operator_ok (NEG, QImode, operands)" - "neg{b}\\t%0" + "neg{b}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "QI")]) @@ -9446,7 +9330,6 @@ [(set (subreg:TI (match_dup 0) 0) (xor:TI (subreg:TI (match_dup 1) 0) (subreg:TI (match_dup 2) 0)))] - " { if (operands_match_p (operands[0], operands[2])) { @@ -9455,7 +9338,7 @@ operands[1] = operands[2]; operands[2] = tmp; } -}") +}) ;; Keep 'f' and 'r' in separate alternatives to avoid reload problems @@ -9495,7 +9378,6 @@ "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" [(parallel [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) (clobber (reg:CC 17))])] - " { int size = GET_MODE_SIZE (GET_MODE (operands[1])); @@ -9505,7 +9387,7 @@ operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0)); operands[0] = adj_offsettable_operand (operands[0], size - 1); operands[1] = GEN_INT (trunc_int_for_mode (0x80, QImode)); -}") +}) (define_expand "negdf2" [(parallel [(set (match_operand:DF 0 "nonimmediate_operand" "") @@ -9614,7 +9496,6 @@ [(set (subreg:TI (match_dup 0) 0) (xor:TI (subreg:TI (match_dup 1) 0) (subreg:TI (match_dup 2) 0)))] - " { if (operands_match_p (operands[0], operands[2])) { @@ -9623,7 +9504,7 @@ operands[1] = operands[2]; operands[2] = tmp; } -}") +}) ;; Keep 'f' and 'r' in separate alternatives to avoid reload problems ;; because of secondary memory needed to reload from class FLOAT_INT_REGS @@ -9950,7 +9831,6 @@ "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" [(parallel [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) (clobber (reg:CC 17))])] - " { int size = GET_MODE_SIZE (GET_MODE (operands[1])); @@ -9960,7 +9840,7 @@ operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0)); operands[0] = adj_offsettable_operand (operands[0], size - 1); operands[1] = GEN_INT (trunc_int_for_mode (~0x80, QImode)); -}") +}) (define_expand "absdf2" [(parallel [(set (match_operand:DF 0 "nonimmediate_operand" "") @@ -10261,7 +10141,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=rm") (not:DI (match_operand:DI 1 "nonimmediate_operand" "0")))] "TARGET_64BIT && ix86_unary_operator_ok (NOT, DImode, operands)" - "not{q}\\t%0" + "not{q}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "DI")]) @@ -10301,7 +10181,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=rm") (not:SI (match_operand:SI 1 "nonimmediate_operand" "0")))] "ix86_unary_operator_ok (NOT, SImode, operands)" - "not{l}\\t%0" + "not{l}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -10310,7 +10190,7 @@ [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (not:SI (match_operand:SI 1 "register_operand" "0"))))] "TARGET_64BIT && ix86_unary_operator_ok (NOT, SImode, operands)" - "not{l}\\t%k0" + "not{l}\t%k0" [(set_attr "type" "negnot") (set_attr "mode" "SI")]) @@ -10377,7 +10257,7 @@ [(set (match_operand:HI 0 "nonimmediate_operand" "=rm") (not:HI (match_operand:HI 1 "nonimmediate_operand" "0")))] "ix86_unary_operator_ok (NOT, HImode, operands)" - "not{w}\\t%0" + "not{w}\t%0" [(set_attr "type" "negnot") (set_attr "mode" "HI")]) @@ -10419,8 +10299,8 @@ (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")))] "ix86_unary_operator_ok (NOT, QImode, operands)" "@ - not{b}\\t%0 - not{l}\\t%k0" + not{b}\t%0 + not{l}\t%k0" [(set_attr "type" "negnot") (set_attr "mode" "QI,SI")]) @@ -10480,7 +10360,6 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))])] "" - " { if (!TARGET_64BIT && TARGET_CMOVE && ! immediate_operand (operands[2], QImode)) { @@ -10489,7 +10368,7 @@ } ix86_expand_binary_operator (ASHIFT, DImode, operands); DONE; -}") +}) (define_insn "*ashldi3_1_rex64" [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,r") @@ -10497,7 +10376,6 @@ (match_operand:QI 2 "nonmemory_operand" "cJ,M"))) (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ASHIFT, DImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -10506,7 +10384,7 @@ abort (); if (!rtx_equal_p (operands[0], operands[1])) abort (); - return \"add{q}\\t{%0, %0|%0, %0}\"; + return "add{q}\t{%0, %0|%0, %0}"; case TYPE_LEA: if (GET_CODE (operands[2]) != CONST_INT @@ -10514,19 +10392,19 @@ abort (); operands[1] = gen_rtx_MULT (DImode, operands[1], GEN_INT (1 << INTVAL (operands[2]))); - return \"lea{q}\\t{%a1, %0|%0, %a1}\"; + return "lea{q}\t{%a1, %0|%0, %a1}"; default: if (REG_P (operands[2])) - return \"sal{q}\\t{%b2, %0|%0, %b2}\"; + return "sal{q}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{q}\\t%0\"; + return "sal{q}\t%0"; else - return \"sal{q}\\t{%2, %0|%0, %2}\"; + return "sal{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "1") (const_string "lea") @@ -10567,26 +10445,25 @@ (ashift:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, DImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{q}\\t{%0, %0|%0, %0}\"; + return "add{q}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{q}\\t{%b2, %0|%0, %b2}\"; + return "sal{q}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{q}\\t%0\"; + return "sal{q}\t%0"; else - return \"sal{q}\\t{%2, %0|%0, %2}\"; + return "sal{q}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -10644,8 +10521,8 @@ (clobber (reg:CC 17))] "" "@ - shld{l}\\t{%2, %1, %0|%0, %1, %2} - shld{l}\\t{%s2%1, %0|%0, %1, %2}" + shld{l}\t{%2, %1, %0|%0, %1, %2} + shld{l}\t{%s2%1, %0|%0, %1, %2}" [(set_attr "type" "ishift") (set_attr "prefix_0f" "1") (set_attr "mode" "SI") @@ -10674,7 +10551,6 @@ (use (match_operand:SI 1 "register_operand" "")) (use (match_operand:QI 2 "register_operand" ""))] "" - " { rtx label = gen_label_rtx (); rtx tmp; @@ -10696,7 +10572,7 @@ LABEL_NUSES (label) = 1; DONE; -}") +}) (define_expand "ashlsi3" [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -10712,7 +10588,6 @@ (match_operand:QI 2 "nonmemory_operand" "cI,M"))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFT, SImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -10721,22 +10596,22 @@ abort (); if (!rtx_equal_p (operands[0], operands[1])) abort (); - return \"add{l}\\t{%0, %0|%0, %0}\"; + return "add{l}\t{%0, %0|%0, %0}"; case TYPE_LEA: - return \"#\"; + return "#"; default: if (REG_P (operands[2])) - return \"sal{l}\\t{%b2, %0|%0, %b2}\"; + return "sal{l}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{l}\\t%0\"; + return "sal{l}\t%0"; else - return \"sal{l}\\t{%2, %0|%0, %2}\"; + return "sal{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "1") (const_string "lea") @@ -10758,7 +10633,6 @@ "reload_completed && true_regnum (operands[0]) != true_regnum (operands[1])" [(const_int 0)] - " { rtx pat; operands[0] = gen_lowpart (SImode, operands[0]); @@ -10770,7 +10644,7 @@ pat = gen_rtx_SUBREG (SImode, pat, 0); emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat)); DONE; -}") +}) (define_insn "*ashlsi3_1_zext" [(set (match_operand:DI 0 "register_operand" "=r,r") @@ -10778,29 +10652,28 @@ (match_operand:QI 2 "nonmemory_operand" "cI,M")))) (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFT, SImode, operands) && TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{l}\\t{%k0, %k0|%k0, %k0}\"; + return "add{l}\t{%k0, %k0|%k0, %k0}"; case TYPE_LEA: - return \"#\"; + return "#"; default: if (REG_P (operands[2])) - return \"sal{l}\\t{%b2, %k0|%k0, %b2}\"; + return "sal{l}\t{%b2, %k0|%k0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{l}\\t%k0\"; + return "sal{l}\t%k0"; else - return \"sal{l}\\t{%2, %k0|%k0, %2}\"; + return "sal{l}\t{%2, %k0|%k0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "1") (const_string "lea") @@ -10821,12 +10694,11 @@ "reload_completed && true_regnum (operands[0]) != true_regnum (operands[1])" [(set (match_dup 0) (zero_extend:DI (subreg:SI (mult:SI (match_dup 1) (match_dup 2)) 0)))] - " { operands[1] = gen_lowpart (Pmode, operands[1]); operands[2] = GEN_INT (trunc_int_for_mode (1 << INTVAL (operands[2]), Pmode)); -}") +}) ;; This pattern can't accept a variable shift count, since shifts by ;; zero don't affect the flags. We assume that shifts by constant @@ -10841,26 +10713,25 @@ (ashift:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, SImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{l}\\t{%0, %0|%0, %0}\"; + return "add{l}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{l}\\t{%b2, %0|%0, %b2}\"; + return "sal{l}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{l}\\t%0\"; + return "sal{l}\t%0"; else - return \"sal{l}\\t{%2, %0|%0, %2}\"; + return "sal{l}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -10881,26 +10752,25 @@ (zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, SImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{l}\\t{%k0, %k0|%k0, %k0}\"; + return "add{l}\t{%k0, %k0|%k0, %k0}"; default: if (REG_P (operands[2])) - return \"sal{l}\\t{%b2, %k0|%k0, %b2}\"; + return "sal{l}\t{%b2, %k0|%k0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{l}\\t%k0\"; + return "sal{l}\t%k0"; else - return \"sal{l}\\t{%2, %k0|%k0, %2}\"; + return "sal{l}\t{%2, %k0|%k0, %2}"; } -}" +} [(set (attr "type") (cond [(and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -10925,28 +10795,27 @@ (clobber (reg:CC 17))] "!TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (ASHIFT, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: - return \"#\"; + return "#"; case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{w}\\t{%0, %0|%0, %0}\"; + return "add{w}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{w}\\t{%b2, %0|%0, %b2}\"; + return "sal{w}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{w}\\t%0\"; + return "sal{w}\t%0"; else - return \"sal{w}\\t{%2, %0|%0, %2}\"; + return "sal{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "1") (const_string "lea") @@ -10966,26 +10835,25 @@ (clobber (reg:CC 17))] "TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (ASHIFT, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{w}\\t{%0, %0|%0, %0}\"; + return "add{w}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{w}\\t{%b2, %0|%0, %b2}\"; + return "sal{w}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{w}\\t%0\"; + return "sal{w}\t%0"; else - return \"sal{w}\\t{%2, %0|%0, %2}\"; + return "sal{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -11009,26 +10877,25 @@ (ashift:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, HImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{w}\\t{%0, %0|%0, %0}\"; + return "add{w}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{w}\\t{%b2, %0|%0, %b2}\"; + return "sal{w}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{w}\\t%0\"; + return "sal{w}\t%0"; else - return \"sal{w}\\t{%2, %0|%0, %2}\"; + return "sal{w}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -11056,46 +10923,45 @@ (clobber (reg:CC 17))] "!TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (ASHIFT, QImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_LEA: - return \"#\"; + return "#"; case TYPE_ALU: if (operands[2] != const1_rtx) abort (); if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1])) - return \"add{l}\\t{%k0, %k0|%k0, %k0}\"; + return "add{l}\t{%k0, %k0|%k0, %k0}"; else - return \"add{b}\\t{%0, %0|%0, %0}\"; + return "add{b}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t{%b2, %k0|%k0, %b2}\"; + return "sal{l}\t{%b2, %k0|%k0, %b2}"; else - return \"sal{b}\\t{%b2, %0|%0, %b2}\"; + return "sal{b}\t{%b2, %0|%0, %b2}"; } else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t%0\"; + return "sal{l}\t%0"; else - return \"sal{b}\\t%0\"; + return "sal{b}\t%0"; } else { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t{%2, %k0|%k0, %2}\"; + return "sal{l}\t{%2, %k0|%k0, %2}"; else - return \"sal{b}\\t{%2, %0|%0, %2}\"; + return "sal{b}\t{%2, %0|%0, %2}"; } } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "2") (const_string "lea") @@ -11115,7 +10981,6 @@ (clobber (reg:CC 17))] "TARGET_PARTIAL_REG_STALL && ix86_binary_operator_ok (ASHIFT, QImode, operands)" - "* { switch (get_attr_type (insn)) { @@ -11123,36 +10988,36 @@ if (operands[2] != const1_rtx) abort (); if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1])) - return \"add{l}\\t{%k0, %k0|%k0, %k0}\"; + return "add{l}\t{%k0, %k0|%k0, %k0}"; else - return \"add{b}\\t{%0, %0|%0, %0}\"; + return "add{b}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t{%b2, %k0|%k0, %b2}\"; + return "sal{l}\t{%b2, %k0|%k0, %b2}"; else - return \"sal{b}\\t{%b2, %0|%0, %b2}\"; + return "sal{b}\t{%b2, %0|%0, %b2}"; } else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t%0\"; + return "sal{l}\t%0"; else - return \"sal{b}\\t%0\"; + return "sal{b}\t%0"; } else { if (get_attr_mode (insn) == MODE_SI) - return \"sal{l}\\t{%2, %k0|%k0, %2}\"; + return "sal{l}\t{%2, %k0|%k0, %2}"; else - return \"sal{b}\\t{%2, %0|%0, %2}\"; + return "sal{b}\t{%2, %0|%0, %2}"; } } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -11176,26 +11041,25 @@ (ashift:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFT, QImode, operands)" - "* { switch (get_attr_type (insn)) { case TYPE_ALU: if (operands[2] != const1_rtx) abort (); - return \"add{b}\\t{%0, %0|%0, %0}\"; + return "add{b}\t{%0, %0|%0, %0}"; default: if (REG_P (operands[2])) - return \"sal{b}\\t{%b2, %0|%0, %b2}\"; + return "sal{b}\t{%b2, %0|%0, %b2}"; else if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 1 && (TARGET_PENTIUM || TARGET_PENTIUMPRO)) - return \"sal{b}\\t%0\"; + return "sal{b}\t%0"; else - return \"sal{b}\\t{%2, %0|%0, %2}\"; + return "sal{b}\t{%2, %0|%0, %2}"; } -}" +} [(set (attr "type") (cond [(and (and (ne (symbol_ref "TARGET_DOUBLE_WITH_ADD") (const_int 0)) @@ -11214,7 +11078,6 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))])] "" - " { if (!TARGET_64BIT && TARGET_CMOVE && ! immediate_operand (operands[2], QImode)) { @@ -11223,7 +11086,7 @@ } ix86_expand_binary_operator (ASHIFTRT, DImode, operands); DONE; -}") +}) (define_insn "ashrdi3_63_rex64" [(set (match_operand:DI 0 "nonimmediate_operand" "=*d,rm") @@ -11234,7 +11097,7 @@ && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)" "@ {cqto|cqo} - sar{q}\\t{%2, %0|%0, %2}" + sar{q}\t{%2, %0|%0, %2}" [(set_attr "type" "imovx,ishift") (set_attr "prefix_0f" "0,*") (set_attr "length_immediate" "0,*") @@ -11248,7 +11111,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, DImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "sar{q}\\t%0" + "sar{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -11262,8 +11125,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)" "@ - sar{q}\\t{%2, %0|%0, %2} - sar{q}\\t{%b2, %0|%0, %b2}" + sar{q}\t{%2, %0|%0, %2} + sar{q}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -11281,7 +11144,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)" - "sar{q}\\t%0" + "sar{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -11301,7 +11164,7 @@ (ashiftrt:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)" - "sar{q}\\t{%2, %0|%0, %2}" + "sar{q}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -11353,8 +11216,8 @@ (clobber (reg:CC 17))] "" "@ - shrd{l}\\t{%2, %1, %0|%0, %1, %2} - shrd{l}\\t{%s2%1, %0|%0, %1, %2}" + shrd{l}\t{%2, %1, %0|%0, %1, %2} + shrd{l}\t{%s2%1, %0|%0, %1, %2}" [(set_attr "type" "ishift") (set_attr "prefix_0f" "1") (set_attr "pent_pair" "np") @@ -11366,7 +11229,6 @@ (use (match_operand:SI 1 "register_operand" "")) (use (match_operand:QI 2 "register_operand" ""))] "" - " { rtx label = gen_label_rtx (); rtx tmp; @@ -11388,7 +11250,7 @@ LABEL_NUSES (label) = 1; DONE; -}") +}) (define_insn "ashrsi3_31" [(set (match_operand:SI 0 "nonimmediate_operand" "=*d,rm") @@ -11399,7 +11261,7 @@ && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" "@ {cltd|cdq} - sar{l}\\t{%2, %0|%0, %2}" + sar{l}\t{%2, %0|%0, %2}" [(set_attr "type" "imovx,ishift") (set_attr "prefix_0f" "0,*") (set_attr "length_immediate" "0,*") @@ -11415,7 +11277,7 @@ && TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" "@ {cltd|cdq} - sar{l}\\t{%2, %k0|%k0, %2}" + sar{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "imovx,ishift") (set_attr "prefix_0f" "0,*") (set_attr "length_immediate" "0,*") @@ -11437,7 +11299,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "sar{l}\\t%0" + "sar{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -11451,7 +11313,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "sar{l}\\t%k0" + "sar{l}\t%k0" [(set_attr "type" "ishift") (set_attr "length" "2")]) @@ -11462,8 +11324,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" "@ - sar{l}\\t{%2, %0|%0, %2} - sar{l}\\t{%b2, %0|%0, %b2}" + sar{l}\t{%2, %0|%0, %2} + sar{l}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11474,8 +11336,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" "@ - sar{l}\\t{%2, %k0|%k0, %2} - sar{l}\\t{%b2, %k0|%k0, %b2}" + sar{l}\t{%2, %k0|%k0, %2} + sar{l}\t{%b2, %k0|%k0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11493,7 +11355,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" - "sar{l}\\t%0" + "sar{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -11511,7 +11373,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" - "sar{l}\\t%k0" + "sar{l}\t%k0" [(set_attr "type" "ishift") (set_attr "length" "2")]) @@ -11528,7 +11390,7 @@ (ashiftrt:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" - "sar{l}\\t{%2, %0|%0, %2}" + "sar{l}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11542,7 +11404,7 @@ (zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)" - "sar{l}\\t{%2, %k0|%k0, %2}" + "sar{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11561,7 +11423,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "sar{w}\\t%0" + "sar{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -11575,8 +11437,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, HImode, operands)" "@ - sar{w}\\t{%2, %0|%0, %2} - sar{w}\\t{%b2, %0|%0, %b2}" + sar{w}\t{%2, %0|%0, %2} + sar{w}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -11594,7 +11456,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)" - "sar{w}\\t%0" + "sar{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -11614,7 +11476,7 @@ (ashiftrt:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)" - "sar{w}\\t{%2, %0|%0, %2}" + "sar{w}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -11633,7 +11495,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, QImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "sar{b}\\t%0" + "sar{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -11647,8 +11509,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)" "@ - sar{b}\\t{%2, %0|%0, %2} - sar{b}\\t{%b2, %0|%0, %b2}" + sar{b}\t{%2, %0|%0, %2} + sar{b}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -11666,7 +11528,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)" - "sar{b}\\t%0" + "sar{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -11686,7 +11548,7 @@ (ashiftrt:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)" - "sar{b}\\t{%2, %0|%0, %2}" + "sar{b}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -11700,7 +11562,6 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC 17))])] "" - " { if (!TARGET_64BIT && TARGET_CMOVE && ! immediate_operand (operands[2], QImode)) { @@ -11709,7 +11570,7 @@ } ix86_expand_binary_operator (LSHIFTRT, DImode, operands); DONE; -}") +}) (define_insn "*lshrdi3_1_one_bit_rex64" [(set (match_operand:DI 0 "nonimmediate_operand" "=rm") @@ -11718,7 +11579,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "shr{q}\\t%0" + "shr{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -11732,8 +11593,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" "@ - shr{q}\\t{%2, %0|%0, %2} - shr{q}\\t{%b2, %0|%0, %b2}" + shr{q}\t{%2, %0|%0, %2} + shr{q}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -11751,7 +11612,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{q}\\t%0" + "shr{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -11771,7 +11632,7 @@ (lshiftrt:DI (match_dup 1) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{q}\\t{%2, %0|%0, %2}" + "shr{q}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -11828,7 +11689,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "shr{l}\\t%0" + "shr{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -11842,7 +11703,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "shr{l}\\t%k0" + "shr{l}\t%k0" [(set_attr "type" "ishift") (set_attr "length" "2")]) @@ -11853,8 +11714,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" "@ - shr{l}\\t{%2, %0|%0, %2} - shr{l}\\t{%b2, %0|%0, %b2}" + shr{l}\t{%2, %0|%0, %2} + shr{l}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11866,8 +11727,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" "@ - shr{l}\\t{%2, %k0|%k0, %2} - shr{l}\\t{%b2, %k0|%k0, %b2}" + shr{l}\t{%2, %k0|%k0, %2} + shr{l}\t{%b2, %k0|%k0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11885,7 +11746,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{l}\\t%0" + "shr{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -11903,7 +11764,7 @@ "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{l}\\t%k0" + "shr{l}\t%k0" [(set_attr "type" "ishift") (set_attr "length" "2")]) @@ -11920,7 +11781,7 @@ (lshiftrt:SI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{l}\\t{%2, %0|%0, %2}" + "shr{l}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11934,7 +11795,7 @@ (lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{l}\\t{%2, %k0|%k0, %2}" + "shr{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -11953,7 +11814,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "shr{w}\\t%0" + "shr{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -11967,8 +11828,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" "@ - shr{w}\\t{%2, %0|%0, %2} - shr{w}\\t{%b2, %0|%0, %b2}" + shr{w}\t{%2, %0|%0, %2} + shr{w}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -11986,7 +11847,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{w}\\t%0" + "shr{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -12006,7 +11867,7 @@ (lshiftrt:HI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)" - "shr{w}\\t{%2, %0|%0, %2}" + "shr{w}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -12025,7 +11886,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, QImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "shr{b}\\t%0" + "shr{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -12039,8 +11900,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (LSHIFTRT, QImode, operands)" "@ - shr{b}\\t{%2, %0|%0, %2} - shr{b}\\t{%b2, %0|%0, %b2}" + shr{b}\t{%2, %0|%0, %2} + shr{b}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -12058,7 +11919,7 @@ "ix86_match_ccmode (insn, CCGOCmode) && (TARGET_PENTIUM || TARGET_PENTIUMPRO) && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)" - "shr{b}\\t%0" + "shr{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -12078,7 +11939,7 @@ (lshiftrt:QI (match_dup 1) (match_dup 2)))] "ix86_match_ccmode (insn, CCGOCmode) && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)" - "shr{b}\\t{%2, %0|%0, %2}" + "shr{b}\t{%2, %0|%0, %2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -12099,7 +11960,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, DImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "rol{q}\\t%0" + "rol{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -12113,8 +11974,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, DImode, operands)" "@ - rol{q}\\t{%2, %0|%0, %2} - rol{q}\\t{%b2, %0|%0, %b2}" + rol{q}\t{%2, %0|%0, %2} + rol{q}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -12133,7 +11994,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "rol{l}\\t%0" + "rol{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -12148,7 +12009,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "rol{l}\\t%k0" + "rol{l}\t%k0" [(set_attr "type" "ishift") (set_attr "length" "2")]) @@ -12159,8 +12020,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, SImode, operands)" "@ - rol{l}\\t{%2, %0|%0, %2} - rol{l}\\t{%b2, %0|%0, %b2}" + rol{l}\t{%2, %0|%0, %2} + rol{l}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -12172,8 +12033,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, SImode, operands)" "@ - rol{l}\\t{%2, %k0|%k0, %2} - rol{l}\\t{%b2, %k0|%k0, %b2}" + rol{l}\t{%2, %k0|%k0, %2} + rol{l}\t{%b2, %k0|%k0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -12192,7 +12053,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "rol{w}\\t%0" + "rol{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -12206,8 +12067,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, HImode, operands)" "@ - rol{w}\\t{%2, %0|%0, %2} - rol{w}\\t{%b2, %0|%0, %b2}" + rol{w}\t{%2, %0|%0, %2} + rol{w}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -12226,7 +12087,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, QImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "rol{b}\\t%0" + "rol{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -12240,8 +12101,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATE, QImode, operands)" "@ - rol{b}\\t{%2, %0|%0, %2} - rol{b}\\t{%b2, %0|%0, %b2}" + rol{b}\t{%2, %0|%0, %2} + rol{b}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -12260,7 +12121,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, DImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "ror{q}\\t%0" + "ror{q}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:DI 0 "register_operand" "") @@ -12274,8 +12135,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, DImode, operands)" "@ - ror{q}\\t{%2, %0|%0, %2} - ror{q}\\t{%b2, %0|%0, %b2}" + ror{q}\t{%2, %0|%0, %2} + ror{q}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "DI")]) @@ -12294,7 +12155,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "ror{l}\\t%0" + "ror{l}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -12309,7 +12170,7 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, SImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "ror{l}\\t%k0" + "ror{l}\t%k0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand:SI 0 "register_operand" "") @@ -12323,8 +12184,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, SImode, operands)" "@ - ror{l}\\t{%2, %0|%0, %2} - ror{l}\\t{%b2, %0|%0, %b2}" + ror{l}\t{%2, %0|%0, %2} + ror{l}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -12336,8 +12197,8 @@ (clobber (reg:CC 17))] "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, SImode, operands)" "@ - ror{l}\\t{%2, %k0|%k0, %2} - ror{l}\\t{%b2, %k0|%k0, %b2}" + ror{l}\t{%2, %k0|%k0, %2} + ror{l}\t{%b2, %k0|%k0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "SI")]) @@ -12356,7 +12217,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, HImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "ror{w}\\t%0" + "ror{w}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -12370,8 +12231,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, HImode, operands)" "@ - ror{w}\\t{%2, %0|%0, %2} - ror{w}\\t{%b2, %0|%0, %b2}" + ror{w}\t{%2, %0|%0, %2} + ror{w}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "HI")]) @@ -12390,7 +12251,7 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, QImode, operands) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)" - "ror{b}\\t%0" + "ror{b}\t%0" [(set_attr "type" "ishift") (set (attr "length") (if_then_else (match_operand 0 "register_operand" "") @@ -12404,8 +12265,8 @@ (clobber (reg:CC 17))] "ix86_binary_operator_ok (ROTATERT, QImode, operands)" "@ - ror{b}\\t{%2, %0|%0, %2} - ror{b}\\t{%b2, %0|%0, %b2}" + ror{b}\t{%2, %0|%0, %2} + ror{b}\t{%b2, %0|%0, %b2}" [(set_attr "type" "ishift") (set_attr "mode" "QI")]) @@ -12417,7 +12278,6 @@ (match_operand:SI 2 "immediate_operand" "") (match_operand:SI 3 "immediate_operand" "")))] "" - " { /* Handle extractions from %ah et al. */ if (INTVAL (operands[2]) != 8 || INTVAL (operands[3]) != 8) @@ -12427,7 +12287,7 @@ matches the predicate, so check it again here. */ if (! register_operand (operands[1], VOIDmode)) FAIL; -}") +}) (define_expand "extzv" [(set (match_operand:SI 0 "register_operand" "") @@ -12435,7 +12295,6 @@ (match_operand:SI 2 "immediate_operand" "") (match_operand:SI 3 "immediate_operand" "")))] "" - " { /* Handle extractions from %ah et al. */ if (INTVAL (operands[2]) != 8 || INTVAL (operands[3]) != 8) @@ -12445,7 +12304,7 @@ matches the predicate, so check it again here. */ if (! register_operand (operands[1], VOIDmode)) FAIL; -}") +}) (define_expand "insv" [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "") @@ -12453,7 +12312,6 @@ (match_operand:SI 2 "immediate_operand" "")) (match_operand:SI 3 "register_operand" ""))] "" - " { /* Handle extractions from %ah et al. */ if (INTVAL (operands[1]) != 8 || INTVAL (operands[2]) != 8) @@ -12463,7 +12321,7 @@ matches the predicate, so check it again here. */ if (! register_operand (operands[0], VOIDmode)) FAIL; -}") +}) ;; %%% bts, btr, btc, bt. @@ -12589,7 +12447,7 @@ (match_operator:QI 1 "ix86_comparison_operator" [(reg 17) (const_int 0)]))] "" - "set%C1\\t%0" + "set%C1\t%0" [(set_attr "type" "setcc") (set_attr "mode" "QI")]) @@ -12598,7 +12456,7 @@ (match_operator:QI 1 "ix86_comparison_operator" [(reg 17) (const_int 0)]))] "" - "set%C1\\t%0" + "set%C1\t%0" [(set_attr "type" "setcc") (set_attr "mode" "QI")]) @@ -12616,7 +12474,7 @@ [(match_operand:SF 2 "register_operand" "0") (match_operand:SF 3 "nonimmediate_operand" "xm")]))] "TARGET_SSE && reload_completed" - "cmp%D1ss\\t{%3, %0|%0, %3}" + "cmp%D1ss\t{%3, %0|%0, %3}" [(set_attr "type" "sse") (set_attr "mode" "SF")]) @@ -12626,7 +12484,7 @@ [(match_operand:DF 2 "register_operand" "0") (match_operand:DF 3 "nonimmediate_operand" "Ym")]))] "TARGET_SSE2 && reload_completed" - "cmp%D1sd\\t{%3, %0|%0, %3}" + "cmp%D1sd\t{%3, %0|%0, %3}" [(set_attr "type" "sse") (set_attr "mode" "DF")]) @@ -12787,7 +12645,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "%+j%C1\\t%l0" + "%+j%C1\t%l0" [(set_attr "type" "ibr") (set (attr "prefix_0f") (if_then_else (and (ge (minus (match_dup 0) (pc)) @@ -12804,7 +12662,7 @@ (pc) (label_ref (match_operand 0 "" ""))))] "" - "%+j%c1\\t%l0" + "%+j%c1\t%l0" [(set_attr "type" "ibr") (set (attr "prefix_0f") (if_then_else (and (ge (minus (match_dup 0) (pc)) @@ -12979,12 +12837,11 @@ (clobber (reg:CCFP 17))] "reload_completed" [(const_int 0)] - " { ix86_split_fp_branch (operands[0], operands[1], operands[2], operands[3], operands[4], NULL_RTX); DONE; -}") +}) (define_split [(set (pc) @@ -13001,12 +12858,11 @@ (if_then_else (match_dup 6) (match_dup 3) (match_dup 4)))] - " { ix86_split_fp_branch (operands[0], operands[1], operands[2], operands[3], operands[4], operands[5]); DONE; -}") +}) ;; Unconditional and other jump instructions @@ -13014,13 +12870,13 @@ [(set (pc) (label_ref (match_operand 0 "" "")))] "" - "jmp\\t%l0" + "jmp\t%l0" [(set_attr "type" "ibr")]) (define_insn "indirect_jump" [(set (pc) (match_operand:SI 0 "nonimmediate_operand" "rm"))] "" - "jmp\\t%A0" + "jmp\t%A0" [(set_attr "type" "ibr") (set_attr "length_immediate" "0")]) @@ -13028,7 +12884,7 @@ [(set (pc) (match_operand:SI 0 "nonimmediate_operand" "rm")) (use (label_ref (match_operand 1 "" "")))] "! flag_pic" - "jmp\\t%A0" + "jmp\t%A0" [(set_attr "type" "ibr") (set_attr "length_immediate" "0")]) @@ -13089,20 +12945,19 @@ (parallel [(set (pc) (match_dup 7)) (use (label_ref (match_dup 3)))])] "flag_pic" - " { operands[5] = gen_reg_rtx (SImode); operands[6] = gen_reg_rtx (SImode); operands[7] = gen_reg_rtx (SImode); operands[8] = pic_offset_table_rtx; current_function_uses_pic_offset_table = 1; -}") +}) (define_insn "*tablejump_pic" [(set (pc) (match_operand:SI 0 "nonimmediate_operand" "rm")) (use (label_ref (match_operand 1 "" "")))] "" - "jmp\\t%A0" + "jmp\t%A0" [(set_attr "type" "ibr") (set_attr "length_immediate" "0")]) @@ -13142,15 +12997,14 @@ (clobber (match_scratch:SI 3 "=X,X,r")) (clobber (reg:CC 17))] "TARGET_USE_LOOP && !TARGET_64BIT" - "* { if (which_alternative != 0) - return \"#\"; + return "#"; if (get_attr_length (insn) == 2) - return \"%+loop\\t%l0\"; + return "%+loop\t%l0"; else - return \"dec{l}\\t%1\;%+jne\\t%l0\"; -}" + return "dec{l}\t%1\;%+jne\t%l0"; +} [(set_attr "ppro_uops" "many") (set (attr "type") (if_then_else (and (eq_attr "alternative" "0") @@ -13225,7 +13079,6 @@ (plus:SI (reg:SI 7) (match_operand:SI 3 "" "")))])] "!TARGET_64BIT" - " { if (operands[3] == const0_rtx) { @@ -13242,7 +13095,7 @@ XEXP (operands[0], 0) = copy_to_mode_reg (Pmode, XEXP (operands[0], 0)); if (TARGET_64BIT) abort(); -}") +}) (define_insn "*call_pop_0" [(call (mem:QI (match_operand:SI 0 "constant_call_address_operand" "")) @@ -13250,13 +13103,12 @@ (set (reg:SI 7) (plus:SI (reg:SI 7) (match_operand:SI 2 "immediate_operand" "")))] "!TARGET_64BIT" - "* { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P0\"; + return "jmp\t%P0"; else - return \"call\\t%P0\"; -}" + return "call\t%P0"; +} [(set_attr "type" "call")]) (define_insn "*call_pop_1" @@ -13265,20 +13117,19 @@ (set (reg:SI 7) (plus:SI (reg:SI 7) (match_operand:SI 2 "immediate_operand" "i")))] "!TARGET_64BIT" - "* { if (constant_call_address_operand (operands[0], Pmode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P0\"; + return "jmp\t%P0"; else - return \"call\\t%P0\"; + return "call\t%P0"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%A0\"; + return "jmp\t%A0"; else - return \"call\\t%A0\"; -}" + return "call\t%A0"; +} [(set_attr "type" "call")]) (define_expand "call" @@ -13287,7 +13138,6 @@ (use (match_operand 2 "" ""))] ;; Operand 1 not used on the i386. "" - " { rtx insn; /* Static functions and indirect calls don't need @@ -13309,7 +13159,7 @@ } insn = emit_call_insn (gen_call_exp (operands[0], operands[1])); DONE; -}") +}) (define_expand "call_exp" [(call (match_operand:QI 0 "" "") @@ -13321,53 +13171,50 @@ [(call (mem:QI (match_operand 0 "constant_call_address_operand" "")) (match_operand 1 "" ""))] "" - "* { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P0\"; + return "jmp\t%P0"; else - return \"call\\t%P0\"; -}" + return "call\t%P0"; +} [(set_attr "type" "call")]) (define_insn "*call_1" [(call (mem:QI (match_operand:SI 0 "call_insn_operand" "rsm")) (match_operand 1 "" ""))] "!TARGET_64BIT" - "* { if (constant_call_address_operand (operands[0], QImode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P0\"; + return "jmp\t%P0"; else - return \"call\\t%P0\"; + return "call\t%P0"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%A0\"; + return "jmp\t%A0"; else - return \"call\\t%A0\"; -}" + return "call\t%A0"; +} [(set_attr "type" "call")]) (define_insn "*call_1_rex64" [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm")) (match_operand 1 "" ""))] "TARGET_64BIT" - "* { if (constant_call_address_operand (operands[0], QImode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P0\"; + return "jmp\t%P0"; else - return \"call\\t%P0\"; + return "call\t%P0"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%A0\"; + return "jmp\t%A0"; else - return \"call\\t%A0\"; -}" + return "call\t%A0"; +} [(set_attr "type" "call")]) ;; Call subroutine, returning value in operand 0 @@ -13381,7 +13228,6 @@ (plus:SI (reg:SI 7) (match_operand:SI 4 "" "")))])] "!TARGET_64BIT" - " { if (operands[4] == const0_rtx) { @@ -13397,7 +13243,7 @@ current_function_uses_pic_offset_table = 1; if (! call_insn_operand (XEXP (operands[1], 0), Pmode)) XEXP (operands[1], 0) = copy_to_mode_reg (Pmode, XEXP (operands[1], 0)); -}") +}) (define_expand "call_value" [(set (match_operand 0 "" "") @@ -13406,7 +13252,6 @@ (use (match_operand:SI 3 "" ""))] ;; Operand 2 not used on the i386. "" - " { rtx insn; /* Static functions and indirect calls don't need @@ -13429,7 +13274,7 @@ insn = emit_call_insn (gen_call_value_exp (operands[0], operands[1], operands[2])); DONE; -}") +}) (define_expand "call_value_exp" [(set (match_operand 0 "" "") @@ -13446,7 +13291,6 @@ (match_operand 1 "" "") (match_operand 2 "" "")])] "" - " { int i; @@ -13475,7 +13319,7 @@ emit_insn (gen_blockage ()); DONE; -}") +}) ;; Prologue and epilogue instructions @@ -13495,7 +13339,6 @@ (define_expand "return" [(return)] "ix86_can_use_return_insn_p ()" - " { if (current_function_pops_args) { @@ -13503,7 +13346,7 @@ emit_jump_insn (gen_return_pop_internal (popc)); DONE; } -}") +}) (define_insn "return_internal" [(return)] @@ -13517,7 +13360,7 @@ [(return) (use (match_operand:SI 0 "const_int_operand" ""))] "reload_completed" - "ret\\t%0" + "ret\t%0" [(set_attr "length" "3") (set_attr "length_immediate" "2") (set_attr "modrm" "0")]) @@ -13526,7 +13369,7 @@ [(return) (use (match_operand:SI 0 "register_operand" "r"))] "reload_completed" - "jmp\\t%A0" + "jmp\t%A0" [(set_attr "type" "ibr") (set_attr "length_immediate" "0")]) @@ -13552,15 +13395,14 @@ (minus:SI (pc) (match_operand 2 "" ""))))] 1)) (clobber (reg:CC 17))] "!TARGET_64BIT" - "* { if (GET_CODE (operands[2]) == LABEL_REF) operands[2] = XEXP (operands[2], 0); if (TARGET_DEEP_BRANCH_PREDICTION) - return \"add{l}\\t{%1, %0|%0, %1}\"; + return "add{l}\t{%1, %0|%0, %1}"; else - return \"add{l}\\t{%1+[.-%X2], %0|%0, %a1+(.-%X2)}\"; -}" + return "add{l}\t{%1+[.-%X2], %0|%0, %a1+(.-%X2)}"; +} [(set_attr "type" "alu") ; Since this insn may have two constant operands, we must set the ; length manually. @@ -13571,18 +13413,17 @@ [(set (match_operand:SI 0 "register_operand" "=r") (unspec_volatile:SI [(plus:SI (pc) (match_operand 1 "" ""))] 2))] "!TARGET_64BIT" - "* { if (GET_CODE (operands[1]) == LABEL_REF) operands[1] = XEXP (operands[1], 0); - output_asm_insn (\"call\\t%X1\", operands); + output_asm_insn ("call\t%X1", operands); if (! TARGET_DEEP_BRANCH_PREDICTION) { - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (operands[1])); } RET; -}" +} [(set_attr "type" "multi")]) (define_expand "epilogue" @@ -13599,7 +13440,6 @@ [(use (match_operand 0 "register_operand" "")) (use (match_operand 1 "register_operand" ""))] "" - " { rtx tmp, sa = operands[0], ra = operands[1]; @@ -13614,7 +13454,7 @@ emit_insn (gen_eh_return_1 (sa)); emit_barrier (); DONE; -}") +}) (define_insn_and_split "eh_return_1" [(unspec_volatile [(match_operand 0 "register_operand" "c")] 13)] @@ -13654,7 +13494,6 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "") (ffs:SI (match_operand:SI 1 "general_operand" "")))] "" - " { rtx out = gen_reg_rtx (SImode), tmp = gen_reg_rtx (SImode); rtx in = operands[1]; @@ -13735,7 +13574,7 @@ emit_move_insn (operands[0], out); } DONE; -}") +}) (define_insn "ffssi_1" [(set (reg:CCZ 17) @@ -13744,7 +13583,7 @@ (set (match_operand:SI 0 "register_operand" "=r") (unspec:SI [(match_dup 1)] 5))] "" - "bsf{l}\\t{%1, %0|%0, %1}" + "bsf{l}\t{%1, %0|%0, %1}" [(set_attr "prefix_0f" "1") (set_attr "ppro_uops" "few")]) @@ -14256,7 +14095,6 @@ "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" [(const_int 0)] - " { operands[4] = ix86_force_to_memory (GET_MODE (operands[1]), operands[1]); operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]); @@ -14267,7 +14105,7 @@ operands[2]))); ix86_free_from_memory (GET_MODE (operands[1])); DONE; -}") +}) (define_split [(set (match_operand 0 "register_operand" "") @@ -14277,7 +14115,6 @@ "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))" [(const_int 0)] - " { operands[4] = ix86_force_to_memory (GET_MODE (operands[2]), operands[2]); operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]); @@ -14288,7 +14125,7 @@ operands[4]))); ix86_free_from_memory (GET_MODE (operands[2])); DONE; -}") +}) ;; FPU special functions. @@ -14296,11 +14133,10 @@ [(set (match_operand:SF 0 "register_operand" "") (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))] "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE" - " { if (!TARGET_SSE) operands[1] = force_reg (SFmode, operands[1]); -}") +}) (define_insn "sqrtsf2_1" [(set (match_operand:SF 0 "register_operand" "=f#x,x#f") @@ -14309,7 +14145,7 @@ && (TARGET_SSE && TARGET_MIX_SSE_I387)" "@ fsqrt - sqrtss\\t{%1, %0|%0, %1}" + sqrtss\t{%1, %0|%0, %1}" [(set_attr "type" "fpspc,sse") (set_attr "mode" "SF,SF") (set_attr "athlon_decode" "direct,*")]) @@ -14318,7 +14154,7 @@ [(set (match_operand:SF 0 "register_operand" "=x") (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "xm")))] "TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)" - "sqrtss\\t{%1, %0|%0, %1}" + "sqrtss\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "SF") (set_attr "athlon_decode" "*")]) @@ -14337,11 +14173,10 @@ [(set (match_operand:DF 0 "register_operand" "") (sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "")))] "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2" - " { if (!TARGET_SSE2) operands[1] = force_reg (DFmode, operands[1]); -}") +}) (define_insn "sqrtdf2_1" [(set (match_operand:DF 0 "register_operand" "=f#Y,Y#f") @@ -14350,7 +14185,7 @@ && (TARGET_SSE2 && TARGET_MIX_SSE_I387)" "@ fsqrt - sqrtsd\\t{%1, %0|%0, %1}" + sqrtsd\t{%1, %0|%0, %1}" [(set_attr "type" "fpspc,sse") (set_attr "mode" "DF,DF") (set_attr "athlon_decode" "direct,*")]) @@ -14359,7 +14194,7 @@ [(set (match_operand:DF 0 "register_operand" "=Y") (sqrt:DF (match_operand:DF 1 "nonimmediate_operand" "Ym")))] "TARGET_SSE2 && (!TARGET_80387 || !TARGET_MIX_SSE_I387)" - "sqrtsd\\t{%1, %0|%0, %1}" + "sqrtsd\t{%1, %0|%0, %1}" [(set_attr "type" "sse") (set_attr "mode" "DF") (set_attr "athlon_decode" "*")]) @@ -14550,13 +14385,12 @@ (use (match_operand:SI 2 "nonmemory_operand" "")) (use (match_operand:SI 3 "const_int_operand" ""))] "" - " { if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3])) DONE; else FAIL; -}") +}) (define_expand "movstrdi" [(use (match_operand:BLK 0 "memory_operand" "")) @@ -14564,13 +14398,12 @@ (use (match_operand:DI 2 "nonmemory_operand" "")) (use (match_operand:DI 3 "const_int_operand" ""))] "TARGET_64BIT" - " { if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3])) DONE; else FAIL; -}") +}) ;; Most CPUs don't like single string operations ;; Handle this case here to simplify previous expander. @@ -14585,7 +14418,6 @@ (parallel [(set (match_dup 1) (plus:DI (match_dup 1) (const_int 8))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { @@ -14595,7 +14427,7 @@ } else operands[2] = gen_reg_rtx (DImode); -}") +}) (define_expand "strmovsi" @@ -14608,7 +14440,6 @@ (parallel [(set (match_dup 1) (plus:SI (match_dup 1) (const_int 4))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -14623,7 +14454,7 @@ } else operands[2] = gen_reg_rtx (SImode); -}") +}) (define_expand "strmovsi_rex64" [(set (match_dup 2) @@ -14635,7 +14466,6 @@ (parallel [(set (match_dup 1) (plus:DI (match_dup 1) (const_int 4))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { @@ -14645,7 +14475,7 @@ } else operands[2] = gen_reg_rtx (SImode); -}") +}) (define_expand "strmovhi" [(set (match_dup 2) @@ -14657,7 +14487,6 @@ (parallel [(set (match_dup 1) (plus:SI (match_dup 1) (const_int 2))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -14672,7 +14501,7 @@ } else operands[2] = gen_reg_rtx (HImode); -}") +}) (define_expand "strmovhi_rex64" [(set (match_dup 2) @@ -14684,7 +14513,6 @@ (parallel [(set (match_dup 1) (plus:DI (match_dup 1) (const_int 2))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { @@ -14694,7 +14522,7 @@ } else operands[2] = gen_reg_rtx (HImode); -}") +}) (define_expand "strmovqi" [(set (match_dup 2) @@ -14706,7 +14534,6 @@ (parallel [(set (match_dup 1) (plus:SI (match_dup 1) (const_int 1))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -14721,7 +14548,7 @@ } else operands[2] = gen_reg_rtx (QImode); -}") +}) (define_expand "strmovqi_rex64" [(set (match_dup 2) @@ -14733,7 +14560,6 @@ (parallel [(set (match_dup 1) (plus:DI (match_dup 1) (const_int 1))) (clobber (reg:CC 17))])] "!TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { @@ -14743,7 +14569,7 @@ } else operands[2] = gen_reg_rtx (QImode); -}") +}) (define_insn "strmovdi_rex_1" [(set (mem:DI (match_operand:DI 2 "register_operand" "0")) @@ -14958,26 +14784,24 @@ (use (match_operand:SI 1 "nonmemory_operand" "")) (use (match_operand 2 "const_int_operand" ""))] "" - " { if (ix86_expand_clrstr (operands[0], operands[1], operands[2])) DONE; else FAIL; -}") +}) (define_expand "clrstrdi" [(use (match_operand:BLK 0 "memory_operand" "")) (use (match_operand:DI 1 "nonmemory_operand" "")) (use (match_operand 2 "const_int_operand" ""))] "TARGET_64BIT" - " { if (ix86_expand_clrstr (operands[0], operands[1], operands[2])) DONE; else FAIL; -}") +}) ;; Most CPUs don't like single string operations ;; Handle this case here to simplify previous expander. @@ -14988,14 +14812,13 @@ (parallel [(set (match_dup 0) (plus:DI (match_dup 0) (const_int 8))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { emit_insn (gen_strsetdi_rex_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsetsi" [(set (mem:SI (match_operand:SI 0 "register_operand" "")) @@ -15003,7 +14826,6 @@ (parallel [(set (match_dup 0) (plus:SI (match_dup 0) (const_int 4))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -15015,7 +14837,7 @@ emit_insn (gen_strsetsi_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsetsi_rex64" [(set (mem:SI (match_operand:DI 0 "register_operand" "")) @@ -15023,14 +14845,13 @@ (parallel [(set (match_dup 0) (plus:DI (match_dup 0) (const_int 4))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { emit_insn (gen_strsetsi_rex_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsethi" [(set (mem:HI (match_operand:SI 0 "register_operand" "")) @@ -15038,7 +14859,6 @@ (parallel [(set (match_dup 0) (plus:SI (match_dup 0) (const_int 2))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -15050,7 +14870,7 @@ emit_insn (gen_strsethi_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsethi_rex64" [(set (mem:HI (match_operand:DI 0 "register_operand" "")) @@ -15058,14 +14878,13 @@ (parallel [(set (match_dup 0) (plus:DI (match_dup 0) (const_int 2))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { emit_insn (gen_strsethi_rex_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsetqi" [(set (mem:QI (match_operand:SI 0 "register_operand" "")) @@ -15073,7 +14892,6 @@ (parallel [(set (match_dup 0) (plus:SI (match_dup 0) (const_int 1))) (clobber (reg:CC 17))])] "" - " { if (TARGET_64BIT) { @@ -15085,7 +14903,7 @@ emit_insn (gen_strsetqi_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_expand "strsetqi_rex64" [(set (mem:QI (match_operand:DI 0 "register_operand" "")) @@ -15093,14 +14911,13 @@ (parallel [(set (match_dup 0) (plus:DI (match_dup 0) (const_int 1))) (clobber (reg:CC 17))])] "TARGET_64BIT" - " { if (TARGET_SINGLE_STRINGOP || optimize_size) { emit_insn (gen_strsetqi_rex_1 (operands[0], operands[0], operands[1])); DONE; } -}") +}) (define_insn "strsetdi_rex_1" [(set (mem:SI (match_operand:DI 1 "register_operand" "0")) @@ -15288,7 +15105,6 @@ (use (match_operand 3 "general_operand" "")) (use (match_operand 4 "immediate_operand" ""))] "" - " { rtx addr1, addr2, out, outlow, count, countreg, align; @@ -15346,7 +15162,7 @@ emit_move_insn (operands[0], out); DONE; -}") +}) ;; Produce a tri-state integer (-1, 0, 1) from condition codes. @@ -15444,13 +15260,12 @@ (match_operand:QI 2 "immediate_operand" "") (match_operand 3 "immediate_operand" "")] 0))] "" - " { if (ix86_expand_strlen (operands[0], operands[1], operands[2], operands[3])) DONE; else FAIL; -}") +}) (define_expand "strlendi" [(set (match_operand:DI 0 "register_operand" "") @@ -15458,13 +15273,12 @@ (match_operand:QI 2 "immediate_operand" "") (match_operand 3 "immediate_operand" "")] 0))] "" - " { if (ix86_expand_strlen (operands[0], operands[1], operands[2], operands[3])) DONE; else FAIL; -}") +}) (define_insn "strlenqi_1" [(set (match_operand:SI 0 "register_operand" "=&c") @@ -15598,7 +15412,7 @@ (const_int 0))) (clobber (reg:CC 17))] "TARGET_64BIT" - "sbb{q}\\t%0, %0" + "sbb{q}\t%0, %0" ; Since we don't have the proper number of operands for an alu insn, ; fill in all the blanks. [(set_attr "type" "alu") @@ -15616,8 +15430,8 @@ "TARGET_64BIT && TARGET_CMOVE && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - cmov%C1\\t{%2, %0|%0, %2} - cmov%c1\\t{%3, %0|%0, %3}" + cmov%C1\t{%2, %0|%0, %2} + cmov%c1\t{%3, %0|%0, %3}" [(set_attr "type" "icmov") (set_attr "mode" "DI")]) @@ -15640,7 +15454,7 @@ (const_int 0))) (clobber (reg:CC 17))] "" - "sbb{l}\\t%0, %0" + "sbb{l}\t%0, %0" ; Since we don't have the proper number of operands for an alu insn, ; fill in all the blanks. [(set_attr "type" "alu") @@ -15658,8 +15472,8 @@ "TARGET_CMOVE && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - cmov%C1\\t{%2, %0|%0, %2} - cmov%c1\\t{%3, %0|%0, %3}" + cmov%C1\t{%2, %0|%0, %2} + cmov%c1\t{%3, %0|%0, %3}" [(set_attr "type" "icmov") (set_attr "mode" "SI")]) @@ -15680,8 +15494,8 @@ "TARGET_CMOVE && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - cmov%C1\\t{%2, %0|%0, %2} - cmov%c1\\t{%3, %0|%0, %3}" + cmov%C1\t{%2, %0|%0, %2} + cmov%c1\t{%3, %0|%0, %3}" [(set_attr "type" "icmov") (set_attr "mode" "HI")]) @@ -15702,10 +15516,10 @@ "TARGET_CMOVE && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - fcmov%F1\\t{%2, %0|%0, %2} - fcmov%f1\\t{%3, %0|%0, %3} - cmov%C1\\t{%2, %0|%0, %2} - cmov%c1\\t{%3, %0|%0, %3}" + fcmov%F1\t{%2, %0|%0, %2} + fcmov%f1\t{%3, %0|%0, %3} + cmov%C1\t{%2, %0|%0, %2} + cmov%c1\t{%3, %0|%0, %3}" [(set_attr "type" "fcmov,fcmov,icmov,icmov") (set_attr "mode" "SF,SF,SI,SI")]) @@ -15726,8 +15540,8 @@ "TARGET_CMOVE && !TARGET_64BIT && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - fcmov%F1\\t{%2, %0|%0, %2} - fcmov%f1\\t{%3, %0|%0, %3} + fcmov%F1\t{%2, %0|%0, %2} + fcmov%f1\t{%3, %0|%0, %3} # #" [(set_attr "type" "fcmov,fcmov,multi,multi") @@ -15742,10 +15556,10 @@ "TARGET_CMOVE && TARGET_64BIT && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)" "@ - fcmov%F1\\t{%2, %0|%0, %2} - fcmov%f1\\t{%3, %0|%0, %3} - cmov%C1\\t{%2, %0|%0, %2} - cmov%c1\\t{%3, %0|%0, %3}" + fcmov%F1\t{%2, %0|%0, %2} + fcmov%f1\t{%3, %0|%0, %3} + cmov%C1\t{%2, %0|%0, %2} + cmov%c1\t{%3, %0|%0, %3}" [(set_attr "type" "fcmov,fcmov,icmov,icmov") (set_attr "mode" "DF")]) @@ -15792,8 +15606,8 @@ (match_operand:XF 3 "register_operand" "0,f")))] "TARGET_CMOVE && !TARGET_64BIT" "@ - fcmov%F1\\t{%2, %0|%0, %2} - fcmov%f1\\t{%3, %0|%0, %3}" + fcmov%F1\t{%2, %0|%0, %2} + fcmov%f1\t{%3, %0|%0, %3}" [(set_attr "type" "fcmov") (set_attr "mode" "XF")]) @@ -15805,8 +15619,8 @@ (match_operand:TF 3 "register_operand" "0,f")))] "TARGET_CMOVE" "@ - fcmov%F1\\t{%2, %0|%0, %2} - fcmov%f1\\t{%3, %0|%0, %3}" + fcmov%F1\t{%2, %0|%0, %2} + fcmov%f1\t{%3, %0|%0, %3}" [(set_attr "type" "fcmov") (set_attr "mode" "XF")]) @@ -15888,7 +15702,7 @@ (match_dup 1) (match_dup 2)))] "TARGET_SSE && reload_completed" - "minss\\t{%2, %0|%0, %2}" + "minss\t{%2, %0|%0, %2}" [(set_attr "type" "sse") (set_attr "mode" "SF")]) @@ -15969,7 +15783,7 @@ (match_dup 1) (match_dup 2)))] "TARGET_SSE2 && reload_completed" - "minsd\\t{%2, %0|%0, %2}" + "minsd\t{%2, %0|%0, %2}" [(set_attr "type" "sse") (set_attr "mode" "DF")]) @@ -16049,7 +15863,7 @@ (match_dup 1) (match_dup 2)))] "TARGET_SSE && reload_completed" - "maxss\\t{%2, %0|%0, %2}" + "maxss\t{%2, %0|%0, %2}" [(set_attr "type" "sse") (set_attr "mode" "SF")]) @@ -16129,7 +15943,7 @@ (match_dup 1) (match_dup 2)))] "TARGET_SSE2 && reload_completed" - "maxsd\\t{%2, %0|%0, %2}" + "maxsd\t{%2, %0|%0, %2}" [(set_attr "type" "sse") (set_attr "mode" "DF")]) @@ -16151,7 +15965,6 @@ (clobber (reg:CC 17)) (clobber (mem:BLK (scratch)))])] "" - " { if (TARGET_64BIT) { @@ -16159,7 +15972,7 @@ (operands[0], operands[1], operands[2])); DONE; } -}") +}) (define_insn "*pro_epilogue_adjust_stack_1" [(set (match_operand:SI 0 "register_operand" "=r,r") @@ -16168,12 +15981,11 @@ (clobber (reg:CC 17)) (clobber (mem:BLK (scratch)))] "!TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOV: - return \"mov{l}\\t{%1, %0|%0, %1}\"; + return "mov{l}\t{%1, %0|%0, %1}"; case TYPE_ALU: if (GET_CODE (operands[2]) == CONST_INT @@ -16182,18 +15994,18 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{l}\\t{%2, %0|%0, %2}\"; + return "sub{l}\t{%2, %0|%0, %2}"; } - return \"add{l}\\t{%2, %0|%0, %2}\"; + return "add{l}\t{%2, %0|%0, %2}"; case TYPE_LEA: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); - return \"lea{l}\\t{%a2, %0|%0, %a2}\"; + return "lea{l}\t{%a2, %0|%0, %a2}"; default: abort (); } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "0") (const_string "alu") @@ -16210,12 +16022,11 @@ (clobber (reg:CC 17)) (clobber (mem:BLK (scratch)))] "TARGET_64BIT" - "* { switch (get_attr_type (insn)) { case TYPE_IMOV: - return \"mov{q}\\t{%1, %0|%0, %1}\"; + return "mov{q}\t{%1, %0|%0, %1}"; case TYPE_ALU: if (GET_CODE (operands[2]) == CONST_INT @@ -16224,18 +16035,18 @@ && INTVAL (operands[2]) != -128))) { operands[2] = GEN_INT (-INTVAL (operands[2])); - return \"sub{q}\\t{%2, %0|%0, %2}\"; + return "sub{q}\t{%2, %0|%0, %2}"; } - return \"add{q}\\t{%2, %0|%0, %2}\"; + return "add{q}\t{%2, %0|%0, %2}"; case TYPE_LEA: operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0)); - return \"lea{q}\\t{%a2, %0|%0, %a2}\"; + return "lea{q}\t{%a2, %0|%0, %a2}"; default: abort (); } -}" +} [(set (attr "type") (cond [(eq_attr "alternative" "0") (const_string "alu") @@ -16321,7 +16132,6 @@ "!SSE_REG_P (operands[0]) && reload_completed && VALID_SSE_REG_MODE (GET_MODE (operands[0]))" [(const_int 0)] - " { ix86_compare_op0 = operands[5]; ix86_compare_op1 = operands[4]; @@ -16329,7 +16139,7 @@ VOIDmode, operands[5], operands[4]); ix86_expand_fp_movcc (operands); DONE; -}") +}) ;; Split SSE based conditional move into seqence: ;; cmpCC op0, op4 - set op0 to 0 or ffffffff depending on the comparison @@ -16353,14 +16163,13 @@ (subreg:TI (match_dup 3) 0))) (set (subreg:TI (match_dup 0) 0) (ior:TI (subreg:TI (match_dup 6) 0) (subreg:TI (match_dup 7) 0)))] - " { PUT_MODE (operands[1], GET_MODE (operands[0])); if (operands_match_p (operands[0], operands[4])) operands[6] = operands[4], operands[7] = operands[2]; else operands[6] = operands[2], operands[7] = operands[4]; -}") +}) ;; Special case of conditional move we can handle effectivly. ;; Do not brother with the integer/floating point case, since these are @@ -16458,7 +16267,6 @@ [(set (match_dup 0) (match_op_dup 1 [(match_dup 0) (match_dup 5)])) (set (subreg:TI (match_dup 0) 0) (and:TI (match_dup 6) (subreg:TI (match_dup 7) 0)))] - " { PUT_MODE (operands[1], GET_MODE (operands[0])); if (!sse_comparison_operator (operands[1], VOIDmode)) @@ -16479,19 +16287,18 @@ operands[7] = operands[2]; operands[6] = gen_rtx_SUBREG (TImode, operands[0], 0); } -}") +}) (define_expand "allocate_stack_worker" [(match_operand:SI 0 "register_operand" "")] "TARGET_STACK_PROBE" - " { if (TARGET_64BIT) emit_insn (gen_allocate_stack_worker_rex64 (operands[0])); else emit_insn (gen_allocate_stack_worker_1 (operands[0])); DONE; -}") +}) (define_insn "allocate_stack_worker_1" [(unspec:SI [(match_operand:SI 0 "register_operand" "a")] 3) @@ -16499,7 +16306,7 @@ (clobber (match_dup 0)) (clobber (reg:CC 17))] "TARGET_STACK_PROBE && !TARGET_64BIT" - "call\\t__alloca" + "call\t__alloca" [(set_attr "type" "multi") (set_attr "length" "5")]) @@ -16509,7 +16316,7 @@ (clobber (match_dup 0)) (clobber (reg:CC 17))] "TARGET_STACK_PROBE && TARGET_64BIT" - "call\\t__alloca" + "call\t__alloca" [(set_attr "type" "multi") (set_attr "length" "5")]) @@ -16522,7 +16329,6 @@ (minus:SI (reg:SI 7) (match_dup 1))) (clobber (reg:CC 17))])] "TARGET_STACK_PROBE" - " { #ifdef CHECK_STACK_LIMIT if (GET_CODE (operands[1]) == CONST_INT @@ -16536,16 +16342,15 @@ emit_move_insn (operands[0], virtual_stack_dynamic_rtx); DONE; -}") +}) (define_expand "builtin_setjmp_receiver" [(label_ref (match_operand 0 "" ""))] "flag_pic && !TARGET_64BIT" - " { load_pic_register (); DONE; -}") +}) ;; Avoid redundant prefixes by splitting HImode arithmetic to SImode. @@ -17412,13 +17217,12 @@ (set (reg:SI 7) (plus:SI (reg:SI 7) (match_operand:SI 3 "immediate_operand" "")))] "!TARGET_64BIT" - "* { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; -}" + return "call\t%P1"; +} [(set_attr "type" "callv")]) (define_insn "*call_value_pop_1" @@ -17428,20 +17232,19 @@ (set (reg:SI 7) (plus:SI (reg:SI 7) (match_operand:SI 3 "immediate_operand" "i")))] "!TARGET_64BIT" - "* { if (constant_call_address_operand (operands[1], QImode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; + return "call\t%P1"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%A1\"; + return "jmp\t%A1"; else - return \"call\\t%A1\"; -}" + return "call\t%A1"; +} [(set_attr "type" "callv")]) (define_insn "*call_value_0" @@ -17449,13 +17252,12 @@ (call (mem:QI (match_operand:SI 1 "constant_call_address_operand" "")) (match_operand:SI 2 "" "")))] "!TARGET_64BIT" - "* { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; -}" + return "call\t%P1"; +} [(set_attr "type" "callv")]) (define_insn "*call_value_0_rex64" @@ -17463,13 +17265,12 @@ (call (mem:QI (match_operand:DI 1 "constant_call_address_operand" "")) (match_operand:DI 2 "const_int_operand" "")))] "TARGET_64BIT" - "* { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; -}" + return "call\t%P1"; +} [(set_attr "type" "callv")]) (define_insn "*call_value_1" @@ -17477,20 +17278,19 @@ (call (mem:QI (match_operand:SI 1 "call_insn_operand" "rsm")) (match_operand:SI 2 "" "")))] "!TARGET_64BIT" - "* { if (constant_call_address_operand (operands[1], QImode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; + return "call\t%P1"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%*%1\"; + return "jmp\t%*%1"; else - return \"call\\t%*%1\"; -}" + return "call\t%*%1"; +} [(set_attr "type" "callv")]) (define_insn "*call_value_1_rex64" @@ -17498,26 +17298,25 @@ (call (mem:QI (match_operand:DI 1 "call_insn_operand" "rsm")) (match_operand:DI 2 "" "")))] "TARGET_64BIT" - "* { if (constant_call_address_operand (operands[1], QImode)) { if (SIBLING_CALL_P (insn)) - return \"jmp\\t%P1\"; + return "jmp\t%P1"; else - return \"call\\t%P1\"; + return "call\t%P1"; } if (SIBLING_CALL_P (insn)) - return \"jmp\\t%A1\"; + return "jmp\t%A1"; else - return \"call\\t%A1\"; -}" + return "call\t%A1"; +} [(set_attr "type" "callv")]) (define_insn "trap" [(trap_if (const_int 1) (const_int 5))] "" - "int\\t$5") + "int\t$5") ;;; ix86 doesn't have conditional trap instructions, but we fake them ;;; for the sake of bounds checking. By emitting bounds checks as @@ -17541,28 +17340,26 @@ [(match_dup 2) (const_int 0)]) (match_operand 1 "const_int_operand" ""))] "" - " { emit_insn (gen_rtx_TRAP_IF (VOIDmode, ix86_expand_compare (GET_CODE (operands[0]), NULL, NULL), operands[1])); DONE; -}") +}) -(define_insn "" +(define_insn "*conditional_trap_1" [(trap_if (match_operator 0 "comparison_operator" [(reg 17) (const_int 0)]) (match_operand 1 "const_int_operand" ""))] "" - "* { operands[2] = gen_label_rtx (); - output_asm_insn (\"j%c0\\t%l2\; int\\t%1\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + output_asm_insn ("j%c0\t%l2\; int\t%1", operands); + ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (operands[2])); RET; -}") +}) ;; Pentium III SIMD instructions. @@ -17573,7 +17370,7 @@ (match_operand:V4SF 1 "general_operand" "xm,x"))] "TARGET_SSE" ;; @@@ let's try to use movaps here. - "movaps\\t{%1, %0|%0, %1}" + "movaps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "movv4si_internal" @@ -17581,35 +17378,34 @@ (match_operand:V4SI 1 "general_operand" "xm,x"))] "TARGET_SSE" ;; @@@ let's try to use movaps here. - "movaps\\t{%1, %0|%0, %1}" + "movaps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "movv8qi_internal" [(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m") (match_operand:V8QI 1 "general_operand" "ym,y"))] "TARGET_MMX" - "movq\\t{%1, %0|%0, %1}" + "movq\t{%1, %0|%0, %1}" [(set_attr "type" "mmx")]) (define_insn "movv4hi_internal" [(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m") (match_operand:V4HI 1 "general_operand" "ym,y"))] "TARGET_MMX" - "movq\\t{%1, %0|%0, %1}" + "movq\t{%1, %0|%0, %1}" [(set_attr "type" "mmx")]) (define_insn "movv2si_internal" [(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m") (match_operand:V2SI 1 "general_operand" "ym,y"))] "TARGET_MMX" - "movq\\t{%1, %0|%0, %1}" + "movq\t{%1, %0|%0, %1}" [(set_attr "type" "mmx")]) (define_expand "movti" [(set (match_operand:TI 0 "general_operand" "") (match_operand:TI 1 "general_operand" ""))] "TARGET_SSE" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17635,13 +17431,12 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_expand "movv4sf" [(set (match_operand:V4SF 0 "general_operand" "") (match_operand:V4SF 1 "general_operand" ""))] "TARGET_SSE" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17667,13 +17462,12 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_expand "movv4si" [(set (match_operand:V4SI 0 "general_operand" "") (match_operand:V4SI 1 "general_operand" ""))] "TARGET_MMX" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17699,13 +17493,12 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_expand "movv2si" [(set (match_operand:V2SI 0 "general_operand" "") (match_operand:V2SI 1 "general_operand" ""))] "TARGET_MMX" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17731,13 +17524,12 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_expand "movv4hi" [(set (match_operand:V4HI 0 "general_operand" "") (match_operand:V4HI 1 "general_operand" ""))] "TARGET_MMX" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17763,13 +17555,12 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_expand "movv8qi" [(set (match_operand:V8QI 0 "general_operand" "") (match_operand:V8QI 1 "general_operand" ""))] "TARGET_MMX" - " { /* For constants other than zero into memory. We do not know how the instructions used to build constants modify the upper 64 bits @@ -17795,7 +17586,7 @@ emit_move_insn (operands[0], temp); DONE; } -}") +}) (define_insn_and_split "*pushti" [(set (match_operand:TI 0 "push_operand" "=<") @@ -17868,8 +17659,8 @@ (match_operand:TI 1 "general_operand" "xm,x"))] "TARGET_SSE" "@ - movaps\\t{%1, %0|%0, %1} - movaps\\t{%1, %0|%0, %1}" + movaps\t{%1, %0|%0, %1} + movaps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) ;; These two patterns are useful for specifying exactly whether to use @@ -17879,8 +17670,8 @@ (unspec:V4SF [(match_operand:V4SF 1 "general_operand" "xm,x")] 38))] "TARGET_SSE" "@ - movaps\\t{%1, %0|%0, %1} - movaps\\t{%1, %0|%0, %1}" + movaps\t{%1, %0|%0, %1} + movaps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sse_movups" @@ -17888,8 +17679,8 @@ (unspec:V4SF [(match_operand:V4SF 1 "general_operand" "xm,x")] 39))] "TARGET_SSE" "@ - movups\\t{%1, %0|%0, %1} - movups\\t{%1, %0|%0, %1}" + movups\t{%1, %0|%0, %1} + movups\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) @@ -17899,14 +17690,14 @@ [(set (match_operand:SI 0 "register_operand" "=r") (unspec:SI [(match_operand:V4SF 1 "register_operand" "x")] 33))] "TARGET_SSE" - "movmskps\\t{%1, %0|%0, %1}" + "movmskps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "mmx_pmovmskb" [(set (match_operand:SI 0 "register_operand" "=r") (unspec:SI [(match_operand:V8QI 1 "register_operand" "y")] 33))] "TARGET_SSE" - "pmovmskb\\t{%1, %0|%0, %1}" + "pmovmskb\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "mmx_maskmovq" @@ -17915,21 +17706,21 @@ (match_operand:V8QI 2 "register_operand" "y")] 32))] "TARGET_SSE" ;; @@@ check ordering of operands in intel/nonintel syntax - "maskmovq\\t{%2, %1|%1, %2}" + "maskmovq\t{%2, %1|%1, %2}" [(set_attr "type" "sse")]) (define_insn "sse_movntv4sf" [(set (match_operand:V4SF 0 "memory_operand" "=m") (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "x")] 34))] "TARGET_SSE" - "movntps\\t{%1, %0|%0, %1}" + "movntps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sse_movntdi" [(set (match_operand:DI 0 "memory_operand" "=m") (unspec:DI [(match_operand:DI 1 "register_operand" "y")] 34))] "TARGET_SSE" - "movntq\\t{%1, %0|%0, %1}" + "movntq\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sse_movhlps" @@ -17943,7 +17734,7 @@ (const_int 1)])) (const_int 3)))] "TARGET_SSE" - "movhlps\\t{%2, %0|%0, %2}" + "movhlps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_movlhps" @@ -17957,7 +17748,7 @@ (const_int 1)])) (const_int 12)))] "TARGET_SSE" - "movlhps\\t{%2, %0|%0, %2}" + "movlhps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_movhps" @@ -17967,7 +17758,7 @@ (match_operand:V4SF 2 "nonimmediate_operand" "m,x") (const_int 12)))] "TARGET_SSE && (GET_CODE (operands[1]) == MEM || GET_CODE (operands[2]) == MEM)" - "movhps\\t{%2, %0|%0, %2}" + "movhps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_movlps" @@ -17977,7 +17768,7 @@ (match_operand:V4SF 2 "nonimmediate_operand" "m,x") (const_int 3)))] "TARGET_SSE && (GET_CODE (operands[1]) == MEM || GET_CODE (operands[2]) == MEM)" - "movlps\\t{%2, %0|%0, %2}" + "movlps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_loadss" @@ -17987,7 +17778,7 @@ (vec_duplicate:V4SF (float:SF (const_int 0))) (const_int 1)))] "TARGET_SSE" - "movss\\t{%1, %0|%0, %1}" + "movss\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sse_movss" @@ -17997,7 +17788,7 @@ (match_operand:V4SF 2 "register_operand" "x") (const_int 1)))] "TARGET_SSE" - "movss\\t{%2, %0|%0, %2}" + "movss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_storess" @@ -18006,7 +17797,7 @@ (match_operand:V4SF 1 "register_operand" "x") (parallel [(const_int 0)])))] "TARGET_SSE" - "movss\\t{%1, %0|%0, %1}" + "movss\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sse_shufps" @@ -18016,7 +17807,7 @@ (match_operand:SI 3 "immediate_operand" "i")] 41))] "TARGET_SSE" ;; @@@ check operand order for intel/nonintel syntax - "shufps\\t{%3, %2, %0|%0, %2, %3}" + "shufps\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "sse")]) @@ -18027,7 +17818,7 @@ (plus:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "addps\\t{%2, %0|%0, %2}" + "addps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmaddv4sf3" @@ -18037,7 +17828,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "addss\\t{%2, %0|%0, %2}" + "addss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "subv4sf3" @@ -18045,7 +17836,7 @@ (minus:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "subps\\t{%2, %0|%0, %2}" + "subps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmsubv4sf3" @@ -18055,7 +17846,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "subss\\t{%2, %0|%0, %2}" + "subss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "mulv4sf3" @@ -18063,7 +17854,7 @@ (mult:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "mulps\\t{%2, %0|%0, %2}" + "mulps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmmulv4sf3" @@ -18073,7 +17864,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "mulss\\t{%2, %0|%0, %2}" + "mulss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "divv4sf3" @@ -18081,7 +17872,7 @@ (div:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "divps\\t{%2, %0|%0, %2}" + "divps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmdivv4sf3" @@ -18091,7 +17882,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "divss\\t{%2, %0|%0, %2}" + "divss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18101,7 +17892,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=x") (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "xm")] 42))] "TARGET_SSE" - "rcpps\\t{%1, %0|%0, %1}" + "rcpps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "vmrcpv4sf2" @@ -18110,14 +17901,14 @@ (match_operand:V4SF 2 "register_operand" "0") (const_int 1)))] "TARGET_SSE" - "rcpss\\t{%1, %0|%0, %1}" + "rcpss\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "rsqrtv4sf2" [(set (match_operand:V4SF 0 "register_operand" "=x") (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "xm")] 43))] "TARGET_SSE" - "rsqrtps\\t{%1, %0|%0, %1}" + "rsqrtps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "vmrsqrtv4sf2" @@ -18126,14 +17917,14 @@ (match_operand:V4SF 2 "register_operand" "0") (const_int 1)))] "TARGET_SSE" - "rsqrtss\\t{%1, %0|%0, %1}" + "rsqrtss\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "sqrtv4sf2" [(set (match_operand:V4SF 0 "register_operand" "=x") (sqrt:V4SF (match_operand:V4SF 1 "register_operand" "xm")))] "TARGET_SSE" - "sqrtps\\t{%1, %0|%0, %1}" + "sqrtps\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "vmsqrtv4sf2" @@ -18142,7 +17933,7 @@ (match_operand:V4SF 2 "register_operand" "0") (const_int 1)))] "TARGET_SSE" - "sqrtss\\t{%1, %0|%0, %1}" + "sqrtss\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) @@ -18158,7 +17949,7 @@ (and:TI (subreg:TI (match_operand:DF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:DF 2 "register_operand" "Y") 0)))] "TARGET_SSE2" - "andpd\\t{%2, %0|%0, %2}" + "andpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_andti3_df_2" @@ -18166,7 +17957,7 @@ (and:TI (subreg:TI (match_operand:DF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "Ym")))] "TARGET_SSE2" - "andpd\\t{%2, %0|%0, %2}" + "andpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_andti3_sf_1" @@ -18174,7 +17965,7 @@ (and:TI (subreg:TI (match_operand:SF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:SF 2 "register_operand" "x") 0)))] "TARGET_SSE" - "andps\\t{%2, %0|%0, %2}" + "andps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_andti3_sf_2" @@ -18182,7 +17973,7 @@ (and:TI (subreg:TI (match_operand:SF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "andps\\t{%2, %0|%0, %2}" + "andps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_andti3" @@ -18190,7 +17981,7 @@ (and:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE && !TARGET_SSE2" - "andps\\t{%2, %0|%0, %2}" + "andps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_andti3_sse2" @@ -18198,7 +17989,7 @@ (and:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE2" - "pand\\t{%2, %0|%0, %2}" + "pand\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_nandti3_df" @@ -18206,7 +17997,7 @@ (and:TI (not:TI (subreg:TI (match_operand:DF 1 "register_operand" "0") 0)) (match_operand:TI 2 "nonimmediate_operand" "Ym")))] "TARGET_SSE2" - "andnpd\\t{%2, %0|%0, %2}" + "andnpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_nandti3_sf" @@ -18214,7 +18005,7 @@ (and:TI (not:TI (subreg:TI (match_operand:SF 1 "register_operand" "0") 0)) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "andnps\\t{%2, %0|%0, %2}" + "andnps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_nandti3" @@ -18222,7 +18013,7 @@ (and:TI (not:TI (match_operand:TI 1 "register_operand" "0")) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE && !TARGET_SSE2" - "andnps\\t{%2, %0|%0, %2}" + "andnps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_nandti3_sse2" @@ -18230,7 +18021,7 @@ (and:TI (not:TI (match_operand:TI 1 "register_operand" "0")) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE2" - "pnand\\t{%2, %0|%0, %2}" + "pnand\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_iorti3_df_1" @@ -18238,7 +18029,7 @@ (ior:TI (subreg:TI (match_operand:DF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:DF 2 "register_operand" "Y") 0)))] "TARGET_SSE2" - "orpd\\t{%2, %0|%0, %2}" + "orpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_iorti3_df_2" @@ -18246,7 +18037,7 @@ (ior:TI (subreg:TI (match_operand:DF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "Ym")))] "TARGET_SSE2" - "orpd\\t{%2, %0|%0, %2}" + "orpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_iorti3_sf_1" @@ -18254,7 +18045,7 @@ (ior:TI (subreg:TI (match_operand:SF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:SF 2 "register_operand" "x") 0)))] "TARGET_SSE" - "orps\\t{%2, %0|%0, %2}" + "orps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_iorti3_sf_2" @@ -18262,7 +18053,7 @@ (ior:TI (subreg:TI (match_operand:SF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "orps\\t{%2, %0|%0, %2}" + "orps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_iorti3" @@ -18270,7 +18061,7 @@ (ior:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE && !TARGET_SSE2" - "orps\\t{%2, %0|%0, %2}" + "orps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_iorti3_sse2" @@ -18278,7 +18069,7 @@ (ior:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE2" - "por\\t{%2, %0|%0, %2}" + "por\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_xorti3_df_1" @@ -18286,7 +18077,7 @@ (xor:TI (subreg:TI (match_operand:DF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:DF 2 "register_operand" "Y") 0)))] "TARGET_SSE2" - "xorpd\\t{%2, %0|%0, %2}" + "xorpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_xorti3_df_2" @@ -18294,7 +18085,7 @@ (xor:TI (subreg:TI (match_operand:DF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "Ym")))] "TARGET_SSE2" - "xorpd\\t{%2, %0|%0, %2}" + "xorpd\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_xorti3_sf_1" @@ -18302,7 +18093,7 @@ (xor:TI (subreg:TI (match_operand:SF 1 "register_operand" "%0") 0) (subreg:TI (match_operand:SF 2 "register_operand" "x") 0)))] "TARGET_SSE" - "xorps\\t{%2, %0|%0, %2}" + "xorps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_xorti3_sf_2" @@ -18310,7 +18101,7 @@ (xor:TI (subreg:TI (match_operand:SF 1 "register_operand" "0") 0) (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "xorps\\t{%2, %0|%0, %2}" + "xorps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_xorti3" @@ -18318,7 +18109,7 @@ (xor:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE && !TARGET_SSE2" - "xorps\\t{%2, %0|%0, %2}" + "xorps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "*sse_xorti3_sse2" @@ -18326,7 +18117,7 @@ (xor:TI (match_operand:TI 1 "register_operand" "%0") (match_operand:TI 2 "nonimmediate_operand" "xm")))] "TARGET_SSE2" - "pxor\\t{%2, %0|%0, %2}" + "pxor\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) ;; Use xor, but don't show input operands so they aren't live before @@ -18335,7 +18126,7 @@ [(set (match_operand:TI 0 "register_operand" "=x") (unspec:TI [(const_int 0)] 45))] "TARGET_SSE" - "xorps\\t{%0, %0|%0, %0}" + "xorps\t{%0, %0|%0, %0}" [(set_attr "type" "sse")]) @@ -18347,7 +18138,7 @@ [(match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "x")]))] "TARGET_SSE" - "cmp%D3ps\\t{%2, %0|%0, %2}" + "cmp%D3ps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "maskncmpv4sf3" @@ -18357,7 +18148,7 @@ [(match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "x")])))] "TARGET_SSE" - "cmpn%D3ps\\t{%2, %0|%0, %2}" + "cmpn%D3ps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmmaskcmpv4sf3" @@ -18369,7 +18160,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "cmp%D3ss\\t{%2, %0|%0, %2}" + "cmp%D3ss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmmaskncmpv4sf3" @@ -18382,7 +18173,7 @@ (subreg:V4SI (match_dup 1) 0) (const_int 1)))] "TARGET_SSE" - "cmp%D3ss\\t{%2, %0|%0, %2}" + "cmp%D3ss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_comi" @@ -18395,7 +18186,7 @@ (match_operand:V4SF 1 "register_operand" "x") (parallel [(const_int 0)]))]))] "TARGET_SSE" - "comiss\\t{%2, %0|%0, %2}" + "comiss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_ucomi" @@ -18408,7 +18199,7 @@ (match_operand:V4SF 1 "register_operand" "x") (parallel [(const_int 0)]))]))] "TARGET_SSE" - "ucomiss\\t{%2, %0|%0, %2}" + "ucomiss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18429,7 +18220,7 @@ (const_int 3)])) (const_int 5)))] "TARGET_SSE" - "unpckhps\\t{%2, %0|%0, %2}" + "unpckhps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sse_unpcklps" @@ -18447,7 +18238,7 @@ (const_int 1)])) (const_int 5)))] "TARGET_SSE" - "unpcklps\\t{%2, %0|%0, %2}" + "unpcklps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18458,7 +18249,7 @@ (smax:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "maxps\\t{%2, %0|%0, %2}" + "maxps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmsmaxv4sf3" @@ -18468,7 +18259,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "maxss\\t{%2, %0|%0, %2}" + "maxss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sminv4sf3" @@ -18476,7 +18267,7 @@ (smin:V4SF (match_operand:V4SF 1 "register_operand" "0") (match_operand:V4SF 2 "nonimmediate_operand" "xm")))] "TARGET_SSE" - "minps\\t{%2, %0|%0, %2}" + "minps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "vmsminv4sf3" @@ -18486,7 +18277,7 @@ (match_dup 1) (const_int 1)))] "TARGET_SSE" - "minss\\t{%2, %0|%0, %2}" + "minss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18499,7 +18290,7 @@ (float:V2SF (match_operand:V2SI 2 "register_operand" "ym"))) (const_int 12)))] "TARGET_SSE" - "cvtpi2ps\\t{%2, %0|%0, %2}" + "cvtpi2ps\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "cvtps2pi" @@ -18509,7 +18300,7 @@ [(const_int 0) (const_int 1)])))] "TARGET_SSE" - "cvtps2pi\\t{%1, %0|%0, %1}" + "cvtps2pi\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "cvttps2pi" @@ -18519,7 +18310,7 @@ [(const_int 0) (const_int 1)])))] "TARGET_SSE" - "cvttps2pi\\t{%1, %0|%0, %1}" + "cvttps2pi\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "cvtsi2ss" @@ -18529,7 +18320,7 @@ (float:SF (match_operand:SI 2 "register_operand" "rm"))) (const_int 15)))] "TARGET_SSE" - "cvtsi2ss\\t{%2, %0|%0, %2}" + "cvtsi2ss\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "cvtss2si" @@ -18537,7 +18328,7 @@ (vec_select:SI (fix:V4SI (match_operand:V4SF 1 "register_operand" "xm")) (parallel [(const_int 0)])))] "TARGET_SSE" - "cvtss2si\\t{%1, %0|%0, %1}" + "cvtss2si\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) (define_insn "cvttss2si" @@ -18545,7 +18336,7 @@ (vec_select:SI (unspec:V4SI [(match_operand:V4SF 1 "register_operand" "xm")] 30) (parallel [(const_int 0)])))] "TARGET_SSE" - "cvttss2si\\t{%1, %0|%0, %1}" + "cvttss2si\t{%1, %0|%0, %1}" [(set_attr "type" "sse")]) @@ -18558,7 +18349,7 @@ (plus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddb\\t{%2, %0|%0, %2}" + "paddb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "addv4hi3" @@ -18566,7 +18357,7 @@ (plus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddw\\t{%2, %0|%0, %2}" + "paddw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "addv2si3" @@ -18574,7 +18365,7 @@ (plus:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:V2SI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddd\\t{%2, %0|%0, %2}" + "paddd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ssaddv8qi3" @@ -18582,7 +18373,7 @@ (ss_plus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddsb\\t{%2, %0|%0, %2}" + "paddsb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ssaddv4hi3" @@ -18590,7 +18381,7 @@ (ss_plus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddsw\\t{%2, %0|%0, %2}" + "paddsw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "usaddv8qi3" @@ -18598,7 +18389,7 @@ (us_plus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddusb\\t{%2, %0|%0, %2}" + "paddusb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "usaddv4hi3" @@ -18606,7 +18397,7 @@ (us_plus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "paddusw\\t{%2, %0|%0, %2}" + "paddusw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "subv8qi3" @@ -18614,7 +18405,7 @@ (minus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubb\\t{%2, %0|%0, %2}" + "psubb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "subv4hi3" @@ -18622,7 +18413,7 @@ (minus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubw\\t{%2, %0|%0, %2}" + "psubw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "subv2si3" @@ -18630,7 +18421,7 @@ (minus:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:V2SI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubd\\t{%2, %0|%0, %2}" + "psubd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "sssubv8qi3" @@ -18638,7 +18429,7 @@ (ss_minus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubsb\\t{%2, %0|%0, %2}" + "psubsb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "sssubv4hi3" @@ -18646,7 +18437,7 @@ (ss_minus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubsw\\t{%2, %0|%0, %2}" + "psubsw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ussubv8qi3" @@ -18654,7 +18445,7 @@ (us_minus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubusb\\t{%2, %0|%0, %2}" + "psubusb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ussubv4hi3" @@ -18662,7 +18453,7 @@ (us_minus:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "psubusw\\t{%2, %0|%0, %2}" + "psubusw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mulv4hi3" @@ -18670,7 +18461,7 @@ (mult:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pmullw\\t{%2, %0|%0, %2}" + "pmullw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "smulv4hi3_highpart" @@ -18681,7 +18472,7 @@ (sign_extend:V4SI (match_operand:V4HI 2 "nonimmediate_operand" "ym"))) (const_int 16))))] "TARGET_MMX" - "pmulhw\\t{%2, %0|%0, %2}" + "pmulhw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "umulv4hi3_highpart" @@ -18692,7 +18483,7 @@ (zero_extend:V4SI (match_operand:V4HI 2 "nonimmediate_operand" "ym"))) (const_int 16))))] "TARGET_MMX" - "pmulhuw\\t{%2, %0|%0, %2}" + "pmulhuw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_pmaddwd" @@ -18713,7 +18504,7 @@ (parallel [(const_int 1) (const_int 3)]))))))] "TARGET_MMX" - "pmaddwd\\t{%2, %0|%0, %2}" + "pmaddwd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) @@ -18727,7 +18518,7 @@ [(ior:DI (match_operand:DI 1 "register_operand" "0") (match_operand:DI 2 "nonimmediate_operand" "ym"))] 45))] "TARGET_MMX" - "por\\t{%2, %0|%0, %2}" + "por\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_xordi3" @@ -18736,7 +18527,7 @@ [(xor:DI (match_operand:DI 1 "register_operand" "0") (match_operand:DI 2 "nonimmediate_operand" "ym"))] 45))] "TARGET_MMX" - "pxor\\t{%2, %0|%0, %2}" + "pxor\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) ;; Same as pxor, but don't show input operands so that we don't think @@ -18745,7 +18536,7 @@ [(set (match_operand:DI 0 "register_operand" "=y") (unspec:DI [(const_int 0)] 45))] "TARGET_MMX" - "pxor\\t{%0, %0|%0, %0}" + "pxor\t{%0, %0|%0, %0}" [(set_attr "type" "mmx")]) (define_insn "mmx_anddi3" @@ -18754,7 +18545,7 @@ [(and:DI (match_operand:DI 1 "register_operand" "0") (match_operand:DI 2 "nonimmediate_operand" "ym"))] 45))] "TARGET_MMX" - "pand\\t{%2, %0|%0, %2}" + "pand\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_nanddi3" @@ -18763,7 +18554,7 @@ [(and:DI (not:DI (match_operand:DI 1 "register_operand" "0")) (match_operand:DI 2 "nonimmediate_operand" "ym"))] 45))] "TARGET_MMX" - "pandn\\t{%2, %0|%0, %2}" + "pandn\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) @@ -18785,7 +18576,7 @@ (const_int 1)]))) (const_int 1)))] "TARGET_SSE" - "pavgb\\t{%2, %0|%0, %2}" + "pavgb\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "mmx_uavgv4hi3" @@ -18800,7 +18591,7 @@ (const_int 1)]))) (const_int 1)))] "TARGET_SSE" - "pavgw\\t{%2, %0|%0, %2}" + "pavgw\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "mmx_psadbw" @@ -18808,7 +18599,7 @@ (abs:V8QI (minus:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym"))))] "TARGET_SSE" - "psadbw\\t{%2, %0|%0, %2}" + "psadbw\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18821,7 +18612,7 @@ (truncate:HI (match_operand:SI 2 "nonimmediate_operand" "rm"))) (match_operand:SI 3 "immediate_operand" "i")))] "TARGET_SSE" - "pinsrw\\t{%3, %2, %0|%0, %2, %3}" + "pinsrw\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "sse")]) (define_insn "mmx_pextrw" @@ -18830,7 +18621,7 @@ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] "TARGET_SSE" - "pextrw\\t{%2, %1, %0|%0, %1, %2}" + "pextrw\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sse")]) (define_insn "mmx_pshufw" @@ -18839,7 +18630,7 @@ (match_operand:V4HI 2 "nonimmediate_operand" "ym") (match_operand:SI 3 "immediate_operand" "i")] 41))] "TARGET_SSE" - "pshufw\\t{%3, %2, %0|%0, %2, %3}" + "pshufw\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "sse")]) @@ -18850,7 +18641,7 @@ (eq:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpeqb\\t{%2, %0|%0, %2}" + "pcmpeqb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "eqv4hi3" @@ -18858,7 +18649,7 @@ (eq:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpeqw\\t{%2, %0|%0, %2}" + "pcmpeqw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "eqv2si3" @@ -18866,7 +18657,7 @@ (eq:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:V2SI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpeqd\\t{%2, %0|%0, %2}" + "pcmpeqd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "gtv8qi3" @@ -18874,7 +18665,7 @@ (gt:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpgtb\\t{%2, %0|%0, %2}" + "pcmpgtb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "gtv4hi3" @@ -18882,7 +18673,7 @@ (gt:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpgtw\\t{%2, %0|%0, %2}" + "pcmpgtw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "gtv2si3" @@ -18890,7 +18681,7 @@ (gt:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:V2SI 2 "nonimmediate_operand" "ym")))] "TARGET_MMX" - "pcmpgtd\\t{%2, %0|%0, %2}" + "pcmpgtd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) @@ -18901,7 +18692,7 @@ (umax:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_SSE" - "pmaxub\\t{%2, %0|%0, %2}" + "pmaxub\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "smaxv4hi3" @@ -18909,7 +18700,7 @@ (smax:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_SSE" - "pmaxsw\\t{%2, %0|%0, %2}" + "pmaxsw\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "uminv8qi3" @@ -18917,7 +18708,7 @@ (umin:V8QI (match_operand:V8QI 1 "register_operand" "0") (match_operand:V8QI 2 "nonimmediate_operand" "ym")))] "TARGET_SSE" - "pminub\\t{%2, %0|%0, %2}" + "pminub\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) (define_insn "sminv4hi3" @@ -18925,7 +18716,7 @@ (smin:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:V4HI 2 "nonimmediate_operand" "ym")))] "TARGET_SSE" - "pminsw\\t{%2, %0|%0, %2}" + "pminsw\t{%2, %0|%0, %2}" [(set_attr "type" "sse")]) @@ -18936,7 +18727,7 @@ (ashiftrt:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "psraw\\t{%2, %0|%0, %2}" + "psraw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ashrv2si3" @@ -18944,7 +18735,7 @@ (ashiftrt:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "psrad\\t{%2, %0|%0, %2}" + "psrad\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "lshrv4hi3" @@ -18952,7 +18743,7 @@ (lshiftrt:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "psrlw\\t{%2, %0|%0, %2}" + "psrlw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "lshrv2si3" @@ -18960,7 +18751,7 @@ (lshiftrt:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "psrld\\t{%2, %0|%0, %2}" + "psrld\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) ;; See logical MMX insns. @@ -18970,7 +18761,7 @@ [(lshiftrt:DI (match_operand:DI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi"))] 45))] "TARGET_MMX" - "psrlq\\t{%2, %0|%0, %2}" + "psrlq\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ashlv4hi3" @@ -18978,7 +18769,7 @@ (ashift:V4HI (match_operand:V4HI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "psllw\\t{%2, %0|%0, %2}" + "psllw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "ashlv2si3" @@ -18986,7 +18777,7 @@ (ashift:V2SI (match_operand:V2SI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi")))] "TARGET_MMX" - "pslld\\t{%2, %0|%0, %2}" + "pslld\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) ;; See logical MMX insns. @@ -18996,7 +18787,7 @@ [(ashift:DI (match_operand:DI 1 "register_operand" "0") (match_operand:DI 2 "nonmemory_operand" "yi"))] 45))] "TARGET_MMX" - "psllq\\t{%2, %0|%0, %2}" + "psllq\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) @@ -19008,7 +18799,7 @@ (ss_truncate:V4QI (match_operand:V4HI 1 "register_operand" "0")) (ss_truncate:V4QI (match_operand:V4HI 2 "register_operand" "y"))))] "TARGET_MMX" - "packsswb\\t{%2, %0|%0, %2}" + "packsswb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_packssdw" @@ -19017,7 +18808,7 @@ (ss_truncate:V2HI (match_operand:V2SI 1 "register_operand" "0")) (ss_truncate:V2HI (match_operand:V2SI 2 "register_operand" "y"))))] "TARGET_MMX" - "packssdw\\t{%2, %0|%0, %2}" + "packssdw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_packuswb" @@ -19026,7 +18817,7 @@ (us_truncate:V4QI (match_operand:V4HI 1 "register_operand" "0")) (us_truncate:V4QI (match_operand:V4HI 2 "register_operand" "y"))))] "TARGET_MMX" - "packuswb\\t{%2, %0|%0, %2}" + "packuswb\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpckhbw" @@ -19052,7 +18843,7 @@ (const_int 7)])) (const_int 85)))] "TARGET_MMX" - "punpckhbw\\t{%2, %0|%0, %2}" + "punpckhbw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpckhwd" @@ -19070,7 +18861,7 @@ (const_int 1)])) (const_int 5)))] "TARGET_MMX" - "punpckhwd\\t{%2, %0|%0, %2}" + "punpckhwd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpckhdq" @@ -19084,7 +18875,7 @@ (const_int 0)])) (const_int 1)))] "TARGET_MMX" - "punpckhdq\\t{%2, %0|%0, %2}" + "punpckhdq\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpcklbw" @@ -19110,7 +18901,7 @@ (const_int 3)])) (const_int 85)))] "TARGET_MMX" - "punpcklbw\\t{%2, %0|%0, %2}" + "punpcklbw\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpcklwd" @@ -19128,7 +18919,7 @@ (const_int 3)])) (const_int 5)))] "TARGET_MMX" - "punpcklwd\\t{%2, %0|%0, %2}" + "punpcklwd\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) (define_insn "mmx_punpckldq" @@ -19142,7 +18933,7 @@ (const_int 1)])) (const_int 1)))] "TARGET_MMX" - "punpckldq\\t{%2, %0|%0, %2}" + "punpckldq\t{%2, %0|%0, %2}" [(set_attr "type" "mmx")]) @@ -19174,25 +18965,24 @@ (define_insn "ldmxcsr" [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 37)] "TARGET_MMX" - "ldmxcsr\\t%0" + "ldmxcsr\t%0" [(set_attr "type" "mmx")]) (define_insn "stmxcsr" [(set (match_operand:SI 0 "memory_operand" "=m") (unspec_volatile:SI [(const_int 0)] 40))] "TARGET_MMX" - "stmxcsr\\t%0" + "stmxcsr\t%0" [(set_attr "type" "mmx")]) (define_expand "sfence" [(set (match_dup 0) (unspec:BLK [(match_dup 0)] 44))] "TARGET_SSE" - " { operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); MEM_VOLATILE_P (operands[0]) = 1; -}") +}) (define_insn "*sfence_insn" [(set (match_operand:BLK 0 "" "") @@ -19206,21 +18996,20 @@ [(unspec [(match_operand:SI 0 "address_operand" "p") (match_operand:SI 1 "immediate_operand" "n")] 35)] "TARGET_SSE" - "* { switch (INTVAL (operands[1])) { case 0: - return \"prefetchnta\\t%a0\"; + return "prefetchnta\t%a0"; case 1: - return \"prefetcht0\\t%a0\"; + return "prefetcht0\t%a0"; case 2: - return \"prefetcht1\\t%a0\"; + return "prefetcht1\t%a0"; case 3: - return \"prefetcht2\\t%a0\"; + return "prefetcht2\t%a0"; default: abort (); } -}" +} [(set_attr "type" "sse")]) diff --git a/gcc/doc/gcc.texi b/gcc/doc/gcc.texi index be4773e6eb4..6601ab61c7a 100644 --- a/gcc/doc/gcc.texi +++ b/gcc/doc/gcc.texi @@ -3724,6 +3724,10 @@ and @file{rtl.def}, and subroutines in file @file{rtl.c}. The tools @code{gen*} also use these files to read and work with the machine description RTL@. +@item +All the tools that read the machine description use support routines +found in @file{gensupport.c}, @file{errors.c}, and @file{read-rtl.c}. + @findex genconfig @item Several passes refer to the header file @file{insn-config.h} which diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 15374c68312..3d4d2b1a6d5 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -184,9 +184,26 @@ Here is an actual example of an instruction pattern, for the 68000/68020. (match_operand:SI 0 "general_operand" "rm"))] "" "* -@{ if (TARGET_68020 || ! ADDRESS_REG_P (operands[0])) +@{ + if (TARGET_68020 || ! ADDRESS_REG_P (operands[0])) return \"tstl %0\"; - return \"cmpl #0,%0\"; @}") + return \"cmpl #0,%0\"; +@}") +@end example + +@noindent +This can also be written using braced strings: + +@example +(define_insn "tstsi" + [(set (cc0) + (match_operand:SI 0 "general_operand" "rm"))] + "" +@{ + if (TARGET_68020 || ! ADDRESS_REG_P (operands[0])) + return "tstl %0"; + return "cmpl #0,%0"; +@}) @end example This is an instruction that sets the condition codes based on the value of @@ -620,6 +637,11 @@ template-string you want. Most such templates use C string literals, which require doublequote characters to delimit them. To include these doublequote characters in the string, prefix each one with @samp{\}. +If the output control string is written as a brace block instead of a +double-quoted string, it is automatically assumed to be C code. In that +case, it is not necessary to put in a leading asterisk, or to escape the +doublequotes surrounding C string literals. + The operands may be found in the array @code{operands}, whose C data type is @code{rtx []}. @@ -656,10 +678,10 @@ a pattern could use @code{which_alternative} to choose between them: [(set (match_operand:SI 0 "general_operand" "=r,m") (const_int 0))] "" - "* + @{ return (which_alternative == 0 - ? \"clrreg %0\" : \"clrmem %0\"); - ") + ? "clrreg %0" : "clrmem %0"); + @}) @end smallexample The example above, where the assembler code to generate was @@ -3943,21 +3965,19 @@ Here is an example, taken from the 68000 machine description: (set (match_operand:DF 0 "register_operand" "=f") (match_operand:DF 1 "register_operand" "ad"))] "FP_REG_P (operands[0]) && ! FP_REG_P (operands[1])" - "* @{ rtx xoperands[2]; xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); #ifdef MOTOROLA - output_asm_insn (\"move.l %1,(sp)\", xoperands); - output_asm_insn (\"move.l %1,-(sp)\", operands); - return \"fmove.d (sp)+,%0\"; + output_asm_insn ("move.l %1,(sp)", xoperands); + output_asm_insn ("move.l %1,-(sp)", operands); + return "fmove.d (sp)+,%0"; #else - output_asm_insn (\"movel %1,sp@@\", xoperands); - output_asm_insn (\"movel %1,sp@@-\", operands); - return \"fmoved sp@@+,%0\"; + output_asm_insn ("movel %1,sp@@", xoperands); + output_asm_insn ("movel %1,sp@@-", operands); + return "fmoved sp@@+,%0"; #endif -@} -") +@}) @end smallexample @need 1000 @@ -4656,11 +4676,10 @@ as follows: [(set (pc) (label_ref (match_operand 0 "" "")))] "" - "* @{ return (get_attr_length (insn) == 4 - ? \"b %l0\" : \"l r15,=a(%l0); br r15\"); -@}" + ? "b %l0" : "l r15,=a(%l0); br r15"); +@} [(set (attr "length") (if_then_else (lt (match_dup 0) (const_int 4096)) (const_int 4) (const_int 6)))]) diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index dbd36915233..618322a43c3 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -70,6 +70,21 @@ pointers instead of strings are valid. Within RTL code, strings are most commonly found inside @code{symbol_ref} expressions, but they appear in other contexts in the RTL expressions that make up machine descriptions. +In a machine description, strings are normally written with double +quotes, as you would in C. However, strings in machine descriptions may +extend over many lines, which is invalid C, and adjacent string +constants are not concatenated as they are in C. Any string constant +may be surrounded with a single set of parentheses. Sometimes this +makes the machine description easier to read. + +There is also a special syntax for strings, which can be useful when C +code is embedded in a machine description. Wherever a string can +appear, it is also valid to write a C-style brace block. The entire +brace block, including the outermost pair of braces, is considered to be +the string constant. Double quote characters inside the braces are not +special. Therefore, if you write string constants in the C code, you +need not escape each quote character with a backslash. + A vector contains an arbitrary number of pointers to expressions. The number of elements in the vector is explicitly present in the vector. The written form of a vector consists of square brackets @@ -3182,11 +3197,10 @@ combiner is finished with the insn. This is done by calling @section Reading RTL To read an RTL object from a file, call @code{read_rtx}. It takes one -argument, a stdio stream, and returns a single RTL object. - -Reading RTL from a file is very slow. This is not currently a -problem since reading RTL occurs only as part of building the -compiler. +argument, a stdio stream, and returns a single RTL object. This routine +is defined in @file{read-rtl.c}. It is not available in the compiler +itself, only the various programs that generate the compiler back end +from the machine description. People frequently have the idea of using RTL stored as text in a file as an interface between a language front end and the bulk of GCC@. This diff --git a/gcc/read-rtl.c b/gcc/read-rtl.c new file mode 100644 index 00000000000..febab50b968 --- /dev/null +++ b/gcc/read-rtl.c @@ -0,0 +1,727 @@ +/* RTL reader for GNU C Compiler. + Copyright (C) 1987, 1988, 1991, 1994, 1997, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#include "hconfig.h" +#include "system.h" +#include "rtl.h" +#include "obstack.h" +#include "hashtab.h" + +#define obstack_chunk_alloc xmalloc +#define obstack_chunk_free free + +static htab_t md_constants; + +static void fatal_with_file_and_line PARAMS ((FILE *, const char *, ...)) + ATTRIBUTE_PRINTF_2 ATTRIBUTE_NORETURN; +static void fatal_expected_char PARAMS ((FILE *, int, int)) ATTRIBUTE_NORETURN; +static void read_name PARAMS ((char *, FILE *)); +static char *read_string PARAMS ((struct obstack *, FILE *, int)); +static char *read_quoted_string PARAMS ((struct obstack *, FILE *)); +static char *read_braced_string PARAMS ((struct obstack *, FILE *)); +static unsigned def_hash PARAMS ((const void *)); +static int def_name_eq_p PARAMS ((const void *, const void *)); +static void read_constants PARAMS ((FILE *infile, char *tmp_char)); + +/* Subroutines of read_rtx. */ + +/* The current line number for the file. */ +int read_rtx_lineno = 1; + +/* The filename for aborting with file and line. */ +const char *read_rtx_filename = ""; + +static void +fatal_with_file_and_line VPARAMS ((FILE *infile, const char *msg, ...)) +{ +#ifndef ANSI_PROTOTYPES + FILE *infile; + const char *msg; +#endif + va_list ap; + char context[64]; + size_t i; + int c; + + VA_START (ap, msg); + +#ifndef ANSI_PROTOTYPES + infile = va_arg (ap, FILE *); + msg = va_arg (ap, const char *); +#endif + + fprintf (stderr, "%s:%d: ", read_rtx_filename, read_rtx_lineno); + vfprintf (stderr, msg, ap); + putc ('\n', stderr); + + /* Gather some following context. */ + for (i = 0; i < sizeof(context)-1; ++i) + { + c = getc (infile); + if (c == EOF) + break; + if (c == '\r' || c == '\n') + break; + context[i] = c; + } + context[i] = '\0'; + + fprintf (stderr, "%s:%d: following context is `%s'\n", + read_rtx_filename, read_rtx_lineno, context); + + va_end (ap); + exit (1); +} + +/* Dump code after printing a message. Used when read_rtx finds + invalid data. */ + +static void +fatal_expected_char (infile, expected_c, actual_c) + FILE *infile; + int expected_c, actual_c; +{ + fatal_with_file_and_line (infile, "expected character `%c', found `%c'", + expected_c, actual_c); +} + +/* Read chars from INFILE until a non-whitespace char + and return that. Comments, both Lisp style and C style, + are treated as whitespace. + Tools such as genflags use this function. */ + +int +read_skip_spaces (infile) + FILE *infile; +{ + register int c; + while (1) + { + c = getc (infile); + switch (c) + { + case '\n': + read_rtx_lineno++; + break; + + case ' ': case '\t': case '\f': case '\r': + break; + + case ';': + do + c = getc (infile); + while (c != '\n' && c != EOF); + read_rtx_lineno++; + break; + + case '/': + { + register int prevc; + c = getc (infile); + if (c != '*') + fatal_expected_char (infile, '*', c); + + prevc = 0; + while ((c = getc (infile)) && c != EOF) + { + if (c == '\n') + read_rtx_lineno++; + else if (prevc == '*' && c == '/') + break; + prevc = c; + } + } + break; + + default: + return c; + } + } +} + +/* Read an rtx code name into the buffer STR[]. + It is terminated by any of the punctuation chars of rtx printed syntax. */ + +static void +read_name (str, infile) + char *str; + FILE *infile; +{ + register char *p; + register int c; + + c = read_skip_spaces(infile); + + p = str; + while (1) + { + if (c == ' ' || c == '\n' || c == '\t' || c == '\f') + break; + if (c == ':' || c == ')' || c == ']' || c == '"' || c == '/' + || c == '(' || c == '[') + { + ungetc (c, infile); + break; + } + *p++ = c; + c = getc (infile); + } + if (p == str) + fatal_with_file_and_line (infile, "missing name or number"); + if (c == '\n') + read_rtx_lineno++; + + *p = 0; + + if (md_constants) + { + /* Do constant expansion. */ + struct md_constant *def; + + p = str; + do + { + struct md_constant tmp_def; + + tmp_def.name = p; + def = htab_find (md_constants, &tmp_def); + if (def) + p = def->value; + } while (def); + if (p != str) + strcpy (str, p); + } +} + +/* Read a double-quoted string onto the obstack. Caller has scanned + the leading quote. */ +static char * +read_quoted_string (ob, infile) + struct obstack *ob; + FILE *infile; +{ + int c; + while (1) + { + c = getc (infile); /* Read the string */ + if (c == '\n') + read_rtx_lineno++; + else if (c == '\\') + { + c = getc (infile); /* Read the string */ + /* \; makes stuff for a C string constant containing + newline and tab. */ + if (c == ';') + { + obstack_grow (ob, "\\n\\t", 4); + continue; + } + else if (c == '\n') + /* \-newline: delete the backslash and update our idea of + the line number. */ + read_rtx_lineno++; + else if (c == '\\' || c == '"') + ; /* \", \\ are a literal quote and backslash. */ + else + /* Backslash escapes we do not recognize are left unmolested. + They may be handled by the C compiler (e.g. \n, \t) */ + { + ungetc (c, infile); /* put it back */ + c = '\\'; + } + } + else if (c == '"') + break; + + obstack_1grow (ob, c); + } + + obstack_1grow (ob, 0); + return obstack_finish (ob); +} + +/* Read a braced string (a la Tcl) onto the obstack. Caller has + scanned the leading brace. Note that unlike quoted strings, + the outermost braces _are_ included in the string constant. */ +static char * +read_braced_string (ob, infile) + struct obstack *ob; + FILE *infile; +{ + int c; + int brace_depth = 1; /* caller-processed */ + + obstack_1grow (ob, '{'); + while (brace_depth) + { + c = getc (infile); /* Read the string */ + if (c == '\n') + read_rtx_lineno++; + else if (c == '{') + brace_depth++; + else if (c == '}') + brace_depth--; + else if (c == '\\') + { + c = getc (infile); /* Read the string */ + /* \; makes stuff for a C string constant containing + newline and tab. */ + if (c == ';') + { + obstack_grow (ob, "\\n\\t", 4); + continue; + } + else if (c == '\n') + /* \-newline: delete the backslash and update our idea of + the line number. */ + read_rtx_lineno++; + else if (c == '\\') + ; /* \\ is a literal backslash */ + else + /* Backslash escapes we do not recognize are left unmolested. + They may be handled by the C compiler (e.g. \n, \t) */ + { + ungetc (c, infile); /* put it back */ + c = '\\'; + } + } + + obstack_1grow (ob, c); + } + + obstack_1grow (ob, 0); + return obstack_finish (ob); +} + +/* Read some kind of string constant. This is the high-level routine + used by read_rtx. It handles surrounding parentheses, leading star, + and dispatch to the appropriate string constant reader. */ + +static char * +read_string (ob, infile, star_if_braced) + struct obstack *ob; + FILE *infile; + int star_if_braced; +{ + char *stringbuf; + int saw_paren = 0; + int c; + + c = read_skip_spaces (infile); + if (c == '(') + { + saw_paren = 1; + c = read_skip_spaces (infile); + } + + if (c == '"') + stringbuf = read_quoted_string (ob, infile); + else if (c == '{') + { + if (star_if_braced) + obstack_1grow (ob, '*'); + stringbuf = read_braced_string (ob, infile); + } + else + fatal_with_file_and_line (infile, "expected `\"' or `{', found `%c'", c); + + if (saw_paren) + { + c = read_skip_spaces (infile); + if (c != ')') + fatal_expected_char (infile, ')', c); + } + + return stringbuf; +} + +/* Provide a version of a function to read a long long if the system does + not provide one. */ +#if HOST_BITS_PER_WIDE_INT > HOST_BITS_PER_LONG && !defined(HAVE_ATOLL) && !defined(HAVE_ATOQ) +HOST_WIDE_INT +atoll(p) + const char *p; +{ + int neg = 0; + HOST_WIDE_INT tmp_wide; + + while (ISSPACE(*p)) + p++; + if (*p == '-') + neg = 1, p++; + else if (*p == '+') + p++; + + tmp_wide = 0; + while (ISDIGIT(*p)) + { + HOST_WIDE_INT new_wide = tmp_wide*10 + (*p - '0'); + if (new_wide < tmp_wide) + { + /* Return INT_MAX equiv on overflow. */ + tmp_wide = (~(unsigned HOST_WIDE_INT)0) >> 1; + break; + } + tmp_wide = new_wide; + p++; + } + + if (neg) + tmp_wide = -tmp_wide; + return tmp_wide; +} +#endif + +/* Given a constant definition, return a hash code for its name. */ +static unsigned +def_hash (def) + const void *def; +{ + unsigned result, i; + const char *string = ((const struct md_constant *)def)->name; + + for (result = i = 0;*string++ != '\0'; i++) + result += ((unsigned char) *string << (i % CHAR_BIT)); + return result; +} + +/* Given two constant definitions, return true if they have the same name. */ +static int +def_name_eq_p (def1, def2) + const void *def1, *def2; +{ + return ! strcmp (((const struct md_constant *)def1)->name, + ((const struct md_constant *)def2)->name); +} + +/* INFILE is a FILE pointer to read text from. TMP_CHAR is a buffer suitable + to read a name or number into. Process a define_constants directive, + starting with the optional space after the "define_constants". */ +static void +read_constants (infile, tmp_char) + FILE *infile; + char *tmp_char; +{ + int c; + htab_t defs; + + c = read_skip_spaces (infile); + if (c != '[') + fatal_expected_char (infile, '[', c); + defs = md_constants; + if (! defs) + defs = htab_create (32, def_hash, def_name_eq_p, (htab_del) 0); + /* Disable constant expansion during definition processing. */ + md_constants = 0; + while ( (c = read_skip_spaces (infile)) != ']') + { + struct md_constant *def; + void **entry_ptr; + + if (c != '(') + fatal_expected_char (infile, '(', c); + def = xmalloc (sizeof (struct md_constant)); + def->name = tmp_char; + read_name (tmp_char, infile); + entry_ptr = htab_find_slot (defs, def, TRUE); + if (! *entry_ptr) + def->name = xstrdup (tmp_char); + c = read_skip_spaces (infile); + ungetc (c, infile); + read_name (tmp_char, infile); + if (! *entry_ptr) + { + def->value = xstrdup (tmp_char); + *entry_ptr = def; + } + else + { + def = *entry_ptr; + if (strcmp (def->value, tmp_char)) + fatal_with_file_and_line (infile, + "redefinition of %s, was %s, now %s", + def->name, def->value, tmp_char); + } + c = read_skip_spaces (infile); + if (c != ')') + fatal_expected_char (infile, ')', c); + } + md_constants = defs; + c = read_skip_spaces (infile); + if (c != ')') + fatal_expected_char (infile, ')', c); +} + +/* For every constant definition, call CALLBACK with two arguments: + a pointer a pointer to the constant definition and INFO. + Stops when CALLBACK returns zero. */ +void +traverse_md_constants (callback, info) + htab_trav callback; + void *info; +{ + if (md_constants) + htab_traverse (md_constants, callback, info); +} + +/* Read an rtx in printed representation from INFILE + and return an actual rtx in core constructed accordingly. + read_rtx is not used in the compiler proper, but rather in + the utilities gen*.c that construct C code from machine descriptions. */ + +rtx +read_rtx (infile) + FILE *infile; +{ + register int i, j; + RTX_CODE tmp_code; + register const char *format_ptr; + /* tmp_char is a buffer used for reading decimal integers + and names of rtx types and machine modes. + Therefore, 256 must be enough. */ + char tmp_char[256]; + rtx return_rtx; + register int c; + int tmp_int; + HOST_WIDE_INT tmp_wide; + + /* Obstack used for allocating RTL objects. */ + static struct obstack rtl_obstack; + static int initialized; + + /* Linked list structure for making RTXs: */ + struct rtx_list + { + struct rtx_list *next; + rtx value; /* Value of this node. */ + }; + + if (!initialized) { + obstack_init (&rtl_obstack); + initialized = 1; + } + +again: + c = read_skip_spaces (infile); /* Should be open paren. */ + if (c != '(') + fatal_expected_char (infile, '(', c); + + read_name (tmp_char, infile); + + tmp_code = UNKNOWN; + + if (! strcmp (tmp_char, "define_constants")) + { + read_constants (infile, tmp_char); + goto again; + } + for (i = 0; i < NUM_RTX_CODE; i++) + if (! strcmp (tmp_char, GET_RTX_NAME (i))) + { + tmp_code = (RTX_CODE) i; /* get value for name */ + break; + } + + if (tmp_code == UNKNOWN) + fatal_with_file_and_line (infile, "unknown rtx code `%s'", tmp_char); + + /* (NIL) stands for an expression that isn't there. */ + if (tmp_code == NIL) + { + /* Discard the closeparen. */ + while ((c = getc (infile)) && c != ')') + ; + + return 0; + } + + /* If we end up with an insn expression then we free this space below. */ + return_rtx = rtx_alloc (tmp_code); + format_ptr = GET_RTX_FORMAT (GET_CODE (return_rtx)); + + /* If what follows is `: mode ', read it and + store the mode in the rtx. */ + + i = read_skip_spaces (infile); + if (i == ':') + { + read_name (tmp_char, infile); + for (j = 0; j < NUM_MACHINE_MODES; j++) + if (! strcmp (GET_MODE_NAME (j), tmp_char)) + break; + + if (j == MAX_MACHINE_MODE) + fatal_with_file_and_line (infile, "unknown mode `%s'", tmp_char); + + PUT_MODE (return_rtx, (enum machine_mode) j); + } + else + ungetc (i, infile); + + for (i = 0; i < GET_RTX_LENGTH (GET_CODE (return_rtx)); i++) + switch (*format_ptr++) + { + /* 0 means a field for internal use only. + Don't expect it to be present in the input. */ + case '0': + break; + + case 'e': + case 'u': + XEXP (return_rtx, i) = read_rtx (infile); + break; + + case 'V': + /* 'V' is an optional vector: if a closeparen follows, + just store NULL for this element. */ + c = read_skip_spaces (infile); + ungetc (c, infile); + if (c == ')') + { + XVEC (return_rtx, i) = 0; + break; + } + /* Now process the vector. */ + + case 'E': + { + /* Obstack to store scratch vector in. */ + struct obstack vector_stack; + int list_counter = 0; + rtvec return_vec = NULL_RTVEC; + + c = read_skip_spaces (infile); + if (c != '[') + fatal_expected_char (infile, '[', c); + + /* add expressions to a list, while keeping a count */ + obstack_init (&vector_stack); + while ((c = read_skip_spaces (infile)) && c != ']') + { + ungetc (c, infile); + list_counter++; + obstack_ptr_grow (&vector_stack, (PTR) read_rtx (infile)); + } + if (list_counter > 0) + { + return_vec = rtvec_alloc (list_counter); + memcpy (&return_vec->elem[0], obstack_finish (&vector_stack), + list_counter * sizeof (rtx)); + } + XVEC (return_rtx, i) = return_vec; + obstack_free (&vector_stack, NULL); + /* close bracket gotten */ + } + break; + + case 'S': + /* 'S' is an optional string: if a closeparen follows, + just store NULL for this element. */ + c = read_skip_spaces (infile); + ungetc (c, infile); + if (c == ')') + { + XSTR (return_rtx, i) = 0; + break; + } + + case 's': + { + char *stringbuf; + + /* The output template slot of a DEFINE_INSN, + DEFINE_INSN_AND_SPLIT, or DEFINE_PEEPHOLE automatically + gets a star inserted as its first character, if it is + written with a brace block instead of a string constant. */ + int star_if_braced = + ((i == 3 && (GET_CODE (return_rtx) == DEFINE_INSN + || GET_CODE (return_rtx) == DEFINE_INSN_AND_SPLIT)) + || (i == 2 && GET_CODE (return_rtx) == DEFINE_PEEPHOLE)); + + stringbuf = read_string (&rtl_obstack, infile, star_if_braced); + + /* For insn patterns, we want to provide a default name + based on the file and line, like "*foo.md:12", if the + given name is blank. These are only for define_insn and + define_insn_and_split, to aid debugging. */ + if (*stringbuf == '\0' + && i == 0 + && (GET_CODE (return_rtx) == DEFINE_INSN + || GET_CODE (return_rtx) == DEFINE_INSN_AND_SPLIT)) + { + char line_name[20]; + const char *fn = (read_rtx_filename ? read_rtx_filename : "rtx"); + const char *slash; + for (slash = fn; *slash; slash ++) + if (*slash == '/' || *slash == '\\' || *slash == ':') + fn = slash + 1; + obstack_1grow (&rtl_obstack, '*'); + obstack_grow (&rtl_obstack, fn, strlen (fn)); + sprintf (line_name, ":%d", read_rtx_lineno); + obstack_grow (&rtl_obstack, line_name, strlen (line_name)+1); + stringbuf = (char *) obstack_finish (&rtl_obstack); + } + + XSTR (return_rtx, i) = stringbuf; + } + break; + + case 'w': + read_name (tmp_char, infile); +#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT + tmp_wide = atoi (tmp_char); +#else +#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG + tmp_wide = atol (tmp_char); +#else + /* Prefer atoll over atoq, since the former is in the ISO C99 standard. + But prefer not to use our hand-rolled function above either. */ +#if defined(HAVE_ATOLL) || !defined(HAVE_ATOQ) + tmp_wide = atoll (tmp_char); +#else + tmp_wide = atoq (tmp_char); +#endif +#endif +#endif + XWINT (return_rtx, i) = tmp_wide; + break; + + case 'i': + case 'n': + read_name (tmp_char, infile); + tmp_int = atoi (tmp_char); + XINT (return_rtx, i) = tmp_int; + break; + + default: + fprintf (stderr, + "switch format wrong in rtl.read_rtx(). format was: %c.\n", + format_ptr[-1]); + fprintf (stderr, "\tfile position: %ld\n", ftell (infile)); + abort (); + } + + c = read_skip_spaces (infile); + if (c != ')') + fatal_expected_char (infile, ')', c); + + return return_rtx; +} diff --git a/gcc/rtl.c b/gcc/rtl.c index 0fad1369782..0c84d752e3e 100644 --- a/gcc/rtl.c +++ b/gcc/rtl.c @@ -1,5 +1,5 @@ -/* Allocate and read RTL for GNU C Compiler. - Copyright (C) 1987, 1988, 1991, 1994, 1997, 1998, 1999, 2000 +/* RTL utility routines. + Copyright (C) 1987, 1988, 1991, 1994, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,19 +19,11 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #include "config.h" #include "system.h" #include "rtl.h" #include "real.h" -#include "bitmap.h" #include "ggc.h" -#include "obstack.h" -#include "toplev.h" -#include "hashtab.h" - -#define obstack_chunk_alloc xmalloc -#define obstack_chunk_free free /* Calculate the format for CONST_DOUBLE. This depends on the relative @@ -292,17 +284,6 @@ const char * const reg_note_name[] = "REG_NON_LOCAL_GOTO" }; -static htab_t md_constants; - -static void fatal_with_file_and_line PARAMS ((FILE *, const char *, ...)) - ATTRIBUTE_PRINTF_2 ATTRIBUTE_NORETURN; -static void fatal_expected_char PARAMS ((FILE *, int, int)) ATTRIBUTE_NORETURN; -static void read_name PARAMS ((char *, FILE *)); -static char *read_string PARAMS ((struct obstack *, FILE *)); -static unsigned def_hash PARAMS ((const void *)); -static int def_name_eq_p PARAMS ((const void *, const void *)); -static void read_constants PARAMS ((FILE *infile, char *tmp_char)); - /* Allocate an rtx vector of N elements. Store the length, and initialize all elements to zero. */ @@ -690,599 +671,6 @@ rtx_equal_p (x, y) return 1; } -/* Subroutines of read_rtx. */ - -/* The current line number for the file. */ -int read_rtx_lineno = 1; - -/* The filename for aborting with file and line. */ -const char *read_rtx_filename = ""; - -static void -fatal_with_file_and_line VPARAMS ((FILE *infile, const char *msg, ...)) -{ -#ifndef ANSI_PROTOTYPES - FILE *infile; - const char *msg; -#endif - va_list ap; - char context[64]; - size_t i; - int c; - - VA_START (ap, msg); - -#ifndef ANSI_PROTOTYPES - infile = va_arg (ap, FILE *); - msg = va_arg (ap, const char *); -#endif - - fprintf (stderr, "%s:%d: ", read_rtx_filename, read_rtx_lineno); - vfprintf (stderr, msg, ap); - putc ('\n', stderr); - - /* Gather some following context. */ - for (i = 0; i < sizeof(context)-1; ++i) - { - c = getc (infile); - if (c == EOF) - break; - if (c == '\r' || c == '\n') - break; - context[i] = c; - } - context[i] = '\0'; - - fprintf (stderr, "%s:%d: following context is `%s'\n", - read_rtx_filename, read_rtx_lineno, context); - - va_end (ap); - exit (1); -} - -/* Dump code after printing a message. Used when read_rtx finds - invalid data. */ - -static void -fatal_expected_char (infile, expected_c, actual_c) - FILE *infile; - int expected_c, actual_c; -{ - fatal_with_file_and_line (infile, "expected character `%c', found `%c'", - expected_c, actual_c); -} - -/* Read chars from INFILE until a non-whitespace char - and return that. Comments, both Lisp style and C style, - are treated as whitespace. - Tools such as genflags use this function. */ - -int -read_skip_spaces (infile) - FILE *infile; -{ - register int c; - while (1) - { - c = getc (infile); - switch (c) - { - case '\n': - read_rtx_lineno++; - break; - - case ' ': case '\t': case '\f': case '\r': - break; - - case ';': - do - c = getc (infile); - while (c != '\n' && c != EOF); - read_rtx_lineno++; - break; - - case '/': - { - register int prevc; - c = getc (infile); - if (c != '*') - fatal_expected_char (infile, '*', c); - - prevc = 0; - while ((c = getc (infile)) && c != EOF) - { - if (c == '\n') - read_rtx_lineno++; - else if (prevc == '*' && c == '/') - break; - prevc = c; - } - } - break; - - default: - return c; - } - } -} - -/* Read an rtx code name into the buffer STR[]. - It is terminated by any of the punctuation chars of rtx printed syntax. */ - -static void -read_name (str, infile) - char *str; - FILE *infile; -{ - register char *p; - register int c; - - c = read_skip_spaces(infile); - - p = str; - while (1) - { - if (c == ' ' || c == '\n' || c == '\t' || c == '\f') - break; - if (c == ':' || c == ')' || c == ']' || c == '"' || c == '/' - || c == '(' || c == '[') - { - ungetc (c, infile); - break; - } - *p++ = c; - c = getc (infile); - } - if (p == str) - fatal_with_file_and_line (infile, "missing name or number"); - if (c == '\n') - read_rtx_lineno++; - - *p = 0; - - if (md_constants) - { - /* Do constant expansion. */ - struct md_constant *def; - - p = str; - do - { - struct md_constant tmp_def; - - tmp_def.name = p; - def = htab_find (md_constants, &tmp_def); - if (def) - p = def->value; - } while (def); - if (p != str) - strcpy (str, p); - } -} - -/* Read a double-quoted string onto the obstack. */ - -static char * -read_string (ob, infile) - struct obstack *ob; - FILE *infile; -{ - char *stringbuf; - int saw_paren = 0; - int c; - - c = read_skip_spaces (infile); - if (c == '(') - { - saw_paren = 1; - c = read_skip_spaces (infile); - } - if (c != '"') - fatal_expected_char (infile, '"', c); - - while (1) - { - c = getc (infile); /* Read the string */ - if (c == '\n') - read_rtx_lineno++; - else if (c == '\\') - { - c = getc (infile); /* Read the string */ - /* \; makes stuff for a C string constant containing - newline and tab. */ - if (c == ';') - { - obstack_grow (ob, "\\n\\t", 4); - continue; - } - if (c == '\n') - read_rtx_lineno++; - } - else if (c == '"') - break; - - obstack_1grow (ob, c); - } - - obstack_1grow (ob, 0); - stringbuf = (char *) obstack_finish (ob); - - if (saw_paren) - { - c = read_skip_spaces (infile); - if (c != ')') - fatal_expected_char (infile, ')', c); - } - - return stringbuf; -} - -/* Provide a version of a function to read a long long if the system does - not provide one. */ -#if HOST_BITS_PER_WIDE_INT > HOST_BITS_PER_LONG && !defined(HAVE_ATOLL) && !defined(HAVE_ATOQ) -HOST_WIDE_INT -atoll(p) - const char *p; -{ - int neg = 0; - HOST_WIDE_INT tmp_wide; - - while (ISSPACE(*p)) - p++; - if (*p == '-') - neg = 1, p++; - else if (*p == '+') - p++; - - tmp_wide = 0; - while (ISDIGIT(*p)) - { - HOST_WIDE_INT new_wide = tmp_wide*10 + (*p - '0'); - if (new_wide < tmp_wide) - { - /* Return INT_MAX equiv on overflow. */ - tmp_wide = (~(unsigned HOST_WIDE_INT)0) >> 1; - break; - } - tmp_wide = new_wide; - p++; - } - - if (neg) - tmp_wide = -tmp_wide; - return tmp_wide; -} -#endif - -/* Given a constant definition, return a hash code for its name. */ -static unsigned -def_hash (def) - const void *def; -{ - unsigned result, i; - const char *string = ((const struct md_constant *)def)->name; - - for (result = i = 0;*string++ != '\0'; i++) - result += ((unsigned char) *string << (i % CHAR_BIT)); - return result; -} - -/* Given two constant definitions, return true if they have the same name. */ -static int -def_name_eq_p (def1, def2) - const void *def1, *def2; -{ - return ! strcmp (((const struct md_constant *)def1)->name, - ((const struct md_constant *)def2)->name); -} - -/* INFILE is a FILE pointer to read text from. TMP_CHAR is a buffer suitable - to read a name or number into. Process a define_constants directive, - starting with the optional space after the "define_constants". */ -static void -read_constants (infile, tmp_char) - FILE *infile; - char *tmp_char; -{ - int c; - htab_t defs; - - c = read_skip_spaces (infile); - if (c != '[') - fatal_expected_char (infile, '[', c); - defs = md_constants; - if (! defs) - defs = htab_create (32, def_hash, def_name_eq_p, (htab_del) 0); - /* Disable constant expansion during definition processing. */ - md_constants = 0; - while ( (c = read_skip_spaces (infile)) != ']') - { - struct md_constant *def; - void **entry_ptr; - - if (c != '(') - fatal_expected_char (infile, '(', c); - def = xmalloc (sizeof (struct md_constant)); - def->name = tmp_char; - read_name (tmp_char, infile); - entry_ptr = htab_find_slot (defs, def, TRUE); - if (! *entry_ptr) - def->name = xstrdup (tmp_char); - c = read_skip_spaces (infile); - ungetc (c, infile); - read_name (tmp_char, infile); - if (! *entry_ptr) - { - def->value = xstrdup (tmp_char); - *entry_ptr = def; - } - else - { - def = *entry_ptr; - if (strcmp (def->value, tmp_char)) - fatal_with_file_and_line (infile, - "redefinition of %s, was %s, now %s", - def->name, def->value, tmp_char); - } - c = read_skip_spaces (infile); - if (c != ')') - fatal_expected_char (infile, ')', c); - } - md_constants = defs; - c = read_skip_spaces (infile); - if (c != ')') - fatal_expected_char (infile, ')', c); -} - -/* For every constant definition, call CALLBACK with two arguments: - a pointer a pointer to the constant definition and INFO. - Stops when CALLBACK returns zero. */ -void -traverse_md_constants (callback, info) - htab_trav callback; - void *info; -{ - if (md_constants) - htab_traverse (md_constants, callback, info); -} - -/* Read an rtx in printed representation from INFILE - and return an actual rtx in core constructed accordingly. - read_rtx is not used in the compiler proper, but rather in - the utilities gen*.c that construct C code from machine descriptions. */ - -rtx -read_rtx (infile) - FILE *infile; -{ - register int i, j; - RTX_CODE tmp_code; - register const char *format_ptr; - /* tmp_char is a buffer used for reading decimal integers - and names of rtx types and machine modes. - Therefore, 256 must be enough. */ - char tmp_char[256]; - rtx return_rtx; - register int c; - int tmp_int; - HOST_WIDE_INT tmp_wide; - - /* Obstack used for allocating RTL objects. */ - static struct obstack rtl_obstack; - static int initialized; - - /* Linked list structure for making RTXs: */ - struct rtx_list - { - struct rtx_list *next; - rtx value; /* Value of this node. */ - }; - - if (!initialized) { - _obstack_begin (&rtl_obstack,0, 0, - (void *(*) PARAMS ((long))) xmalloc, - (void (*) PARAMS ((void *))) free); - initialized = 1; - } - -again: - c = read_skip_spaces (infile); /* Should be open paren. */ - if (c != '(') - fatal_expected_char (infile, '(', c); - - read_name (tmp_char, infile); - - tmp_code = UNKNOWN; - - if (! strcmp (tmp_char, "define_constants")) - { - read_constants (infile, tmp_char); - goto again; - } - for (i = 0; i < NUM_RTX_CODE; i++) - if (! strcmp (tmp_char, GET_RTX_NAME (i))) - { - tmp_code = (RTX_CODE) i; /* get value for name */ - break; - } - - if (tmp_code == UNKNOWN) - fatal_with_file_and_line (infile, "unknown rtx code `%s'", tmp_char); - - /* (NIL) stands for an expression that isn't there. */ - if (tmp_code == NIL) - { - /* Discard the closeparen. */ - while ((c = getc (infile)) && c != ')') - ; - - return 0; - } - - /* If we end up with an insn expression then we free this space below. */ - return_rtx = rtx_alloc (tmp_code); - format_ptr = GET_RTX_FORMAT (GET_CODE (return_rtx)); - - /* If what follows is `: mode ', read it and - store the mode in the rtx. */ - - i = read_skip_spaces (infile); - if (i == ':') - { - read_name (tmp_char, infile); - for (j = 0; j < NUM_MACHINE_MODES; j++) - if (! strcmp (GET_MODE_NAME (j), tmp_char)) - break; - - if (j == MAX_MACHINE_MODE) - fatal_with_file_and_line (infile, "unknown mode `%s'", tmp_char); - - PUT_MODE (return_rtx, (enum machine_mode) j); - } - else - ungetc (i, infile); - - for (i = 0; i < GET_RTX_LENGTH (GET_CODE (return_rtx)); i++) - switch (*format_ptr++) - { - /* 0 means a field for internal use only. - Don't expect it to be present in the input. */ - case '0': - break; - - case 'e': - case 'u': - XEXP (return_rtx, i) = read_rtx (infile); - break; - - case 'V': - /* 'V' is an optional vector: if a closeparen follows, - just store NULL for this element. */ - c = read_skip_spaces (infile); - ungetc (c, infile); - if (c == ')') - { - XVEC (return_rtx, i) = 0; - break; - } - /* Now process the vector. */ - - case 'E': - { - /* Obstack to store scratch vector in. */ - struct obstack vector_stack; - int list_counter = 0; - rtvec return_vec = NULL_RTVEC; - - c = read_skip_spaces (infile); - if (c != '[') - fatal_expected_char (infile, '[', c); - - /* add expressions to a list, while keeping a count */ - obstack_init (&vector_stack); - while ((c = read_skip_spaces (infile)) && c != ']') - { - ungetc (c, infile); - list_counter++; - obstack_ptr_grow (&vector_stack, (PTR) read_rtx (infile)); - } - if (list_counter > 0) - { - return_vec = rtvec_alloc (list_counter); - memcpy (&return_vec->elem[0], obstack_finish (&vector_stack), - list_counter * sizeof (rtx)); - } - XVEC (return_rtx, i) = return_vec; - obstack_free (&vector_stack, NULL); - /* close bracket gotten */ - } - break; - - case 'S': - /* 'S' is an optional string: if a closeparen follows, - just store NULL for this element. */ - c = read_skip_spaces (infile); - ungetc (c, infile); - if (c == ')') - { - XSTR (return_rtx, i) = 0; - break; - } - - case 's': - { - char *stringbuf; - - stringbuf = read_string (&rtl_obstack, infile); - - /* For insn patterns, we want to provide a default name - based on the file and line, like "*foo.md:12", if the - given name is blank. These are only for define_insn and - define_insn_and_split, to aid debugging. */ - if (*stringbuf == '\0' - && i == 0 - && (GET_CODE (return_rtx) == DEFINE_INSN - || GET_CODE (return_rtx) == DEFINE_INSN_AND_SPLIT)) - { - char line_name[20]; - const char *fn = (read_rtx_filename ? read_rtx_filename : "rtx"); - const char *slash; - for (slash = fn; *slash; slash ++) - if (*slash == '/' || *slash == '\\' || *slash == ':') - fn = slash + 1; - obstack_1grow (&rtl_obstack, '*'); - obstack_grow (&rtl_obstack, fn, strlen (fn)); - sprintf (line_name, ":%d", read_rtx_lineno); - obstack_grow (&rtl_obstack, line_name, strlen (line_name)+1); - stringbuf = (char *) obstack_finish (&rtl_obstack); - } - - XSTR (return_rtx, i) = stringbuf; - } - break; - - case 'w': - read_name (tmp_char, infile); -#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT - tmp_wide = atoi (tmp_char); -#else -#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG - tmp_wide = atol (tmp_char); -#else - /* Prefer atoll over atoq, since the former is in the ISO C99 standard. - But prefer not to use our hand-rolled function above either. */ -#if defined(HAVE_ATOLL) || !defined(HAVE_ATOQ) - tmp_wide = atoll (tmp_char); -#else - tmp_wide = atoq (tmp_char); -#endif -#endif -#endif - XWINT (return_rtx, i) = tmp_wide; - break; - - case 'i': - case 'n': - read_name (tmp_char, infile); - tmp_int = atoi (tmp_char); - XINT (return_rtx, i) = tmp_int; - break; - - default: - fprintf (stderr, - "switch format wrong in rtl.read_rtx(). format was: %c.\n", - format_ptr[-1]); - fprintf (stderr, "\tfile position: %ld\n", ftell (infile)); - abort (); - } - - c = read_skip_spaces (infile); - if (c != ')') - fatal_expected_char (infile, ')', c); - - return return_rtx; -} - #if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007) void rtl_check_failed_bounds (r, n, file, line, func)