[PATCH][AARCH64]Add csneg3_uxtw_insn pattern

gcc/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/aarch64/aarch64.md (csneg3_uxtw_insn): New pattern.

gcc/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gcc.target/aarch64/csneg-1.c: Update test.

From-SVN: r228387
This commit is contained in:
Renlin Li 2015-10-02 12:52:36 +00:00 committed by Renlin Li
parent b03e67ad92
commit 0f6ca79c15
4 changed files with 32 additions and 0 deletions

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@ -3,6 +3,10 @@
* config/sh/sh.md: Add new unnamed split pattern to handle movt-movt
sequences.
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.md (csneg3_insn_uxtw): New pattern.
2015-10-02 Renlin Li <renlin.li@arm.com>
PR target/66776

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@ -3144,6 +3144,18 @@
[(set_attr "type" "csel")]
)
(define_insn "csneg3_uxtw_insn"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(if_then_else:SI
(match_operand 1 "aarch64_comparison_operation" "")
(neg:SI (match_operand:SI 2 "register_operand" "r"))
(match_operand:SI 3 "aarch64_reg_or_zero" "rZ"))))]
""
"csneg\\t%w0, %w3, %w2, %M1"
[(set_attr "type" "csel")]
)
(define_insn "csneg3<mode>_insn"
[(set (match_operand:GPI 0 "register_operand" "=r")
(if_then_else:GPI

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@ -1,3 +1,7 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
* gcc.target/aarch64/csneg-1.c: Update.
2015-10-02 Renlin Li <renlin.li@arm.com>
PR target/66776

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@ -56,3 +56,15 @@ int test_csneg_cmp(int x)
x = -x;
return x;
}
unsigned long long
test_csneg_uxtw (unsigned int a,
unsigned int b,
unsigned int c)
{
/* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */
/* { dg-final { scan-assembler-not "uxtw\tw\[0-9\]*.*" } } */
unsigned int val;
val = a ? b: -c;
return val;
}