i386: Increase Skylake SImode pseudo register store cost
On Skylake, SImode store cost isn't less than half cost of 128-bit vector store. This patch increases Skylake SImode pseudo register store cost to make it the same as QImode and HImode. gcc/ PR target/91446 * config/i386/x86-tune-costs.h (skylake_cost): Increase SImode pseudo register store cost from 3 to 6 to make it the same as QImode and HImode. gcc/testsuite/ PR target/91446 * gcc.target/i386/pr91446.c: New test. From-SVN: r275905
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2019-09-18 H.J. Lu <hongjiu.lu@intel.com>
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PR target/91446
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* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
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pseudo register store cost from 3 to 6 to make it the same as
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QImode and HImode.
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2019-09-18 Wilco Dijkstra <wdijkstr@arm.com>
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* config/arm/arm.md (maddsidi4): Remove expander.
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@ -1638,7 +1638,7 @@ struct processor_costs skylake_cost = {
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{4, 4, 4}, /* cost of loading integer registers
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in QImode, HImode and SImode.
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Relative to reg-reg move (2). */
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{6, 6, 3}, /* cost of storing integer registers */
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{6, 6, 6}, /* cost of storing integer registers */
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{6, 6, 6, 10, 20}, /* cost of loading SSE register
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in 32bit, 64bit, 128bit, 256bit and 512bit */
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{8, 8, 8, 12, 24}, /* cost of storing SSE register
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2019-09-18 H.J. Lu <hongjiu.lu@intel.com>
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PR target/91446
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* gcc.target/i386/pr91446.c: New test.
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2019-09-18 Eric Botcazou <ebotcazou@adacore.com>
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* gnat.dg/warn31.adb, gnat.dg/warn31.ads: New testcase.
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-options "-O2 -march=skylake -ftree-slp-vectorize -mtune-ctrl=^sse_typeless_stores" } */
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typedef struct
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{
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unsigned long long width, height;
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long long x, y;
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} info;
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extern void bar (info *);
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void
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foo (unsigned long long width, unsigned long long height,
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long long x, long long y)
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{
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info t;
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t.width = width;
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t.height = height;
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t.x = x;
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t.y = y;
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bar (&t);
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}
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/* { dg-final { scan-assembler-times "vmovdqa\[^\n\r\]*xmm\[0-9\]" 2 } } */
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