i386: Increase Skylake SImode pseudo register store cost

On Skylake, SImode store cost isn't less than half cost of 128-bit vector
store.  This patch increases Skylake SImode pseudo register store cost to
make it the same as QImode and HImode.

gcc/

	PR target/91446
	* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
	pseudo register store cost from 3 to 6 to make it the same as
	QImode and HImode.

gcc/testsuite/

	PR target/91446
	* gcc.target/i386/pr91446.c: New test.

From-SVN: r275905
This commit is contained in:
H.J. Lu 2019-09-18 19:49:19 +00:00 committed by H.J. Lu
parent 22a8ab772c
commit 101a0841b6
4 changed files with 37 additions and 1 deletions

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@ -1,3 +1,10 @@
2019-09-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/91446
* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
pseudo register store cost from 3 to 6 to make it the same as
QImode and HImode.
2019-09-18 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.md (maddsidi4): Remove expander.

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@ -1638,7 +1638,7 @@ struct processor_costs skylake_cost = {
{4, 4, 4}, /* cost of loading integer registers
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
{6, 6, 3}, /* cost of storing integer registers */
{6, 6, 6}, /* cost of storing integer registers */
{6, 6, 6, 10, 20}, /* cost of loading SSE register
in 32bit, 64bit, 128bit, 256bit and 512bit */
{8, 8, 8, 12, 24}, /* cost of storing SSE register

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@ -1,3 +1,8 @@
2019-09-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/91446
* gcc.target/i386/pr91446.c: New test.
2019-09-18 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/warn31.adb, gnat.dg/warn31.ads: New testcase.

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@ -0,0 +1,24 @@
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-O2 -march=skylake -ftree-slp-vectorize -mtune-ctrl=^sse_typeless_stores" } */
typedef struct
{
unsigned long long width, height;
long long x, y;
} info;
extern void bar (info *);
void
foo (unsigned long long width, unsigned long long height,
long long x, long long y)
{
info t;
t.width = width;
t.height = height;
t.x = x;
t.y = y;
bar (&t);
}
/* { dg-final { scan-assembler-times "vmovdqa\[^\n\r\]*xmm\[0-9\]" 2 } } */