OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

re PR target/50603 ([x32] Unnecessary lea) 

PR target/50603
	* config/i386/i386.c (ix86_fixup_binary_operands): Force src2 of
	integer PLUS RTX to a register to improve address combine.

testsuite/ChangeLog:

	PR target/50603
	* gcc.target/i386/pr50603.c: New test.

From-SVN: r179646
This commit is contained in:
Uros Bizjak 2011-10-07 08:43:17 +02:00
parent e7912e12dd
commit 10c1a3e722
4 changed files with 39 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2011-10-07 Uros Bizjak <ubizjak@gmail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/50603
* config/i386/i386.c (ix86_fixup_binary_operands): Force src2 of
integer PLUS RTX to a register to improve address combine.
2011-10-06 Richard Henderson <rth@redhat.com>
* combine-stack-adjust.c (maybe_move_args_size_note): Add after
@ -31,9 +38,8 @@
2011-10-06 Bernd Schmidt <bernds@codesourcery.com>
* function.c (thread_prologue_and_epilogue_insns): Emit split
prologue on the orig_entry_edge. Don't account for it in
prologue_clobbered.
* function.c (thread_prologue_and_epilogue_insns): Emit split prologue
on the orig_entry_edge. Don't account for it in prologue_clobbered.
2011-10-06 Jakub Jelinek <jakub@redhat.com>

6
gcc/config/i386/i386.c
View File

@ -15798,6 +15798,12 @@ ix86_fixup_binary_operands (enum rtx_code code, enum machine_mode mode,
if (MEM_P (src1) && !rtx_equal_p (dst, src1))
src1 = force_reg (mode, src1);
/* Improve address combine. */
if (code == PLUS
&& GET_MODE_CLASS (mode) == MODE_INT
&& MEM_P (src2))
src2 = force_reg (mode, src2);
operands[1] = src1;
operands[2] = src2;
return dst;

23
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2011-10-07 Uros Bizjak <ubizjak@gmail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/50603
* gcc.target/i386/pr50603.c: New test.
2011-10-06 Jason Merrill <jason@redhat.com>
PR c++/39164
@ -144,8 +150,7 @@
2011-10-04 Artem Shinkarov <artyom.shinkaroff@gmail.com>
* gcc.c-torture/execute/vector-compare-1.c: Fix trailing white
spaces.
* gcc.c-torture/execute/vector-compare-1.c: Fix trailing white spaces.
(main): Use __typeof to get result type of comparison.
2011-10-04 Ira Rosen <ira.rosen@linaro.org>
@ -298,8 +303,8 @@
PR testsuite/50485
* gcc.target/i386/sse4_1-blendps.c: Include <stdlib.h>.
(TEST): Initialize src3 with random floats.
* gcc.target/i386/sse4_1-blendps-2.c (sse4_1_test): Remove field i from
union src3. Initialize src3 with random floats.
* gcc.target/i386/sse4_1-blendps-2.c (sse4_1_test): Remove field i
from union src3. Initialize src3 with random floats.
2011-09-27 Oleg Endo <oleg.endo@t-online.de>
@ -659,8 +664,7 @@
2011-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR testsuite/50469
* gfortran.dg/storage_size_2.f08: Replace "must be be" with
"must be".
* gfortran.dg/storage_size_2.f08: Replace "must be be" with "must be".
2011-09-20 Jason Merrill <jason@redhat.com>
@ -1046,8 +1050,7 @@
gcc.dg/vect/vect-54.c, gcc.dg/vect/vect-46.c, gcc.dg/vect/vect-48.c,
gcc.dg/vect/vect-96.c, gcc.dg/vect/vect-multitypes-3.c,
gcc.dg/vect/vect-40.c: Likewise.
* gcc.dg/vect/vect-outer-5.c: Remove quad-vectors option as
redundant.
* gcc.dg/vect/vect-outer-5.c: Remove quad-vectors option as redundant.
* gcc.dg/vect/vect-109.c, gcc.dg/vect/vect-peel-1.c,
gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/slp-25.c,
gcc.dg/vect/vect-multitypes-1.c, gcc.dg/vect/slp-3.c,
@ -1104,8 +1107,8 @@
2011-09-05 Georg-Johann Lay <avr@gjlay.de>
* gcc.dg/ipa/ipcp-3.c (mark_cell): Use mask 1 << 14 instead of 1
<< 18 to avoid warning on int=16 platforms..
* gcc.dg/ipa/ipcp-3.c (mark_cell): Use mask 1 << 14 instead of 1 << 18
to avoid warning on int=16 platforms..
2011-09-05 Jakub Jelinek <jakub@redhat.com>

11
gcc/testsuite/gcc.target/i386/pr50603.c Normal file
View File

@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-options "-O2" } */
extern int *foo;
int
bar (int x)
{
return foo[x];
}
/* { dg-final { scan-assembler-not "lea\[lq\]" } } */