sh.h (OVERRIDE_OPTIONS): Set default values for align_loops and align_jumps if not set.
* sh.h (OVERRIDE_OPTIONS): Set default values for align_loops and align_jumps if not set. Force align_jumps to be at least 2. When relaxing, force align_functions to be at least the maximum of align_loops, align_jumps and 4. * sh.c (find_barrier, barrier_align): Honour align_jumps_log. (sh_loop_align): Honour align_loops_log. * sh.md (length attribute): Use prev_nonnote_insn instead of PREV_INSN to check for indirect_jump_scratch. (indirect_jump_scratch): Add second set. * sh.c (output_far_jump): Use prev_nonnote_insn instead of PREV_INSN when looking for indirect_jump_scratch. Extract scratch register taking new structure of indirect_jump_scratch into account. (gen_block_redirect): Set INSN_SCOPE for indirect_jump_scratch. From-SVN: r63728
This commit is contained in:
J"orn Rennecke
Joern Rennecke
parent
ebcc6a7ec0
commit
10f4f63540
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@ -1,3 +1,22 @@
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Mon Mar 3 19:47:26 2003 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.h (OVERRIDE_OPTIONS): Set default values for align_loops
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and align_jumps if not set.
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Force align_jumps to be at least 2.
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When relaxing, force align_functions to be at least the maximum of
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align_loops, align_jumps and 4.
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* sh.c (find_barrier, barrier_align): Honour align_jumps_log.
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(sh_loop_align): Honour align_loops_log.
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* sh.md (length attribute): Use prev_nonnote_insn instead of PREV_INSN
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to check for indirect_jump_scratch.
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(indirect_jump_scratch): Add second set.
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* sh.c (output_far_jump): Use prev_nonnote_insn instead of PREV_INSN
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when looking for indirect_jump_scratch.
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Extract scratch register taking new structure of indirect_jump_scratch
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into account.
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(gen_block_redirect): Set INSN_SCOPE for indirect_jump_scratch.
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Mon Mar 3 19:07:21 CET 2003 Jan Hubicka <jh@suse.cz>
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* calls.c (rtx_for_function_call): Take the address as an argument
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@ -1048,6 +1048,7 @@ output_far_jump (insn, op)
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const char *jump;
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int far;
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int offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
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rtx prev;
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this.lab = gen_label_rtx ();
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@ -1072,10 +1073,10 @@ output_far_jump (insn, op)
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jump = "mov.l %O0,%1; jmp @%1";
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}
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/* If we have a scratch register available, use it. */
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if (GET_CODE (PREV_INSN (insn)) == INSN
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&& INSN_CODE (PREV_INSN (insn)) == CODE_FOR_indirect_jump_scratch)
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if (GET_CODE ((prev = prev_nonnote_insn (insn))) == INSN
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&& INSN_CODE (prev) == CODE_FOR_indirect_jump_scratch)
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{
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this.reg = SET_DEST (PATTERN (PREV_INSN (insn)));
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this.reg = SET_DEST (XVECEXP (PATTERN (prev), 0, 0));
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if (REGNO (this.reg) == R0_REG && flag_pic && ! TARGET_SH2)
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jump = "mov.l r1,@-r15; mova %O0,r0; mov.l @r0,r1; add r1,r0; mov.l @r15+,r1; jmp @%1";
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output_asm_insn (jump, &this.lab);
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@ -3016,7 +3017,7 @@ find_barrier (num_mova, mova, from)
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{
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if (num_mova)
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num_mova--;
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if (barrier_align (next_real_insn (from)) == CACHE_LOG)
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if (barrier_align (next_real_insn (from)) == align_jumps_log)
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{
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/* We have just passed the barrier in front of the
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ADDR_DIFF_VEC, which is stored in found_barrier. Since
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@ -3454,6 +3455,13 @@ gen_block_redirect (jump, addr, need_block)
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rtx insn = emit_insn_before (gen_indirect_jump_scratch
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(reg, GEN_INT (INSN_UID (JUMP_LABEL (jump))))
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, jump);
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/* ??? We would like this to have the scope of the jump, but that
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scope will change when a delay slot insn of an inner scope is added.
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Hence, after delay slot scheduling, we'll have to expect
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NOTE_INSN_BLOCK_END notes between the indirect_jump_scratch and
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the jump. */
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INSN_SCOPE (insn) = INSN_SCOPE (jump);
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INSN_CODE (insn) = CODE_FOR_indirect_jump_scratch;
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return insn;
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}
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@ -3596,14 +3604,14 @@ barrier_align (barrier_or_label)
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return ((TARGET_SMALLCODE
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|| ((unsigned) XVECLEN (pat, 1) * GET_MODE_SIZE (GET_MODE (pat))
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<= (unsigned)1 << (CACHE_LOG - 2)))
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? 1 << TARGET_SHMEDIA : CACHE_LOG);
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? 1 << TARGET_SHMEDIA : align_jumps_log);
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}
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if (TARGET_SMALLCODE)
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return 0;
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if (! TARGET_SH2 || ! optimize)
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return CACHE_LOG;
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return align_jumps_log;
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/* When fixing up pcloads, a constant table might be inserted just before
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the basic block that ends with the barrier. Thus, we can't trust the
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@ -3679,7 +3687,7 @@ barrier_align (barrier_or_label)
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}
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}
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return CACHE_LOG;
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return align_jumps_log;
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}
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/* If we are inside a phony loop, almost any kind of label can turn up as the
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@ -3704,10 +3712,7 @@ sh_loop_align (label)
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|| recog_memoized (next) == CODE_FOR_consttable_2)
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return 0;
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if (TARGET_SH5)
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return 3;
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return 2;
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return align_loops_log;
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}
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/* Exported to toplev.c.
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@ -4418,9 +4423,6 @@ split_branches (first)
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If relaxing, output the label and pseudo-ops used to link together
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calls and the instruction which set the registers. */
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/* ??? This is unnecessary, and probably should be deleted. This makes
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the insn_addresses declaration above unnecessary. */
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/* ??? The addresses printed by this routine for insns are nonsense for
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insns which are inside of a sequence where none of the inner insns have
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variable length. This is because the second pass of shorten_branches
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@ -489,6 +489,13 @@ do { \
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flag_schedule_insns = 0; \
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} \
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\
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if (align_loops == 0) \
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align_loops = 1 << (TARGET_SH5 ? 3 : 2); \
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if (align_jumps == 0) \
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align_jumps = 1 << CACHE_LOG; \
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else if (align_jumps <= 1) \
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align_jumps = 2; \
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\
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/* Allocation boundary (in *bytes*) for the code of a function. \
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SH1: 32 bit alignment is faster, because instructions are always \
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fetched as a pair from a longword boundary. \
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@ -496,6 +503,20 @@ do { \
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if (align_functions == 0) \
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align_functions \
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= TARGET_SMALLCODE ? FUNCTION_BOUNDARY/8 : (1 << CACHE_LOG); \
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/* The linker relaxation code breaks when a function contains \
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alignments that are larger than that at the start of a \
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compilation unit. */ \
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if (TARGET_RELAX) \
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{ \
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int min_align \
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= align_loops > align_jumps ? align_loops : align_jumps; \
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\
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/* Also take possible .long constants / mova tables int account. */\
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if (min_align < 4) \
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min_align = 4; \
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if (align_functions < min_align) \
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align_functions = min_align; \
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} \
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} while (0)
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/* Target machine storage layout. */
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@ -391,9 +391,9 @@
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(eq_attr "type" "jump")
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(cond [(eq_attr "med_branch_p" "yes")
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(const_int 2)
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(and (eq (symbol_ref "GET_CODE (PREV_INSN (insn))")
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(and (eq (symbol_ref "GET_CODE (prev_nonnote_insn (insn))")
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(symbol_ref "INSN"))
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(eq (symbol_ref "INSN_CODE (PREV_INSN (insn))")
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(eq (symbol_ref "INSN_CODE (prev_nonnote_insn (insn))")
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(symbol_ref "code_for_indirect_jump_scratch")))
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(if_then_else (eq_attr "braf_branch_p" "yes")
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(const_int 6)
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@ -5035,9 +5035,14 @@
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;; This one has the additional purpose to record a possible scratch register
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;; for the following branch.
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;; ??? Unfortunately, just setting the scratch register is not good enough,
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;; because the insn then might be deemed dead and deleted. And we can't
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;; make the use in the jump insn explicit because that would disable
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;; delay slot scheduling from the target.
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(define_insn "indirect_jump_scratch"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(unspec:SI [(match_operand 1 "const_int_operand" "")] UNSPEC_BBR))]
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(unspec:SI [(match_operand 1 "const_int_operand" "")] UNSPEC_BBR))
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(set (pc) (unspec [(const_int 0)] UNSPEC_BBR))]
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"TARGET_SH1"
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""
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[(set_attr "length" "0")])
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@ -5475,6 +5480,19 @@
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[(set_attr "type" "jump")
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(set_attr "needs_delay_slot" "yes")])
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;; ??? It would be much saner to explicitly use the scratch register
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;; in the jump insn, and have indirect_jump_scratch only set it,
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;; but fill_simple_delay_slots would refuse to do delay slot filling
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;; from the target then, as it uses simplejump_p.
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;;(define_insn "jump_compact_far"
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;; [(set (pc)
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;; (label_ref (match_operand 0 "" "")))
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;; (use (match_operand 1 "register_operand" "r")]
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;; "TARGET_SH1"
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;; "* return output_far_jump(insn, operands[0], operands[1]);"
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;; [(set_attr "type" "jump")
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;; (set_attr "needs_delay_slot" "yes")])
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(define_insn "jump_media"
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[(set (pc)
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(match_operand:DI 0 "target_operand" "b"))]
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