[AArch64] Add SVE mul_highpart patterns
One advantage of the new permute handling compared to the old way is that we can now easily take advantage of the vectoriser's divmod patterns for SVE. 2018-03-13 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART) (UNSPEC_UMUL_HIGHPART): New constants. (MUL_HIGHPART): New int iteraor. (su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART. * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New define_expand. (*<su>mul<mode>3_highpart): New define_insn. gcc/testsuite/ * gcc.target/aarch64/sve/mul_highpart_1.c: New test. * gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise. From-SVN: r258487
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2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
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* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
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(UNSPEC_UMUL_HIGHPART): New constants.
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(MUL_HIGHPART): New int iteraor.
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(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
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* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
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define_expand.
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(*<su>mul<mode>3_highpart): New define_insn.
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2018-03-13 Eric Botcazou <ebotcazou@adacore.com>
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PR lto/84805
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@ -980,6 +980,34 @@
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mls\t%0.<Vetype>, %1/m, %2.<Vetype>, %3.<Vetype>"
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)
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;; Unpredicated highpart multiplication.
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(define_expand "<su>mul<mode>3_highpart"
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[(set (match_operand:SVE_I 0 "register_operand")
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(unspec:SVE_I
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[(match_dup 3)
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(unspec:SVE_I [(match_operand:SVE_I 1 "register_operand")
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(match_operand:SVE_I 2 "register_operand")]
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MUL_HIGHPART)]
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UNSPEC_MERGE_PTRUE))]
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"TARGET_SVE"
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{
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operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
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}
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)
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;; Predicated highpart multiplication.
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(define_insn "*<su>mul<mode>3_highpart"
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[(set (match_operand:SVE_I 0 "register_operand" "=w")
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(unspec:SVE_I
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[(match_operand:<VPRED> 1 "register_operand" "Upl")
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(unspec:SVE_I [(match_operand:SVE_I 2 "register_operand" "%0")
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(match_operand:SVE_I 3 "register_operand" "w")]
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MUL_HIGHPART)]
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UNSPEC_MERGE_PTRUE))]
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"TARGET_SVE"
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"<su>mulh\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>"
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)
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;; Unpredicated NEG, NOT and POPCOUNT.
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(define_expand "<optab><mode>2"
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[(set (match_operand:SVE_I 0 "register_operand")
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@ -438,6 +438,8 @@
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UNSPEC_ANDF ; Used in aarch64-sve.md.
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UNSPEC_IORF ; Used in aarch64-sve.md.
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UNSPEC_XORF ; Used in aarch64-sve.md.
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UNSPEC_SMUL_HIGHPART ; Used in aarch64-sve.md.
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UNSPEC_UMUL_HIGHPART ; Used in aarch64-sve.md.
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UNSPEC_COND_ADD ; Used in aarch64-sve.md.
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UNSPEC_COND_SUB ; Used in aarch64-sve.md.
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UNSPEC_COND_SMAX ; Used in aarch64-sve.md.
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@ -1467,6 +1469,8 @@
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(define_int_iterator UNPACK_UNSIGNED [UNSPEC_UNPACKULO UNSPEC_UNPACKUHI])
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(define_int_iterator MUL_HIGHPART [UNSPEC_SMUL_HIGHPART UNSPEC_UMUL_HIGHPART])
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(define_int_iterator SVE_COND_INT_OP [UNSPEC_COND_ADD UNSPEC_COND_SUB
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UNSPEC_COND_SMAX UNSPEC_COND_UMAX
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UNSPEC_COND_SMIN UNSPEC_COND_UMIN
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@ -1558,7 +1562,9 @@
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(define_int_attr su [(UNSPEC_UNPACKSHI "s")
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(UNSPEC_UNPACKUHI "u")
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(UNSPEC_UNPACKSLO "s")
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(UNSPEC_UNPACKULO "u")])
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(UNSPEC_UNPACKULO "u")
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(UNSPEC_SMUL_HIGHPART "s")
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(UNSPEC_UMUL_HIGHPART "u")])
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(define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u")
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(UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur")
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2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
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* gcc.target/aarch64/sve/mul_highpart_1.c: New test.
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* gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise.
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2018-03-13 Martin Liska <mliska@suse.cz>
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PR ipa/84658.
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/* { dg-do assemble { target aarch64_asm_sve_ok } } */
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/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model --save-temps" } */
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#include <stdint.h>
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#define DEF_LOOP(TYPE) \
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void __attribute__ ((noipa)) \
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mod_##TYPE (TYPE *dst, TYPE *src, int count) \
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{ \
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for (int i = 0; i < count; ++i) \
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dst[i] = src[i] % 17; \
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}
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#define TEST_ALL(T) \
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T (int32_t) \
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T (uint32_t) \
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T (int64_t) \
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T (uint64_t)
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TEST_ALL (DEF_LOOP)
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/* { dg-final { scan-assembler-times {\tsmulh\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumulh\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tsmulh\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tumulh\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-do run } */
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/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model --save-temps" } */
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#include "mul_highpart_1.c"
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#define N 79
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#define TEST_LOOP(TYPE) \
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{ \
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TYPE dst[N], src[N]; \
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for (int i = 0; i < N; ++i) \
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{ \
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src[i] = i * 7 + i % 3; \
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if (i % 11 > 7) \
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src[i] = -src[i]; \
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asm volatile ("" ::: "memory"); \
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} \
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mod_##TYPE (dst, src, N); \
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for (int i = 0; i < N; ++i) \
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if (dst[i] != src[i] % 17) \
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__builtin_abort (); \
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}
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int
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main (void)
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{
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TEST_ALL (TEST_LOOP);
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return 0;
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}
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