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[PATCH,RS6000 1/5] Clean-up MASK_<xxxx> and RS6000_BTM_<xxxx> definitions.

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This patch removes the defines that are no longer used, and
updates the comment for the set of MASK_<xxxx> defines.

This patch removes the defines for
MASK_REGNAMES, MASK_PROTOTYPE, RS6000_BTM_ALWAYS, RS6000_BTM_COMMON.

gcc/
	* config/rs6000/rs6000.h (RS6000_BTM_COMMON, RS6000_BTM_ALWAYS,
	MASK_REGNAMES, OPTION_MASK_REGNAMES, MASK_PROTOTYPE,
	OPTION_MASK_PROTOTYPE, MASK_UPDATE, OPTION_MASK_UPDATE): Remove.
This commit is contained in:
Will Schmidt 2022-06-23 15:45:15 -05:00
parent b36a1c964f
commit 124580b00f
1 changed files with 3 additions and 34 deletions
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37
gcc/config/rs6000/rs6000.h
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@ -505,8 +505,9 @@ extern int rs6000_vector_align[];
&& (TARGET_P9_MINMAX || !flag_trapping_math))
/* In switching from using target_flags to using rs6000_isa_flags, the options
machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. For now map
OPTION_MASK_<xxx> back into MASK_<xxx>. */
machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. The MASK_<xxxx>
options that have not yet been replaced by their OPTION_MASK_<xxx>
equivalents are defined here. */
#define MASK_ALTIVEC OPTION_MASK_ALTIVEC
#define MASK_CMPB OPTION_MASK_CMPB
#define MASK_CRYPTO OPTION_MASK_CRYPTO
@ -536,7 +537,6 @@ extern int rs6000_vector_align[];
#define MASK_RECIP_PRECISION OPTION_MASK_RECIP_PRECISION
#define MASK_SOFT_FLOAT OPTION_MASK_SOFT_FLOAT
#define MASK_STRICT_ALIGN OPTION_MASK_STRICT_ALIGN
#define MASK_UPDATE OPTION_MASK_UPDATE
#define MASK_VSX OPTION_MASK_VSX
#define MASK_POWER10 OPTION_MASK_POWER10
#define MASK_P10_FUSION OPTION_MASK_P10_FUSION
@ -553,14 +553,6 @@ extern int rs6000_vector_align[];
#define MASK_LITTLE_ENDIAN OPTION_MASK_LITTLE_ENDIAN
#endif
#ifdef TARGET_REGNAMES
#define MASK_REGNAMES OPTION_MASK_REGNAMES
#endif
#ifdef TARGET_PROTOTYPE
#define MASK_PROTOTYPE OPTION_MASK_PROTOTYPE
#endif
#ifdef TARGET_MODULO
#define RS6000_BTM_MODULO OPTION_MASK_MODULO
#endif
@ -2252,7 +2244,6 @@ extern int frame_pointer_needed;
/* Builtin targets. For now, we reuse the masks for those options that are in
target flags, and pick a random bit for ldbl128, which isn't in
target_flags. */
#define RS6000_BTM_ALWAYS 0 /* Always enabled. */
#define RS6000_BTM_ALTIVEC MASK_ALTIVEC /* VMX/altivec vectors. */
#define RS6000_BTM_CMPB MASK_CMPB /* ISA 2.05: compare bytes. */
#define RS6000_BTM_VSX MASK_VSX /* VSX (vector/scalar). */
@ -2277,28 +2268,6 @@ extern int frame_pointer_needed;
#define RS6000_BTM_MMA MASK_MMA /* ISA 3.1 MMA. */
#define RS6000_BTM_P10 MASK_POWER10
#define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \
| RS6000_BTM_VSX \
| RS6000_BTM_P8_VECTOR \
| RS6000_BTM_P9_VECTOR \
| RS6000_BTM_P9_MISC \
| RS6000_BTM_MODULO \
| RS6000_BTM_CRYPTO \
| RS6000_BTM_FRE \
| RS6000_BTM_FRES \
| RS6000_BTM_FRSQRTE \
| RS6000_BTM_FRSQRTES \
| RS6000_BTM_HTM \
| RS6000_BTM_POPCNTD \
| RS6000_BTM_CELL \
| RS6000_BTM_DFP \
| RS6000_BTM_HARD_FLOAT \
| RS6000_BTM_LDBL128 \
| RS6000_BTM_POWERPC64 \
| RS6000_BTM_FLOAT128 \
| RS6000_BTM_FLOAT128_HW \
| RS6000_BTM_MMA \
| RS6000_BTM_P10)
enum rs6000_builtin_type_index
{