mips.md (adddi3_internal_2+1): Remove contraints from define_split.
* config/mips/mips.md (adddi3_internal_2+1): Remove contraints from define_split. (adddi3_internal_2+2): Likewise. (eh_set_lr_di+1): Likewise. From-SVN: r45002
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@ -1,3 +1,10 @@
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2001-08-18 Graham Stott <grahams@redhat.com>
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* config/mips/mips.md (adddi3_internal_2+1): Remove contraints from
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define_split.
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(adddi3_internal_2+2): Likewise.
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(eh_set_lr_di+1): Likewise.
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2001-08-17 Richard Henderson <rth@redhat.com>
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2001-08-17 Richard Henderson <rth@redhat.com>
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* defaults.h (UNALIGNED_SHORT_ASM_OP, UNALIGNED_INT_ASM_OP,
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* defaults.h (UNALIGNED_SHORT_ASM_OP, UNALIGNED_INT_ASM_OP,
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@ -871,7 +871,7 @@
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[(set (match_operand:DI 0 "register_operand" "")
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[(set (match_operand:DI 0 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(match_operand:DI 2 "small_int" "")))
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(match_operand:DI 2 "small_int" "")))
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(clobber (match_operand:SI 3 "register_operand" "=d"))]
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(clobber (match_operand:SI 3 "register_operand" ""))]
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"reload_completed && !WORDS_BIG_ENDIAN && !TARGET_64BIT
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"reload_completed && !WORDS_BIG_ENDIAN && !TARGET_64BIT
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&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
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&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
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&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
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&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
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@ -895,7 +895,7 @@
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[(set (match_operand:DI 0 "register_operand" "")
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[(set (match_operand:DI 0 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(match_operand:DI 2 "small_int" "")))
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(match_operand:DI 2 "small_int" "")))
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(clobber (match_operand:SI 3 "register_operand" "=d"))]
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(clobber (match_operand:SI 3 "register_operand" ""))]
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"reload_completed && WORDS_BIG_ENDIAN && !TARGET_64BIT
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"reload_completed && WORDS_BIG_ENDIAN && !TARGET_64BIT
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&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
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&& !TARGET_DEBUG_D_MODE && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
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&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
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&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
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@ -9546,8 +9546,8 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2"
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"#")
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"#")
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(define_split
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(define_split
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[(unspec [(match_operand 0 "register_operand" "r")] 3)
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[(unspec [(match_operand 0 "register_operand" "")] 3)
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(clobber (match_scratch 1 "=&r"))]
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(clobber (match_scratch 1 ""))]
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"reload_completed"
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"reload_completed"
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[(const_int 0)]
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[(const_int 0)]
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"
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"
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