diff --git a/gcc/c-decl.c b/gcc/c-decl.c index 76f22724166..a0abffd380d 100644 --- a/gcc/c-decl.c +++ b/gcc/c-decl.c @@ -4229,7 +4229,7 @@ grokdeclarator (declarator, declspecs, decl_context, initialized) main_type = TYPE_MAIN_VARIANT (type); if (main_type == float_type_node) DECL_ARG_TYPE (decl) = double_type_node; - /* Don't use TYPE_PREISION to decide whether to promote, + /* Don't use TYPE_PRECISION to decide whether to promote, because we should convert short if it's the same size as int, but we should not convert long if it's the same size as int. */ else if (C_PROMOTING_INTEGER_TYPE_P (main_type)) diff --git a/gcc/calls.c b/gcc/calls.c index 871412e6863..8f0656fd6d2 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -525,7 +525,7 @@ expand_call (exp, target, ignore) is_integrable = 1; else if (! TREE_ADDRESSABLE (fndecl)) { - /* In case this function later becomes inlineable, + /* In case this function later becomes inlinable, record that there was already a non-inline call to it. Use abstraction instead of setting TREE_ADDRESSABLE diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index e3e13127574..f04cf30b2e5 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -124,7 +124,7 @@ extern int target_flags; #define WCHAR_TYPE "char" #define WCHAR_TYPE_SIZE BITS_PER_UNIT -/* Define this macro if it is advisible to hold scalars in registers +/* Define this macro if it is advisable to hold scalars in registers in a wider mode than that declared by the program. In such cases, the value is constrained to be within the bounds of the declared type, but kept valid in the wider mode. The signedness of the diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 5c5b368e60b..3a371846290 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -127,7 +127,7 @@ extern int target_flags; #define WCHAR_TYPE "short unsigned int" #define WCHAR_TYPE_SIZE 16 -/* Define this macro if it is advisible to hold scalars in registers +/* Define this macro if it is advisable to hold scalars in registers in a wider mode than that declared by the program. In such cases, the value is constrained to be within the bounds of the declared type, but kept valid in the wider mode. The signedness of the diff --git a/gcc/config/elxsi/elxsi.h b/gcc/config/elxsi/elxsi.h index 533b633ca65..dbf5126c645 100644 --- a/gcc/config/elxsi/elxsi.h +++ b/gcc/config/elxsi/elxsi.h @@ -69,7 +69,7 @@ extern int target_flags; /* Define this if most significant word of a multiword number is numbered. */ #define WORDS_BIG_ENDIAN 1 -/* Number of bits in an addressible storage unit */ +/* Number of bits in an addressable storage unit */ #define BITS_PER_UNIT 8 /* Width in bits of a "word", which is the contents of a machine register. @@ -687,8 +687,8 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Check a `double' value for validity for a particular machine mode. */ -/* note that it is very hard to accidently create a number that fits in a - double but not in a float, since their ranges are almost the same */ +/* Note that it is very hard to accidentally create a number that fits in a + double but not in a float, since their ranges are almost the same. */ #define CHECK_FLOAT_VALUE(mode, d) \ if ((mode) == SFmode) \ { \ diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index 4d34b89ea8b..4bf2728a5ea 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -185,7 +185,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ #define TARGET_ASM_COMPAT (target_flags & TARGET_FLAG_ASM_COMPAT) /* For compatibility with the gcc960 v1.2 compiler. Use the old structure - alignement rules. Also, turns on STRICT_ALIGNMENT. */ + alignment rules. Also, turns on STRICT_ALIGNMENT. */ #define TARGET_FLAG_OLD_ALIGN 0x8000 #define TARGET_OLD_ALIGN (target_flags & TARGET_FLAG_OLD_ALIGN) @@ -359,7 +359,7 @@ extern int target_flags; #define STRICT_ALIGNMENT TARGET_OLD_ALIGN /* Specify alignment for string literals (which might be higher than the - base type's minimnal alignment requirement. This allows strings to be + base type's minimal alignment requirement. This allows strings to be aligned on word boundaries, and optimizes calls to the str* and mem* library functions. */ #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ @@ -996,7 +996,7 @@ extern struct rtx_def *i960_function_arg (); It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. */ -/* On 80960, convert non-cannonical addresses to canonical form. */ +/* On 80960, convert non-canonical addresses to canonical form. */ extern struct rtx_def *legitimize_address (); #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ @@ -1417,7 +1417,7 @@ extern struct rtx_def *gen_compare_reg (); } #if 0 -/* Promote char and short arguments to ints, when want compitibility with +/* Promote char and short arguments to ints, when want compatibility with the iC960 compilers. */ /* ??? In order for this to work, all users would need to be changed diff --git a/gcc/config/m68k/dpx2.ifile b/gcc/config/m68k/dpx2.ifile index 899a7392685..2c8acd808e3 100644 --- a/gcc/config/m68k/dpx2.ifile +++ b/gcc/config/m68k/dpx2.ifile @@ -4,7 +4,7 @@ * Peter Schauer * * Install this file as $prefix/gcc-lib/dpx2/VERSION/gcc.ifile - * and comment out the lines refering to COLLECT at the top + * and comment out the lines referring to COLLECT at the top * of Makefile before building GCC. * * This file has been tested with gcc-2.2.2 on a DPX/2 340 diff --git a/gcc/config/m68k/plexus.h b/gcc/config/m68k/plexus.h index 4f892d1c9dd..7f84bda9a44 100644 --- a/gcc/config/m68k/plexus.h +++ b/gcc/config/m68k/plexus.h @@ -66,7 +66,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ #define PLEXUS_CC_COMPAT #ifdef PLEXUS_CC_COMPAT -#define STRUCTURE_SIZE_BOUNDARY 16 /* for compatiblity with cc */ +#define STRUCTURE_SIZE_BOUNDARY 16 /* for compatibility with cc */ #undef STACK_BOUNDARY #define STACK_BOUNDARY 32 /* ditto */ #endif diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index c2a9391b3d4..149626ad402 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -1537,7 +1537,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, #define FUNCTION_MODE SImode /* A barrier will be aligned so account for the possible expansion. - A volatile load may be preceeded by a serializing instruction. + A volatile load may be preceded by a serializing instruction. Account for profiling code output at NOTE_INSN_PROLOGUE_END. Account for block profiling code at basic block boundaries. */ #define ADJUST_INSN_LENGTH(RTX, LENGTH) \ diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index e9b006cc478..29ea966306e 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1846,7 +1846,7 @@ block_move_load_store (dest_reg, src_reg, p_bytes, p_offset, align, orig_src) } #if 0 - /* Don't generate unligned moves here, rather defer those to the + /* Don't generate unaligned moves here, rather defer those to the general movestrsi_internal pattern. */ else if (bytes >= UNITS_PER_WORD) { diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index deddab5fc99..5dd3c8160ee 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -814,7 +814,7 @@ [(set_attr "type" "fpstore") (set_attr "length" "1")]) -;;; pic symbol refrences +;;; pic symbol references (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r") diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index c17ac54222f..1c239f5b199 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -105,7 +105,7 @@ extern int target_flags; /* target machine storage layout */ -/* Define this macro if it is advisible to hold scalars in registers +/* Define this macro if it is advisable to hold scalars in registers in a wider mode than that declared by the program. In such cases, the value is constrained to be within the bounds of the declared type, but kept valid in the wider mode. The signedness of the diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 97ab72cab4a..7c72ea80871 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -3024,7 +3024,7 @@ sparc_type_code (type) abort (); case COMPLEX_TYPE: /* GNU Fortran COMPLEX type. */ - /* ??? We need to dinguish between double and float complex types, + /* ??? We need to distinguish between double and float complex types, but I don't know how yet because I can't reach this code from existing front-ends. */ return (qualifiers | 7); /* Who knows? */ diff --git a/gcc/config/svr4.h b/gcc/config/svr4.h index c0fd18ffbbe..866bc7ebc20 100644 --- a/gcc/config/svr4.h +++ b/gcc/config/svr4.h @@ -324,7 +324,7 @@ do { \ sprintf (LABEL, "*.%s%d", PREFIX, NUM); \ } while (0) -/* Output the label which preceeds a jumptable. Note that for all svr4 +/* Output the label which precedes a jumptable. Note that for all svr4 systems where we actually generate jumptables (which is to say every svr4 target except i386, where we use casesi instead) we put the jump- tables into the .rodata section and since other stuff could have been diff --git a/gcc/config/tahoe/tahoe.h b/gcc/config/tahoe/tahoe.h index 4a58c7dea31..42f416b4ebc 100644 --- a/gcc/config/tahoe/tahoe.h +++ b/gcc/config/tahoe/tahoe.h @@ -338,7 +338,7 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES}; #define FUNCTION_VALUE(VALTYPE, FUNC) \ gen_rtx (REG, TYPE_MODE (VALTYPE), 0) -/* libarary routines also return things in reg 0 */ +/* library routines also return things in reg 0 */ #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)