pa-hpux.h, [...]: Replace TARGET_SNAKE by TARGET_PA_11 and MASK_SNAKE by MASK_PA_11.
* pa/pa-hpux.h, pa/pa-hpux10.h, pa/pa-hpux9.h, pa/pa-osf.h, pa.h, pa.c, pa.md, configure.in, configure: Replace TARGET_SNAKE by TARGET_PA_11 and MASK_SNAKE by MASK_PA_11. From-SVN: r26630
This commit is contained in:
parent
f9e814f100
commit
13ee407e02
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@ -1,3 +1,9 @@
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Mon Apr 26 00:58:54 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* pa/pa-hpux.h, pa/pa-hpux10.h, pa/pa-hpux9.h, pa/pa-osf.h, pa.h,
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pa.c, pa.md, configure.in, configure: Replace TARGET_SNAKE by
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TARGET_PA_11 and MASK_SNAKE by MASK_PA_11.
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Mon Apr 26 00:28:25 1999 Theodore Papadopoulo <Theodore.Papadopoulo@sophia.inria.fr>
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* flags.h (inline_max_insns): Declare.
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@ -36,7 +36,7 @@ Boston, MA 02111-1307, USA. */
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#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -DPWB -Dhpux -Dunix -Asystem(unix) -Asystem(hpux) -Acpu(hppa) -Amachine(hppa)"
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#undef LINK_SPEC
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
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#define LINK_SPEC \
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"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }}%{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{g*:-a archive} %{shared:-b}"
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#else
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@ -22,7 +22,7 @@ Boston, MA 02111-1307, USA. */
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/* We can debug dynamically linked executables on hpux9; we also want
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dereferencing of a NULL pointer to cause a SEGV. */
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#undef LINK_SPEC
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
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#define LINK_SPEC \
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"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }} -z %{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{shared:-b}"
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#else
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@ -46,7 +46,7 @@ Boston, MA 02111-1307, USA. */
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#undef ASM_FILE_START
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#define ASM_FILE_START(FILE) \
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do { \
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if (TARGET_SNAKE) \
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if (TARGET_PA_11) \
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fputs("\t.LEVEL 1.1\n", FILE); \
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else \
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fputs("\t.LEVEL 1.0\n", FILE); \
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@ -22,7 +22,7 @@ Boston, MA 02111-1307, USA. */
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/* We can debug dynamically linked executables on hpux9; we also want
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dereferencing of a NULL pointer to cause a SEGV. */
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#undef LINK_SPEC
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
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#define LINK_SPEC \
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"%{!mpa-risc-1-0:%{!shared:-L/lib/pa1.1 -L/usr/lib/pa1.1 }} -z %{mlinker-opt:-O} %{!shared:-u main} %{static:-a archive} %{shared:-b}"
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#else
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@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#undef CPP_PREDEFINES
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE)
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11)
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#define CPP_PREDEFINES "-Dhppa -Dunix -Dhp9000 -Dspectrum -DREVARGV -Dhp700 -DHP700 -Dparisc -D__pa_risc -DPARISC -DBYTE_MSF -DBIT_MSF -Asystem(unix) -Asystem(mach) -Acpu(hppa) -Amachine(hppa)"
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#else
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#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Dparisc -D__pa_risc -DPARISC -DBYTE_MSF -DBIT_MSF -Asystem(unix) -Asystem(mach) -Acpu(hppa) -Amachine(hppa)"
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@ -70,8 +70,8 @@ extern int target_flags;
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/* compile code for HP-PA 1.1 ("Snake") */
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#define MASK_SNAKE 1
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#define TARGET_SNAKE (target_flags & MASK_SNAKE)
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#define MASK_PA_11 1
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#define TARGET_PA_11 (target_flags & MASK_PA_11)
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/* Disable all FP registers (they all become fixed). This may be necessary
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for compiling kernels which perform lazy context switching of FP regs.
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An empty string NAME is used to identify the default VALUE. */
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#define TARGET_SWITCHES \
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{{"snake", MASK_SNAKE, "Generate PA1.1 code"}, \
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{"nosnake", -MASK_SNAKE, "Do not generate PA1.1 code"}, \
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{"pa-risc-1-0", -MASK_SNAKE, "Do not generate PA1.1 code"}, \
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{"pa-risc-1-1", MASK_SNAKE, "Generate PA1.1 code"}, \
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{{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
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{"nosnake", -MASK_PA_11, "Do not generate PA1.1 code"}, \
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{"pa-risc-1-0", -MASK_PA_11, "Do not generate PA1.1 code"}, \
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{"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
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{"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
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{"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
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{"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
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@ -254,7 +254,7 @@ extern int target_flags;
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fprintf (FILE, \
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"\t.stabs \"\",%d,0,0,L$text_end0000\nL$text_end0000:\n", N_SO)
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_SNAKE) == 0
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#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
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#define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
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%{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\
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%{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}\
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@ -547,7 +547,7 @@ do { \
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#define CONDITIONAL_REGISTER_USAGE \
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{ \
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if (!TARGET_SNAKE) \
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if (!TARGET_PA_11) \
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{ \
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for (i = 56; i < 88; i++) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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The floating point registers are 64 bits wide. Snake fp regs are 32
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bits wide */
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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(!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
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(!TARGET_PA_11 && FP_REGNO_P (REGNO) ? 1 \
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: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
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/* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
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: !TARGET_SNAKE && FP_REGNO_P (REGNO) \
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: !TARGET_PA_11 && FP_REGNO_P (REGNO) \
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? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
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/* Make wide modes be in aligned registers. */ \
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: GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
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/* Return the maximum number of consecutive registers
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needed to represent mode MODE in a register of class CLASS. */
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#define CLASS_MAX_NREGS(CLASS, MODE) \
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(!TARGET_SNAKE && ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) ? 1 : \
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(!TARGET_PA_11 && ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) ? 1 : \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
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/* Stack layout; function entry, exit and calling. */
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@ -1955,7 +1955,7 @@ while (0)
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case MULT: \
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if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
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return COSTS_N_INSNS (3); \
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return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
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return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
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? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
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case DIV: \
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if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
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@ -2834,7 +2834,7 @@
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(const_int 0))
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(set (match_operand:SF 0 "register_operand" "")
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(float:SF (match_dup 2)))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"operands[2] = gen_reg_rtx (DImode);")
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(define_expand "floatunssidf2"
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@ -2844,13 +2844,13 @@
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(const_int 0))
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(set (match_operand:DF 0 "register_operand" "")
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(float:DF (match_dup 2)))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"operands[2] = gen_reg_rtx (DImode);")
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(define_insn "floatdisf2"
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[(set (match_operand:SF 0 "register_operand" "=f")
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(float:SF (match_operand:DI 1 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"fcnvxf,dbl,sgl %1,%0"
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[(set_attr "type" "fpalu")
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(set_attr "length" "4")])
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(define_insn "floatdidf2"
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[(set (match_operand:DF 0 "register_operand" "=f")
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(float:DF (match_operand:DI 1 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"fcnvxf,dbl,dbl %1,%0"
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[(set_attr "type" "fpalu")
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(set_attr "length" "4")])
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@ -2885,7 +2885,7 @@
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(define_insn "fix_truncsfdi2"
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[(set (match_operand:DI 0 "register_operand" "=f")
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(fix:DI (fix:SF (match_operand:SF 1 "register_operand" "f"))))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"fcnvfxt,sgl,dbl %1,%0"
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[(set_attr "type" "fpalu")
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(set_attr "length" "4")])
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@ -2893,7 +2893,7 @@
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(define_insn "fix_truncdfdi2"
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[(set (match_operand:DI 0 "register_operand" "=f")
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(fix:DI (fix:DF (match_operand:DF 1 "register_operand" "f"))))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT"
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"fcnvfxt,dbl,dbl %1,%0"
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[(set_attr "type" "fpalu")
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(set_attr "length" "4")])
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@ -3062,7 +3062,7 @@
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""
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"
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{
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if (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT)
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if (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT)
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{
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rtx scratch = gen_reg_rtx (DImode);
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operands[1] = force_reg (SImode, operands[1]);
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@ -3080,7 +3080,7 @@
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[(set (match_operand:DI 0 "nonimmediate_operand" "=f")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
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(zero_extend:DI (match_operand:SI 2 "nonimmediate_operand" "f"))))]
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"TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
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"xmpyu %1,%2,%0"
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[(set_attr "type" "fpmuldbl")
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(set_attr "length" "4")])
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@ -3089,7 +3089,7 @@
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[(set (match_operand:DI 0 "nonimmediate_operand" "=f")
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(mult:DI (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "f"))
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(match_operand:DI 2 "uint32_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
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"TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT"
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"xmpyu %1,%R2,%0"
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[(set_attr "type" "fpmuldbl")
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(set_attr "length" "4")])
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@ -4864,7 +4864,7 @@
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(set (match_operand 3 "register_operand" "+f")
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(plus (match_operand 4 "register_operand" "f")
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(match_operand 5 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT
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&& reload_completed && fmpyaddoperands (operands)"
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"*
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{
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@ -4893,7 +4893,7 @@
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(set (match_operand 0 "register_operand" "=f")
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(mult (match_operand 1 "register_operand" "f")
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(match_operand 2 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT
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&& reload_completed && fmpyaddoperands (operands)"
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"*
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{
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@ -4922,7 +4922,7 @@
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(set (match_operand 3 "register_operand" "+f")
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(minus (match_operand 4 "register_operand" "f")
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(match_operand 5 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT
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&& reload_completed && fmpysuboperands (operands)"
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"*
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{
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@ -4941,7 +4941,7 @@
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(set (match_operand 0 "register_operand" "=f")
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(mult (match_operand 1 "register_operand" "f")
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(match_operand 2 "register_operand" "f")))]
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"TARGET_SNAKE && ! TARGET_SOFT_FLOAT
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"TARGET_PA_11 && ! TARGET_SOFT_FLOAT
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&& reload_completed && fmpysuboperands (operands)"
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"*
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{
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@ -3234,7 +3234,7 @@ for machine in $build $host $target; do
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float_format=i32
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;;
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hppa*-*-openbsd*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tmake_file=pa/t-openbsd
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;;
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hppa1.1-*-pro*)
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@ -3243,7 +3243,7 @@ for machine in $build $host $target; do
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tmake_file=pa/t-pro
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;;
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hppa1.1-*-osf*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-osf.h"
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use_collect2=yes
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;;
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@ -3257,7 +3257,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-bsd*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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use_collect2=yes
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;;
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hppa1.0-*-bsd*)
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@ -3288,7 +3288,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-hpux8.0[0-2]*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-hpux.h"
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xm_file=pa/xm-pahpux.h
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xmake_file=pa/x-pa-hpux
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@ -3302,7 +3302,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-hpux8*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-hpux.h"
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xm_file=pa/xm-pahpux.h
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xmake_file=pa/x-pa-hpux
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@ -3325,7 +3325,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux10.h"
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xm_file=pa/xm-pahpux.h
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xmake_file=pa/x-pa-hpux
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@ -3364,7 +3364,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-hpux* | hppa2*-*-hpux*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux9.h"
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xm_file=pa/xm-pahpux.h
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xmake_file=pa/x-pa-hpux
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@ -3387,7 +3387,7 @@ for machine in $build $host $target; do
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use_collect2=yes
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;;
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hppa1.1-*-hiux* | hppa2*-*-hiux*)
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target_cpu_default="MASK_SNAKE"
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target_cpu_default="MASK_PA_11"
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tm_file="${tm_file} pa/pa-hpux.h pa/pa-hiux.h"
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xm_file=pa/xm-pahpux.h
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xmake_file=pa/x-pa-hpux
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||||
|
@ -3410,7 +3410,7 @@ for machine in $build $host $target; do
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa*-*-lites*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
i370-*-mvs*)
|
||||
|
|
|
@ -819,7 +819,7 @@ changequote([,])dnl
|
|||
float_format=i32
|
||||
;;
|
||||
hppa*-*-openbsd*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tmake_file=pa/t-openbsd
|
||||
;;
|
||||
hppa1.1-*-pro*)
|
||||
|
@ -828,7 +828,7 @@ changequote([,])dnl
|
|||
tmake_file=pa/t-pro
|
||||
;;
|
||||
hppa1.1-*-osf*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-osf.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
|
@ -842,7 +842,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-bsd*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-bsd*)
|
||||
|
@ -877,7 +877,7 @@ changequote([,])dnl
|
|||
changequote(,)dnl
|
||||
hppa1.1-*-hpux8.0[0-2]*)
|
||||
changequote([,])dnl
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
|
@ -891,7 +891,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-hpux8*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
|
@ -914,7 +914,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
|
@ -953,7 +953,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-hpux* | hppa2*-*-hpux*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
|
@ -976,7 +976,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-hiux* | hppa2*-*-hiux*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/pa-hpux.h pa/pa-hiux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
|
@ -999,7 +999,7 @@ changequote([,])dnl
|
|||
use_collect2=yes
|
||||
;;
|
||||
hppa*-*-lites*)
|
||||
target_cpu_default="MASK_SNAKE"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
i370-*-mvs*)
|
||||
|
|
Loading…
Reference in New Issue