Fix @itemx vs. @itemx
gcc/: * doc/c-tree.texi (Expression trees): Use @itemx for all but the first item for merged items. * doc/extend.texi (Variable Attributes): Likewise. * doc/install.texi (Configuration): Likewise. * doc/invoke.texi (RS/6000 and PowerPC Options, RX Options): Likewise. From-SVN: r155263
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@ -1,3 +1,12 @@
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2009-12-15 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
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* doc/c-tree.texi (Expression trees): Use @itemx for all but
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the first item for merged items.
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* doc/extend.texi (Variable Attributes): Likewise.
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* doc/install.texi (Configuration): Likewise.
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* doc/invoke.texi (RS/6000 and PowerPC Options, RX Options):
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Likewise.
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2009-12-15 Richard Guenther <rguenther@suse.de>
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* tree.c (free_lang_data_in_binfo): Do not free BINFO_OFFSET
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@ -2871,7 +2871,7 @@ chained together. This facilitates adding new clauses during
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compilation.
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@item VEC_LSHIFT_EXPR
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@item VEC_RSHIFT_EXPR
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@itemx VEC_RSHIFT_EXPR
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These nodes represent whole vector left and right shifts, respectively.
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The first operand is the vector to shift; it will always be of vector type.
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The second operand is an expression for the number of bits by which to
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@ -2879,7 +2879,7 @@ shift. Note that the result is undefined if the second operand is larger
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than or equal to the first operand's type size.
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@item VEC_WIDEN_MULT_HI_EXPR
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@item VEC_WIDEN_MULT_LO_EXPR
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@itemx VEC_WIDEN_MULT_LO_EXPR
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These nodes represent widening vector multiplication of the high and low
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parts of the two input vectors, respectively. Their operands are vectors
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that contain the same number of elements (@code{N}) of the same integral type.
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@ -2891,7 +2891,7 @@ low @code{N/2} elements of the two vector are multiplied to produce the
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vector of @code{N/2} products.
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@item VEC_UNPACK_HI_EXPR
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@item VEC_UNPACK_LO_EXPR
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@itemx VEC_UNPACK_LO_EXPR
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These nodes represent unpacking of the high and low parts of the input vector,
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respectively. The single operand is a vector that contains @code{N} elements
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of the same integral or floating point type. The result is a vector
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@ -2902,7 +2902,7 @@ In the case of @code{VEC_UNPACK_LO_EXPR} the low @code{N/2} elements of the
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vector are extracted and widened (promoted).
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@item VEC_UNPACK_FLOAT_HI_EXPR
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@item VEC_UNPACK_FLOAT_LO_EXPR
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@itemx VEC_UNPACK_FLOAT_LO_EXPR
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These nodes represent unpacking of the high and low parts of the input vector,
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where the values are converted from fixed point to floating point. The
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single operand is a vector that contains @code{N} elements of the same
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@ -2938,13 +2938,13 @@ elements of the two vectors are merged (concatenated) to form the output
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vector.
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@item VEC_EXTRACT_EVEN_EXPR
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@item VEC_EXTRACT_ODD_EXPR
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@itemx VEC_EXTRACT_ODD_EXPR
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These nodes represent extracting of the even/odd elements of the two input
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vectors, respectively. Their operands and result are vectors that contain the
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same number of elements of the same type.
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@item VEC_INTERLEAVE_HIGH_EXPR
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@item VEC_INTERLEAVE_LOW_EXPR
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@itemx VEC_INTERLEAVE_LOW_EXPR
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These nodes represent merging and interleaving of the high/low elements of the
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two input vectors, respectively. The operands and the result are vectors that
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contain the same number of elements (@code{N}) of the same type.
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@ -4235,8 +4235,8 @@ Three attributes are currently defined for the Blackfin.
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@table @code
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@item l1_data
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@item l1_data_A
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@item l1_data_B
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@itemx l1_data_A
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@itemx l1_data_B
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@cindex @code{l1_data} variable attribute
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@cindex @code{l1_data_A} variable attribute
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@cindex @code{l1_data_B} variable attribute
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@ -4308,7 +4308,7 @@ allows modules to make no assumptions about where variables might be
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stored.
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@item io
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@item io (@var{addr})
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@itemx io (@var{addr})
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Variables with the @code{io} attribute are used to address
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memory-mapped peripherals. If an address is specified, the variable
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is assigned that address, else it is not assigned an address (it is
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@ -4319,7 +4319,7 @@ int timer_count __attribute__((io(0x123)));
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@end example
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@item cb
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@item cb (@var{addr})
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@itemx cb (@var{addr})
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Variables with the @code{cb} attribute are used to access the control
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bus, using special instructions. @code{addr} indicates the control bus
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address. Example:
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@ -1432,7 +1432,7 @@ increase the risk of undetected internal errors causing wrong code to be
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generated.
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@item --disable-stage1-checking
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@item --enable-stage1-checking
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@itemx --enable-stage1-checking
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@itemx --enable-stage1-checking=@var{list}
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If no @option{--enable-checking} option is specified the stage1
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compiler will be built with @samp{yes} checking enabled, otherwise
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@ -15072,7 +15072,7 @@ stored, which means code that walks the stack frame across interrupts or
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signals may get corrupted data.
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@item -mavoid-indexed-addresses
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@item -mno-avoid-indexed-addresses
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@itemx -mno-avoid-indexed-addresses
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@opindex mavoid-indexed-addresses
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@opindex mno-avoid-indexed-addresses
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Generate code that tries to avoid (not avoid) the use of indexed load
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@ -15543,14 +15543,14 @@ experiment and discover whether this feature is of benefit to their
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program.
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@item -msim
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@item -mno-sim
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@itemx -mno-sim
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@opindex msim
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@opindex mno-sim
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Use the simulator runtime. The default is to use the libgloss board
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specific runtime.
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@item -mas100-syntax
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@item -mno-as100-syntax
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@itemx -mno-as100-syntax
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@opindex mas100-syntax
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@opindex mno-as100-syntax
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When generating assembler output use a syntax that is compatible with
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