i386.c (output_fp_compare): Return %v prefixed instruction mnemonics for TARGET_AVX.
* config/i386/i386.c (output_fp_compare): Return %v prefixed instruction mnemonics for TARGET_AVX. * config/i386/i386.md (*movdf_internal_rex64): use cond RTX in "type" attribute calculation. (*movdf_internal): Ditto. (*movsf_internal): Ditto. From-SVN: r178891
This commit is contained in:
parent
f2ce74d157
commit
167aa8cd3f
@ -1,3 +1,13 @@
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2011-09-15 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (output_fp_compare): Return %v prefixed
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instruction mnemonics for TARGET_AVX.
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* config/i386/i386.md (*movdf_internal_rex64): use cond RTX in
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"type" attribute calculation.
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(*movdf_internal): Ditto.
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(*movsf_internal): Ditto.
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2011-09-15 James Greenhalgh <james.greenhalgh@arm.com>
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2011-09-15 James Greenhalgh <james.greenhalgh@arm.com>
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* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): New builtin macro.
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* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): New builtin macro.
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@ -67,8 +77,7 @@
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* config/arm/arm.c (arm_override_options): Add unaligned_access
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* config/arm/arm.c (arm_override_options): Add unaligned_access
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support.
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support.
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(arm_file_start): Emit attribute for unaligned access as
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(arm_file_start): Emit attribute for unaligned access as appropriate.
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appropriate.
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* config/arm/arm.md (UNSPEC_UNALIGNED_LOAD)
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* config/arm/arm.md (UNSPEC_UNALIGNED_LOAD)
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(UNSPEC_UNALIGNED_STORE): Add constants for unspecs.
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(UNSPEC_UNALIGNED_STORE): Add constants for unspecs.
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(insv, extzv): Add unaligned-access support.
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(insv, extzv): Add unaligned-access support.
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@ -156,7 +165,7 @@
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* ipa-inline-transform.c (can_remove_node_now_p): Fix thunkos.
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* ipa-inline-transform.c (can_remove_node_now_p): Fix thunkos.
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2011-09-13 Paul Brook <paul@codesourcery.com>
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2011-09-13 Paul Brook <paul@codesourcery.com>
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* config/arm/arm.h (ASM_PREFERRED_EH_DATA_FORMAT): Define.
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* config/arm/arm.h (ASM_PREFERRED_EH_DATA_FORMAT): Define.
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(ARM_TARGET2_DWARF_FORMAT): Provide default definition.
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(ARM_TARGET2_DWARF_FORMAT): Provide default definition.
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* config/arm/linux-eabi.h (ARM_TARGET2_DWARF_FORMAT): Define.
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* config/arm/linux-eabi.h (ARM_TARGET2_DWARF_FORMAT): Define.
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@ -175,7 +184,7 @@
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* ginclude/unwind-arm-common.h: New file.
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* ginclude/unwind-arm-common.h: New file.
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2011-09-13 Georg-Johann Lay <avr@gjlay.de>
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2011-09-13 Georg-Johann Lay <avr@gjlay.de>
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PR target/50358
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PR target/50358
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* config/avr/predicates.md (const_1_to_6_operand): New predicate.
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* config/avr/predicates.md (const_1_to_6_operand): New predicate.
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* config/avr/avr.md: (extend_s): New code attribute.
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* config/avr/avr.md: (extend_s): New code attribute.
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@ -279,8 +288,7 @@
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PR tree-optimization/50343
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PR tree-optimization/50343
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* tree-vect-patterns.c (vect_recog_dot_prod_pattern): Check
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* tree-vect-patterns.c (vect_recog_dot_prod_pattern): Check
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that the reduction is over an SSA name before checking its
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that the reduction is over an SSA name before checking its definition.
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definition.
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2011-09-11 Richard Sandiford <rdsandiford@googlemail.com>
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2011-09-11 Richard Sandiford <rdsandiford@googlemail.com>
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@ -14900,21 +14900,16 @@ output_fp_compare (rtx insn, rtx *operands, bool eflags_p, bool unordered_p)
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if (is_sse)
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if (is_sse)
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{
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{
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static const char ucomiss[] = "vucomiss\t{%1, %0|%0, %1}";
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static const char ucomisd[] = "vucomisd\t{%1, %0|%0, %1}";
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static const char comiss[] = "vcomiss\t{%1, %0|%0, %1}";
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static const char comisd[] = "vcomisd\t{%1, %0|%0, %1}";
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if (GET_MODE (operands[0]) == SFmode)
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if (GET_MODE (operands[0]) == SFmode)
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if (unordered_p)
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if (unordered_p)
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return &ucomiss[TARGET_AVX ? 0 : 1];
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return "%vucomiss\t{%1, %0|%0, %1}";
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else
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else
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return &comiss[TARGET_AVX ? 0 : 1];
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return "%vcomiss\t{%1, %0|%0, %1}";
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else
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else
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if (unordered_p)
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if (unordered_p)
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return &ucomisd[TARGET_AVX ? 0 : 1];
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return "%vucomisd\t{%1, %0|%0, %1}";
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else
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else
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return &comisd[TARGET_AVX ? 0 : 1];
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return "%vcomisd\t{%1, %0|%0, %1}";
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}
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}
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gcc_assert (STACK_TOP_P (cmp_op0));
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gcc_assert (STACK_TOP_P (cmp_op0));
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@ -1483,7 +1483,8 @@
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(unspec:HI [(reg:CCFP FPSR_REG)] UNSPEC_FNSTSW))]
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(unspec:HI [(reg:CCFP FPSR_REG)] UNSPEC_FNSTSW))]
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"TARGET_80387"
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"TARGET_80387"
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"fnstsw\t%0"
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"fnstsw\t%0"
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[(set (attr "length") (symbol_ref "ix86_attr_length_address_default (insn) + 2"))
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[(set (attr "length")
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(symbol_ref "ix86_attr_length_address_default (insn) + 2"))
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(set_attr "mode" "SI")
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(set_attr "mode" "SI")
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(set_attr "unit" "i387")])
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(set_attr "unit" "i387")])
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@ -1510,7 +1511,8 @@
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(set_attr "mode" "SI")])
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(set_attr "mode" "SI")])
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;; Pentium Pro can do steps 1 through 3 in one go.
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;; Pentium Pro can do steps 1 through 3 in one go.
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;; comi*, ucomi*, fcomi*, ficomi*,fucomi* (i387 instructions set condition codes)
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;; comi*, ucomi*, fcomi*, ficomi*, fucomi*
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;; (these i387 instructions set flags directly)
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(define_insn "*cmpfp_i_mixed"
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(define_insn "*cmpfp_i_mixed"
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[(set (reg:CCFP FLAGS_REG)
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[(set (reg:CCFP FLAGS_REG)
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(compare:CCFP (match_operand 0 "register_operand" "f,x")
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(compare:CCFP (match_operand 0 "register_operand" "f,x")
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@ -3028,7 +3030,17 @@
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gcc_unreachable();
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gcc_unreachable();
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}
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}
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}
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}
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[(set_attr "type" "fmov,fmov,fmov,imov,imov,imov,multi,sselog1,ssemov,ssemov,ssemov,ssemov,ssemov")
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[(set (attr "type")
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(cond [(eq_attr "alternative" "0,1,2")
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(const_string "fmov")
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(eq_attr "alternative" "3,4,5")
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(const_string "imov")
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(eq_attr "alternative" "6")
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(const_string "multi")
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(eq_attr "alternative" "7")
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(const_string "sselog1")
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]
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(const_string "ssemov")))
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(set (attr "modrm")
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(set (attr "modrm")
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(if_then_else
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(if_then_else
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(and (eq_attr "alternative" "5") (eq_attr "type" "imov"))
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(and (eq_attr "alternative" "5") (eq_attr "type" "imov"))
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@ -3158,7 +3170,15 @@
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(if_then_else (eq_attr "alternative" "5,6,7,8")
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(if_then_else (eq_attr "alternative" "5,6,7,8")
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(const_string "sse2")
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(const_string "sse2")
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(const_string "*")))
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(const_string "*")))
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(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
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(set (attr "type")
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(cond [(eq_attr "alternative" "0,1,2")
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(const_string "fmov")
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(eq_attr "alternative" "3,4")
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(const_string "multi")
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(eq_attr "alternative" "5,9")
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(const_string "sselog1")
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]
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(const_string "ssemov")))
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(set (attr "prefix")
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(set (attr "prefix")
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(if_then_else (eq_attr "alternative" "0,1,2,3,4")
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(if_then_else (eq_attr "alternative" "0,1,2,3,4")
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(const_string "orig")
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(const_string "orig")
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gcc_unreachable ();
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gcc_unreachable ();
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}
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}
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}
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}
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[(set_attr "type" "fmov,fmov,fmov,imov,imov,sselog1,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov,ssemov,ssemov,mmxmov,mmxmov")
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[(set (attr "type")
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(cond [(eq_attr "alternative" "0,1,2")
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(const_string "fmov")
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(eq_attr "alternative" "3,4")
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(const_string "multi")
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(eq_attr "alternative" "5")
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(const_string "sselog1")
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(eq_attr "alternative" "9,10,11,14,15")
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(const_string "mmxmov")
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]
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(const_string "ssemov")))
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(set (attr "prefix")
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(set (attr "prefix")
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(if_then_else (eq_attr "alternative" "5,6,7,8,12,13")
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(if_then_else (eq_attr "alternative" "5,6,7,8,12,13")
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(const_string "maybe_vex")
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(const_string "maybe_vex")
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@ -78,7 +78,7 @@
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2011-09-11 Thomas Koenig <tkoenig@gcc.gnu.org>
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2011-09-11 Thomas Koenig <tkoenig@gcc.gnu.org>
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PR fortran/50327
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PR fortran/50327
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* gfortran.dg/do_while_1.f90: New test.
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* gfortran.dg/do_while_1.f90: New test.
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2011-09-11 Janus Weil <janus@gcc.gnu.org>
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2011-09-11 Janus Weil <janus@gcc.gnu.org>
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