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target-supports.exp (check_effective_target_mips_llsc): New. 

gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_mips_llsc): New.
	(check_effective_target_sync_int_long): Use it.
	(check_effective_target_sync_char_short): Likewise.
	* gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc.

From-SVN: r183909
This commit is contained in:
Richard Sandiford 2012-02-05 14:53:09 +00:00 committed by Richard Sandiford
parent 7bd8c53f50
commit 16955e8bf0
3 changed files with 30 additions and 3 deletions
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7
gcc/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2012-02-05 Richard Sandiford <rdsandiford@googlemail.com>
* lib/target-supports.exp (check_effective_target_mips_llsc): New.
(check_effective_target_sync_int_long): Use it.
(check_effective_target_sync_char_short): Likewise.
* gcc.target/mips/atomic-memory-1.c: Restrict error check to mips_llsc.
2012-02-05 Tobias Burnus <burnus@net-b.de>
PR fortran/51972

2
gcc/testsuite/gcc.target/mips/atomic-memory-1.c
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@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target mips_llsc } 0 } */
extern void abort (void);
extern void exit (int);

24
gcc/testsuite/lib/target-supports.exp
View File

@ -890,6 +890,26 @@ proc check_effective_target_mips_newabi_large_long_double { } {
} "-mabi=64"]
}
# Return true if the target is a MIPS target that has access
# to the LL and SC instructions.
proc check_effective_target_mips_llsc { } {
if { ![istarget mips*-*-*] } {
return 0
}
# Assume that these instructions are always implemented for
# non-elf* targets, via emulation if necessary.
if { ![istarget *-*-elf*] } {
return 1
}
# Otherwise assume LL/SC support for everything but MIPS I.
return [check_no_compiler_messages mips_llsc assembly {
#if __mips == 1
#error FOO
#endif
}]
}
# Return 1 if the current multilib does not generate PIC by default.
proc check_effective_target_nonpic { } {
@ -3770,7 +3790,7 @@ proc check_effective_target_sync_int_long { } {
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
|| [istarget sparcv9-*-*]
|| [istarget mips*-*-*] } {
|| [check_effective_target_mips_llsc] } {
set et_sync_int_long_saved 1
}
}
@ -3800,7 +3820,7 @@ proc check_effective_target_sync_char_short { } {
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
|| [istarget sparcv9-*-*]
|| [istarget mips*-*-*] } {
|| [check_effective_target_mips_llsc] } {
set et_sync_char_short_saved 1
}
}