re PR target/56995 (sh4 -mfmovd: ICE in find_costs_and_classes)
2013-04-18 Christian Bruel <christian.bruel@st.com> PR target/56995 * config/sh/sh.h (enum reg_class): Remove DF_HI_REGS. (REG_CLASS_NAMES): Idem. (REG_CLASS_CONTENTS): Idem. (REGCLASS_HAS_FP_REG): Idem. * config/sh/sh.c (sh_cannot_change_mode_class): Idem. (sh_conditional_register_usage): Idem. From-SVN: r198123
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@ -1,3 +1,13 @@
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2013-04-18 Christian Bruel <christian.bruel@st.com>
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PR target/56995
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* config/sh/sh.h (enum reg_class): Remove DF_HI_REGS.
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(REG_CLASS_NAMES): Idem.
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(REG_CLASS_CONTENTS): Idem.
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(REGCLASS_HAS_FP_REG): Idem.
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* config/sh/sh.c (sh_cannot_change_mode_class): Idem.
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(sh_conditional_register_usage): Idem.
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2013-04-21 Jeff Law <law@redhat.com>
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* tree-ssa-forwprop.c (simplify_conversion_from_bitmask): New function.
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@ -12163,7 +12163,7 @@ sh_cannot_change_mode_class (enum machine_mode from, enum machine_mode to,
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else
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{
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if (GET_MODE_SIZE (from) < 8)
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return reg_classes_intersect_p (DF_HI_REGS, rclass);
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return reg_classes_intersect_p (DF_REGS, rclass);
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}
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}
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return false;
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@ -13210,9 +13210,7 @@ sh_conditional_register_usage (void)
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call_really_used_regs[MACH_REG] = 0;
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call_really_used_regs[MACL_REG] = 0;
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}
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for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0);
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regno <= LAST_FP_REG; regno += 2)
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SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno);
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if (TARGET_SHMEDIA)
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{
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for (regno = FIRST_TARGET_REG; regno <= LAST_TARGET_REG; regno ++)
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@ -984,7 +984,6 @@ enum reg_class
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GENERAL_REGS,
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FP0_REGS,
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FP_REGS,
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DF_HI_REGS,
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DF_REGS,
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FPSCR_REGS,
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GENERAL_FP_REGS,
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@ -1010,7 +1009,6 @@ enum reg_class
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"GENERAL_REGS", \
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"FP0_REGS", \
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"FP_REGS", \
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"DF_HI_REGS", \
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"DF_REGS", \
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"FPSCR_REGS", \
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"GENERAL_FP_REGS", \
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@ -1046,8 +1044,6 @@ enum reg_class
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{ 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000 }, \
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/* FP_REGS: */ \
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{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000 }, \
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/* DF_HI_REGS: Initialized in TARGET_CONDITIONAL_REGISTER_USAGE. */ \
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{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 }, \
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/* DF_REGS: */ \
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{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 }, \
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/* FPSCR_REGS: */ \
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@ -1922,7 +1918,7 @@ struct sh_args {
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#define REGCLASS_HAS_FP_REG(CLASS) \
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((CLASS) == FP0_REGS || (CLASS) == FP_REGS \
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|| (CLASS) == DF_REGS || (CLASS) == DF_HI_REGS)
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|| (CLASS) == DF_REGS)
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/* ??? Perhaps make MEMORY_MOVE_COST depend on compiler option? This
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would be so that people with slow memory systems could generate
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@ -1,3 +1,8 @@
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2013-04-18 Christian Bruel <christian.bruel@st.com>
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PR target/56995
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* gcc.target/sh/mfmovd.c: Add new function and check hard_float.
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2013-04-21 Jeff Law <law@redhat.com>
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* gcc.dg/tree-ssa/forwprop-26.c: New test.
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@ -1,8 +1,9 @@
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/* Verify that we generate fmov.d instructions to move doubles when -mfmovd
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option is enabled. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-require-effective-target hard_float } */
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/* { dg-options "-mfmovd" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a" "-m2a-single" "-m4" "-m4-single" "-m4-100" "-m4-100-single" "-m4-200" "-m4-200-single" "-m4-300" "-m4-300-single" "-m4a" "-m4a-single" } } */
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/* { dg-skip-if "" { *-*-* } { "*-single-only" } { "" } } */
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/* { dg-final { scan-assembler "fmov.d" } } */
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extern double g;
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@ -13,3 +14,9 @@ f (double d)
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g = d;
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}
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extern float h;
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void f2 ()
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{
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h = g;
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}
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