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rs6000: Improve *lt0 patterns

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The rs6000 port currently has an *lt0_disi define_insn, setting the DI
result to whether the SI argument is negative or not.  It turns out the
generic optimisers cannot always figure out in the other cases either
that this is just a shift for us.  This patch adds patterns for all
four SI/DI combinations.


	* config/rs6000/rs6000.md (*lt0_disi): Delete.
	(*lt0_<mode>di, *lt0_<mode>si): New.

From-SVN: r254374
This commit is contained in:
Segher Boessenkool 2017-11-03 15:09:10 +01:00 committed by Segher Boessenkool
parent b15a4bc972
commit 187bd6cd5e
2 changed files with 17 additions and 4 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2017-11-03 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (*lt0_disi): Delete.
(*lt0_<mode>di, *lt0_<mode>si): New.
2017-11-03 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (move_from_CR_ov_bit): Change condition to

16
gcc/config/rs6000/rs6000.md
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@ -3829,11 +3829,19 @@
; Special case for less-than-0. We can do it with just one machine
; instruction, but the generic optimizers do not realise it is cheap.
(define_insn "*lt0_disi"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(lt:DI (match_operand:SI 1 "gpc_reg_operand" "r")
(const_int 0)))]
(define_insn "*lt0_<mode>di"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(lt:GPR (match_operand:DI 1 "gpc_reg_operand" "r")
(const_int 0)))]
"TARGET_POWERPC64"
"srdi %0,%1,63"
[(set_attr "type" "shift")])
(define_insn "*lt0_<mode>si"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(lt:GPR (match_operand:SI 1 "gpc_reg_operand" "r")
(const_int 0)))]
""
"rlwinm %0,%1,1,31,31"
[(set_attr "type" "shift")])