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AVX-512. Use `Yv' for SF mode operand in vec_concat pattern.

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gcc/
	* config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'
	constraint fot SF mode.

From-SVN: r236363
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Kirill Yukhin 2016-05-18 09:11:10 +00:00 committed by Kirill Yukhin
parent fef31922aa
commit 1889406050
2 changed files with 8 additions and 3 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2016-05-18 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'
constraint fot SF mode.
2016-05-18 Petr Murzin <petr.murzin@intel.com> 2016-05-18 Petr Murzin <petr.murzin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com>

6
gcc/config/i386/sse.md
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@ -6546,12 +6546,12 @@
;; unpcklps with register source since it is shorter. ;; unpcklps with register source since it is shorter.
(define_insn "*vec_concatv2sf_sse4_1" (define_insn "*vec_concatv2sf_sse4_1"
[(set (match_operand:V2SF 0 "register_operand" [(set (match_operand:V2SF 0 "register_operand"
"=Yr,*x,v,Yr,*x,v,v,*y ,*y") "=Yr,*x, v,Yr,*x,v,v,*y ,*y")
(vec_concat:V2SF (vec_concat:V2SF
(match_operand:SF 1 "nonimmediate_operand" (match_operand:SF 1 "nonimmediate_operand"
" 0, 0,v, 0,0, v,m, 0 , m") " 0, 0,Yv, 0,0, v,m, 0 , m")
(match_operand:SF 2 "vector_move_operand" (match_operand:SF 2 "vector_move_operand"
" Yr,*x,v, m,m, m,C,*ym, C")))] " Yr,*x,Yv, m,m, m,C,*ym, C")))]
"TARGET_SSE4_1 && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "TARGET_SSE4_1 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
"@ "@
unpcklps\t{%2, %0|%0, %2} unpcklps\t{%2, %0|%0, %2}