re PR rtl-optimization/33927 (replace_read in dse.c could handle cases where GET_MODE_CLASS (read_mode) != GET_MODE_CLASS (store_mode) (and the size is the same))
gcc/ PR rtl-optimization/33927 * Makefile.in (dse.o): Depend on $(TM_P_H). * expr.h (extract_low_bits): Declare. * expmed.c (extract_low_bits): New function. * rtlhooks.c (gen_lowpart_general): Generalize SUBREG handling. * dse.c: Include tm_p.h. (find_shift_sequence): Remove the read_reg argument and return the read value. Emit the instructions instead of returning them. Iterate on new_mode rather than calculating it each time. Check MODES_TIEABLE_P. Use simplify_gen_subreg to convert the source to NEW_MODE and extract_low_bits to convert the shifted value to READ_MODE. (replace_read): Allow the load and store to have different mode classes. Use extract_low_bits when SHIFT == 0. Create the shift or extraction instructions before trying the replacement. Update dump-file code accordingly, avoiding use of REGNO (store_info->rhs). gcc/testsuite/ * gcc.target/mips/dse-1.c: Add checks for zeros. From-SVN: r133452
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
48e55066d5
commit
18b526e806
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@ -1,3 +1,22 @@
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2008-03-22 Richard Sandiford <rsandifo@nildram.co.uk>
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PR rtl-optimization/33927
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* Makefile.in (dse.o): Depend on $(TM_P_H).
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* expr.h (extract_low_bits): Declare.
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* expmed.c (extract_low_bits): New function.
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* rtlhooks.c (gen_lowpart_general): Generalize SUBREG handling.
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* dse.c: Include tm_p.h.
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(find_shift_sequence): Remove the read_reg argument and return the
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read value. Emit the instructions instead of returning them.
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Iterate on new_mode rather than calculating it each time.
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Check MODES_TIEABLE_P. Use simplify_gen_subreg to convert the
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source to NEW_MODE and extract_low_bits to convert the shifted
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value to READ_MODE.
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(replace_read): Allow the load and store to have different mode
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classes. Use extract_low_bits when SHIFT == 0. Create the shift
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or extraction instructions before trying the replacement. Update
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dump-file code accordingly, avoiding use of REGNO (store_info->rhs).
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2008-03-22 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (assign_386_stack_local): Align DImode slots
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@ -2555,8 +2555,8 @@ dce.o : dce.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
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$(TREE_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) $(DF_H) cselib.h \
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$(DBGCNT_H) dce.h timevar.h tree-pass.h $(DBGCNT_H)
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dse.o : dse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
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$(TREE_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h $(RECOG_H) \
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$(EXPR_H) $(DF_H) cselib.h $(DBGCNT_H) timevar.h tree-pass.h \
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$(TREE_H) $(TM_P_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h \
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$(RECOG_H) $(EXPR_H) $(DF_H) cselib.h $(DBGCNT_H) timevar.h tree-pass.h \
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alloc-pool.h $(ALIAS_H) dse.h $(OPTABS_H)
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fwprop.o : fwprop.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
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toplev.h insn-config.h $(RECOG_H) $(FLAGS_H) $(OBSTACK_H) $(BASIC_BLOCK_H) \
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157
gcc/dse.c
157
gcc/dse.c
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@ -29,6 +29,7 @@ along with GCC; see the file COPYING3. If not see
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#include "tm.h"
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#include "rtl.h"
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#include "tree.h"
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#include "tm_p.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "flags.h"
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@ -1383,9 +1384,9 @@ record_store (rtx body, bb_info_t bb_info)
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if (store_info->is_set
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/* No place to keep the value after ra. */
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&& !reload_completed
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/* The careful reviewer may wish to comment my checking that the
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rhs of a store is always a reg. */
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&& REG_P (SET_SRC (body))
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&& (REG_P (SET_SRC (body))
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|| GET_CODE (SET_SRC (body)) == SUBREG
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|| CONSTANT_P (SET_SRC (body)))
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/* Sometimes the store and reload is used for truncation and
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rounding. */
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&& !(FLOAT_MODE_P (GET_MODE (mem)) && (flag_float_store)))
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@ -1418,15 +1419,15 @@ dump_insn_info (const char * start, insn_info_t insn_info)
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shift. */
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static rtx
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find_shift_sequence (rtx read_reg,
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int access_size,
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find_shift_sequence (int access_size,
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store_info_t store_info,
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read_info_t read_info,
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int shift)
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{
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enum machine_mode store_mode = GET_MODE (store_info->mem);
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enum machine_mode read_mode = GET_MODE (read_info->mem);
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rtx chosen_seq = NULL;
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enum machine_mode new_mode;
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rtx read_reg = NULL;
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/* Some machines like the x86 have shift insns for each size of
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operand. Other machines like the ppc or the ia-64 may only have
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@ -1435,21 +1436,31 @@ find_shift_sequence (rtx read_reg,
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justify the value we want to read but is available in one insn on
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the machine. */
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for (; access_size <= UNITS_PER_WORD; access_size *= 2)
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for (new_mode = smallest_mode_for_size (access_size * BITS_PER_UNIT,
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MODE_INT);
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GET_MODE_BITSIZE (new_mode) <= BITS_PER_WORD;
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new_mode = GET_MODE_WIDER_MODE (new_mode))
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{
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rtx target, new_reg, shift_seq, insn;
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enum machine_mode new_mode;
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rtx target, new_reg, shift_seq, insn, new_lhs;
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int cost;
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/* Try a wider mode if truncating the store mode to ACCESS_SIZE
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bytes requires a real instruction. */
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if (access_size < GET_MODE_SIZE (store_mode)
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&& !TRULY_NOOP_TRUNCATION (access_size * BITS_PER_UNIT,
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/* Try a wider mode if truncating the store mode to NEW_MODE
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requires a real instruction. */
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if (GET_MODE_BITSIZE (new_mode) < GET_MODE_BITSIZE (store_mode)
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&& !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (new_mode),
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GET_MODE_BITSIZE (store_mode)))
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continue;
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new_mode = smallest_mode_for_size (access_size * BITS_PER_UNIT,
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MODE_INT);
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/* Also try a wider mode if the necessary punning is either not
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desirable or not possible. */
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if (!CONSTANT_P (store_info->rhs)
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&& !MODES_TIEABLE_P (new_mode, store_mode))
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continue;
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new_lhs = simplify_gen_subreg (new_mode, copy_rtx (store_info->rhs),
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store_mode, 0);
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if (new_lhs == NULL_RTX)
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continue;
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new_reg = gen_reg_rtx (new_mode);
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start_sequence ();
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@ -1485,31 +1496,13 @@ find_shift_sequence (rtx read_reg,
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take the value from the store and put it into the
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shift pseudo, then shift it, then generate another
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move to put in into the target of the read. */
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start_sequence ();
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emit_move_insn (new_reg, gen_lowpart (new_mode, store_info->rhs));
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emit_move_insn (new_reg, new_lhs);
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emit_insn (shift_seq);
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convert_move (read_reg, new_reg, 1);
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if (dump_file)
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{
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fprintf (dump_file, " -- adding extract insn r%d:%s = r%d:%s\n",
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REGNO (new_reg), GET_MODE_NAME (new_mode),
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REGNO (store_info->rhs), GET_MODE_NAME (store_mode));
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fprintf (dump_file, " -- with shift of r%d by %d\n",
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REGNO(new_reg), shift);
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fprintf (dump_file, " -- and second extract insn r%d:%s = r%d:%s\n",
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REGNO (read_reg), GET_MODE_NAME (read_mode),
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REGNO (new_reg), GET_MODE_NAME (new_mode));
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}
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/* Get the three insn sequence and return it. */
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chosen_seq = get_insns ();
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end_sequence ();
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read_reg = extract_low_bits (read_mode, new_mode, new_reg);
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break;
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}
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return chosen_seq;
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return read_reg;
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}
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@ -1552,16 +1545,11 @@ replace_read (store_info_t store_info, insn_info_t store_insn,
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enum machine_mode read_mode = GET_MODE (read_info->mem);
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int shift;
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int access_size; /* In bytes. */
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rtx read_reg = gen_reg_rtx (read_mode);
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rtx shift_seq = NULL;
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rtx insns, read_reg;
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if (!dbg_cnt (dse))
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return false;
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if (GET_MODE_CLASS (read_mode) != MODE_INT
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|| GET_MODE_CLASS (store_mode) != MODE_INT)
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return false;
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/* To get here the read is within the boundaries of the write so
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shift will never be negative. Start out with the shift being in
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bytes. */
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@ -1575,62 +1563,43 @@ replace_read (store_info_t store_info, insn_info_t store_insn,
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/* From now on it is bits. */
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shift *= BITS_PER_UNIT;
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/* We need to keep this in perspective. We are replacing a read
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/* Create a sequence of instructions to set up the read register.
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This sequence goes immediately before the store and its result
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is read by the load.
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We need to keep this in perspective. We are replacing a read
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with a sequence of insns, but the read will almost certainly be
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in cache, so it is not going to be an expensive one. Thus, we
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are not willing to do a multi insn shift or worse a subroutine
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call to get rid of the read. */
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if (shift)
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{
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if (access_size > UNITS_PER_WORD)
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return false;
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shift_seq = find_shift_sequence (read_reg, access_size, store_info,
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read_info, shift);
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if (!shift_seq)
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return false;
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}
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if (dump_file)
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fprintf (dump_file, "replacing load at %d from store at %d\n",
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INSN_UID (read_insn->insn), INSN_UID (store_insn->insn));
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fprintf (dump_file, "trying to replace %smode load in insn %d"
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" from %smode store in insn %d\n",
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GET_MODE_NAME (read_mode), INSN_UID (read_insn->insn),
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GET_MODE_NAME (store_mode), INSN_UID (store_insn->insn));
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start_sequence ();
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if (shift)
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read_reg = find_shift_sequence (access_size, store_info, read_info, shift);
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else
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read_reg = extract_low_bits (read_mode, store_mode,
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copy_rtx (store_info->rhs));
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if (read_reg == NULL_RTX)
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{
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end_sequence ();
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if (dump_file)
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fprintf (dump_file, " -- could not extract bits of stored value\n");
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return false;
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}
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/* Force the value into a new register so that it won't be clobbered
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between the store and the load. */
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read_reg = copy_to_mode_reg (read_mode, read_reg);
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insns = get_insns ();
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end_sequence ();
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if (validate_change (read_insn->insn, loc, read_reg, 0))
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{
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rtx insns;
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deferred_change_t deferred_change = pool_alloc (deferred_change_pool);
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if (read_mode == store_mode)
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{
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start_sequence ();
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/* The modes are the same and everything lines up. Just
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generate a simple move. */
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emit_move_insn (read_reg, store_info->rhs);
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if (dump_file)
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fprintf (dump_file, " -- adding move insn r%d = r%d\n",
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REGNO (read_reg), REGNO (store_info->rhs));
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insns = get_insns ();
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end_sequence ();
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}
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else if (shift)
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insns = shift_seq;
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else
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{
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/* The modes are different but the lsb are in the same
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place, we need to extract the value in the right from the
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rhs of the store. */
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start_sequence ();
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convert_move (read_reg, store_info->rhs, 1);
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if (dump_file)
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fprintf (dump_file, " -- adding extract insn r%d:%s = r%d:%s\n",
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REGNO (read_reg), GET_MODE_NAME (read_mode),
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REGNO (store_info->rhs), GET_MODE_NAME (store_mode));
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insns = get_insns ();
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end_sequence ();
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}
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/* Insert this right before the store insn where it will be safe
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from later insns that might change it before the read. */
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emit_insn_before (insns, store_insn->insn);
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@ -1668,12 +1637,22 @@ replace_read (store_info_t store_info, insn_info_t store_insn,
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rest of dse, play like this read never happened. */
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read_insn->read_rec = read_info->next;
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pool_free (read_info_pool, read_info);
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if (dump_file)
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{
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fprintf (dump_file, " -- replaced the loaded MEM with ");
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print_simple_rtl (dump_file, read_reg);
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fprintf (dump_file, "\n");
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}
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return true;
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}
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else
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{
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if (dump_file)
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fprintf (dump_file, " -- validation failure\n");
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{
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fprintf (dump_file, " -- replacing the loaded MEM with ");
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print_simple_rtl (dump_file, read_reg);
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fprintf (dump_file, " led to an invalid instruction\n");
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}
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return false;
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}
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}
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60
gcc/expmed.c
60
gcc/expmed.c
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@ -2098,6 +2098,66 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
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NULL_RTX, 0);
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}
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/* Try to read the low bits of SRC as an rvalue of mode MODE, preserving
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the bit pattern. SRC_MODE is the mode of SRC; if this is smaller than
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MODE, fill the upper bits with zeros. Fail if the layout of either
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mode is unknown (as for CC modes) or if the extraction would involve
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unprofitable mode punning. Return the value on success, otherwise
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return null.
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This is different from gen_lowpart* in these respects:
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- the returned value must always be considered an rvalue
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- when MODE is wider than SRC_MODE, the extraction involves
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a zero extension
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- when MODE is smaller than SRC_MODE, the extraction involves
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a truncation (and is thus subject to TRULY_NOOP_TRUNCATION).
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In other words, this routine performs a computation, whereas the
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gen_lowpart* routines are conceptually lvalue or rvalue subreg
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operations. */
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rtx
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extract_low_bits (enum machine_mode mode, enum machine_mode src_mode, rtx src)
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{
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enum machine_mode int_mode, src_int_mode;
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if (mode == src_mode)
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return src;
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if (CONSTANT_P (src))
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return simplify_gen_subreg (mode, src, src_mode,
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subreg_lowpart_offset (mode, src_mode));
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if (GET_MODE_CLASS (mode) == MODE_CC || GET_MODE_CLASS (src_mode) == MODE_CC)
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return NULL_RTX;
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if (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (src_mode)
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&& MODES_TIEABLE_P (mode, src_mode))
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{
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rtx x = gen_lowpart_common (mode, src);
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if (x)
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return x;
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}
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src_int_mode = int_mode_for_mode (src_mode);
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int_mode = int_mode_for_mode (mode);
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if (src_int_mode == BLKmode || int_mode == BLKmode)
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return NULL_RTX;
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if (!MODES_TIEABLE_P (src_int_mode, src_mode))
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return NULL_RTX;
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if (!MODES_TIEABLE_P (int_mode, mode))
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return NULL_RTX;
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src = gen_lowpart (src_int_mode, src);
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src = convert_modes (int_mode, src_int_mode, src, true);
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src = gen_lowpart (mode, src);
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return src;
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}
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/* Add INC into TARGET. */
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void
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@ -744,6 +744,7 @@ extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
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extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
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unsigned HOST_WIDE_INT, int, rtx,
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enum machine_mode, enum machine_mode);
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extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
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extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
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extern rtx expand_mult_highpart_adjust (enum machine_mode, rtx, rtx, rtx, rtx, int);
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@ -43,11 +43,9 @@ gen_lowpart_general (enum machine_mode mode, rtx x)
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if (result)
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return result;
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/* If it's a REG, it must be a hard reg that's not valid in MODE. */
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else if (REG_P (x)
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/* Or we could have a subreg of a floating point value. */
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|| (GET_CODE (x) == SUBREG
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&& FLOAT_MODE_P (GET_MODE (SUBREG_REG (x)))))
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/* Handle SUBREGs and hard REGs that were rejected by
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simplify_gen_subreg. */
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else if (REG_P (x) || GET_CODE (x) == SUBREG)
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{
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result = gen_lowpart_common (mode, copy_to_reg (x));
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gcc_assert (result != 0);
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@ -1,3 +1,7 @@
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2008-03-22 Richard Sandiford <rsandifo@nildram.co.uk>
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* gcc.target/mips/dse-1.c: Add checks for zeros.
|
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2008-03-21 Andrew Pinski <andrew_pinski@playstation.sony.com>
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PR target/27946
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|
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@ -1,7 +1,4 @@
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/* ??? Further to the subreg comment below, we can't rely on any of the
|
||||
tests passing unless we handle subregs, and the patch to do so has
|
||||
been rejected for the time being. */
|
||||
/* { dg-do compile { target { ! *-*-* } } } */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-mgp64 -O" } */
|
||||
|
||||
#define TEST(ID, TYPE1, TYPE2) \
|
||||
|
|
@ -18,6 +15,13 @@
|
|||
u->m2 = x; \
|
||||
return (u->m1[0] \
|
||||
+ u->m1[sizeof (TYPE2) / sizeof (TYPE1) - 1]); \
|
||||
} \
|
||||
\
|
||||
TYPE1 __attribute__((nomips16)) \
|
||||
g##ID (union u##ID *u) \
|
||||
{ \
|
||||
u->m2 = 0; \
|
||||
return (u->m1[0] | u->m1[1]); \
|
||||
}
|
||||
|
||||
TEST (1, unsigned int, unsigned long long);
|
||||
|
|
@ -32,8 +36,8 @@ TEST (8, short, int);
|
|||
TEST (9, unsigned char, unsigned int);
|
||||
TEST (10, signed char, int);
|
||||
|
||||
/* DSE isn't yet read to consider stores of subregs, so the corresponding
|
||||
(char, short) tests won't pass. */
|
||||
TEST (11, unsigned char, unsigned short);
|
||||
TEST (12, signed char, short);
|
||||
|
||||
/* { dg-final { scan-assembler-not "\tlh\t" } } */
|
||||
/* { dg-final { scan-assembler-not "\tlhu\t" } } */
|
||||
|
|
|
|||
Loading…
Reference in New Issue