From 18e86fae2a14f78e70aae06afce6bb9853068bb1 Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Sun, 20 Dec 2020 02:23:12 -0800
Subject: [PATCH] gcc: xtensa: implement bswapsi2, bswapdi2 and helpers

2020-12-20  Max Filippov  <jcmvbkbc@gmail.com>
gcc/
	* config/xtensa/xtensa.md (bswapsi2, bswapdi2): New patterns.

gcc/testsuite/
	* gcc.target/xtensa/bswap.c: New test.

libgcc/
	* config/xtensa/lib1funcs.S (__bswapsi2, __bswapdi2): New
	functions.
	* config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _bswapsi2 and
	_bswapdi2.
---
 gcc/config/xtensa/xtensa.md             | 21 +++++++++++++
 gcc/testsuite/gcc.target/xtensa/bswap.c | 14 +++++++++
 libgcc/config/xtensa/lib1funcs.S        | 39 +++++++++++++++++++++++++
 libgcc/config/xtensa/t-xtensa           |  1 +
 4 files changed, 75 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/xtensa/bswap.c

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 462a7244a35..cfb6a546d92 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -468,6 +468,27 @@
   DONE;
 })
 
+
+;; Byte swap.
+
+(define_insn "bswapsi2"
+  [(set (match_operand:SI 0 "register_operand" "=&a")
+	(bswap:SI (match_operand:SI 1 "register_operand" "r")))]
+  "!optimize_size"
+  "ssai\t8\;srli\t%0, %1, 16\;src\t%0, %0, %1\;src\t%0, %0, %0\;src\t%0, %1, %0"
+  [(set_attr "type"	"arith")
+   (set_attr "mode"	"SI")
+   (set_attr "length"	"15")])
+
+(define_insn "bswapdi2"
+  [(set (match_operand:DI 0 "register_operand" "=&a")
+	(bswap:DI (match_operand:DI 1 "register_operand" "r")))]
+  "!optimize_size"
+  "ssai\t8\;srli\t%0, %D1, 16\;src\t%0, %0, %D1\;src\t%0, %0, %0\;src\t%0, %D1, %0\;srli\t%D0, %1, 16\;src\t%D0, %D0, %1\;src\t%D0, %D0, %D0\;src\t%D0, %1, %D0"
+  [(set_attr "type"	"arith")
+   (set_attr "mode"	"DI")
+   (set_attr "length"	"27")])
+
 
 ;; Negation and one's complement.
 
diff --git a/gcc/testsuite/gcc.target/xtensa/bswap.c b/gcc/testsuite/gcc.target/xtensa/bswap.c
new file mode 100644
index 00000000000..057a3569703
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/bswap.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+unsigned long f32(unsigned long v)
+{
+  return __builtin_bswap32(v);
+}
+
+unsigned long long f64(unsigned long long v)
+{
+  return __builtin_bswap64(v);
+}
+
+/* { dg-final { scan-assembler-times "ssai" 2 } } */
diff --git a/libgcc/config/xtensa/lib1funcs.S b/libgcc/config/xtensa/lib1funcs.S
index 77e78885d84..b19deae1448 100644
--- a/libgcc/config/xtensa/lib1funcs.S
+++ b/libgcc/config/xtensa/lib1funcs.S
@@ -840,5 +840,44 @@ __lshrdi3:
 #endif /* L_lshrdi3 */
 
 
+#ifdef L_bswapsi2
+	.align	4
+	.global	__bswapsi2
+	.type	__bswapsi2, @function
+__bswapsi2:
+	leaf_entry sp, 16
+	ssai	8
+	srli	a3, a2, 16
+	src	a3, a3, a2
+	src	a3, a3, a3
+	src	a2, a2, a3
+	leaf_return
+	.size	__bswapsi2, . - __bswapsi2
+
+#endif /* L_bswapsi2 */
+
+
+#ifdef L_bswapdi2
+	.align	4
+	.global	__bswapdi2
+	.type	__bswapdi2, @function
+__bswapdi2:
+	leaf_entry sp, 16
+	ssai	8
+	srli	a4, a2, 16
+	src	a4, a4, a2
+	src	a4, a4, a4
+	src	a4, a2, a4
+	srli	a2, a3, 16
+	src	a2, a2, a3
+	src	a2, a2, a2
+	src	a2, a3, a2
+	mov	a3, a4
+	leaf_return
+	.size	__bswapdi2, . - __bswapdi2
+
+#endif /* L_bswapdi2 */
+
+
 #include "ieee754-df.S"
 #include "ieee754-sf.S"
diff --git a/libgcc/config/xtensa/t-xtensa b/libgcc/config/xtensa/t-xtensa
index 90df5f15daa..9836c96aefc 100644
--- a/libgcc/config/xtensa/t-xtensa
+++ b/libgcc/config/xtensa/t-xtensa
@@ -2,6 +2,7 @@ LIB1ASMSRC = xtensa/lib1funcs.S
 LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3 _udivsi3 _umodsi3 \
 	_umulsidi3 _clz _clzsi2 _ctzsi2 _ffssi2 \
 	_ashldi3 _ashrdi3 _lshrdi3 \
+	_bswapsi2 _bswapdi2 \
 	_negsf2 _addsubsf3 _mulsf3 _divsf3 _cmpsf2 _fixsfsi _fixsfdi \
 	_fixunssfsi _fixunssfdi _floatsisf _floatunsisf \
 	_sqrtf _recipsf2 _rsqrtsf2 \