visium.md (type): Add trap.
* config/visium/visium.md (type): Add trap. (b): New mode attribute. (*btst): Rename into... (*btst<mode>): ...this and adjust. (*cbranchsi4_btst_insn): Rename into... (*cbranch<mode>4_btst_insn): ...this and adjust. (trap): New define_insn. From-SVN: r245691
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ada61c3d47
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195610aaa0
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@ -1,3 +1,13 @@
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2017-02-23 Eric Botcazou <ebotcazou@adacore.com>
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* config/visium/visium.md (type): Add trap.
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(b): New mode attribute.
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(*btst): Rename into...
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(*btst<mode>): ...this and adjust.
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(*cbranchsi4_btst_insn): Rename into...
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(*cbranch<mode>4_btst_insn): ...this and adjust.
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(trap): New define_insn.
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2017-02-23 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/79389
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@ -137,9 +137,10 @@
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;nop No operation.
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;multi Multiple instructions which split.
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;asm User asm instructions.
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;trap Trap instructions.
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(define_attr "type"
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"imm_reg,mem_reg,eam_reg,fp_reg,reg_mem,reg_eam,reg_fp,arith,arith2,logic,abs_branch,branch,bmi,call,ret,rfi,dsi,cmp,div,divd,mul,shiftdi,fdiv,fsqrt,ftoi,itof,fmove,fcmp,fp,nop,multi,asm" (const_string "logic"))
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"imm_reg,mem_reg,eam_reg,fp_reg,reg_mem,reg_eam,reg_fp,arith,arith2,logic,abs_branch,branch,bmi,call,ret,rfi,dsi,cmp,div,divd,mul,shiftdi,fdiv,fsqrt,ftoi,itof,fmove,fcmp,fp,nop,multi,asm,trap" (const_string "logic"))
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; Those insns that occupy 4 bytes.
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(define_attr "single_insn" "no,yes"
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@ -205,6 +206,7 @@
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(define_mode_iterator QHI [QI HI])
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(define_mode_iterator I [QI HI SI])
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(define_mode_attr b [(QI "8") (HI "16") (SI "32")])
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(define_mode_attr s [(QI ".b") (HI ".w") (SI ".l")])
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; This code iterator allows signed and unsigned widening multiplications
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@ -1986,15 +1988,15 @@
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; BITS_BIG_ENDIAN is defined to 1 so operand #1 counts from the MSB.
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(define_insn "*btst"
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(define_insn "*btst<mode>"
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[(set (reg:CCC R_FLAGS)
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(compare:CCC (zero_extract:SI
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(match_operand:SI 0 "register_operand" "r")
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(compare:CCC (zero_extract:I
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(match_operand:I 0 "register_operand" "r")
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(const_int 1)
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(match_operand:QI 1 "const_shift_operand" "K"))
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(const_int 0)))]
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"reload_completed"
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"lsr.l r0,%0,32-%1"
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"lsr<s> r0,%0,<b>-%1"
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[(set_attr "type" "logic")])
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;;
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@ -2373,11 +2375,11 @@
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}
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[(set_attr "type" "cmp")])
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(define_insn_and_split "*cbranchsi4_btst_insn"
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(define_insn_and_split "*cbranch<mode>4_btst_insn"
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[(set (pc)
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(if_then_else (match_operator 0 "visium_equality_comparison_operator"
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[(zero_extract:SI
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(match_operand:SI 1 "register_operand" "r")
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[(zero_extract:I
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(match_operand:I 1 "register_operand" "r")
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(const_int 1)
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(match_operand:QI 2 "const_shift_operand" "K"))
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(const_int 0)])
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@ -2510,6 +2512,20 @@
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"bra tr,%0,r0%# ;tablejump"
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[(set_attr "type" "abs_branch")])
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; trap instructions
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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(define_insn "trap"
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[(trap_if (const_int 1) (const_int 0))]
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""
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"stop 0,r0"
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[(set_attr "type" "trap")])
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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@ -1,3 +1,8 @@
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2017-02-23 Eric Botcazou <ebotcazou@adacore.com>
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* gcc.target/visium/bit_test.c: Accept any lsr form.
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* gcc.target/visium/block_move.c: Tweak.
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2017-02-23 Dominik Vogt <vogt@linux.vnet.ibm.com>
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PR 68749
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@ -27,5 +27,5 @@ void foo4 (unsigned char c)
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bar ();
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}
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/* { dg-final { scan-assembler-times "lsr.l" 2 } } */
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/* { dg-final { scan-assembler-times "lsr" 2 } } */
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/* { dg-final { scan-assembler-times "cmp" 2 } } */
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@ -11,7 +11,7 @@ void foo (void)
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int dst[LEN], src[LEN];
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unsigned int i;
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__builtin_memset (src, 0, LEN * sizeof (int));
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__builtin_memset (src, 1, LEN * sizeof (int));
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__builtin_memcpy (dst, src, LEN * sizeof (int));
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if (__builtin_memcmp (dst, src, LEN * sizeof (int)) != 0)
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abort ();
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