re PR rtl-optimization/55414 (spec2006 416.gamess compilation fails on LRA)
2012-11-21 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/55414 * lra-constraints.c (Index): New function. (lra_constraints): Check dead equiv init insns. From-SVN: r193712
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2012-11-21 Vladimir Makarov <vmakarov@redhat.com>
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PR rtl-optimization/55414
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* lra-constraints.c (Index): New function.
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(lra_constraints): Check dead equiv init insns.
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2012-11-21 Richard Henderson <rth@redhat.com>
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* config/alpha/alpha.md (extvmisaligndi): Rename from extv; update
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@ -3215,6 +3215,17 @@ multi_block_pseudo_p (int regno)
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return false;
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}
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/* Return true if LIST contains a deleted insn. */
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static bool
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contains_deleted_insn_p (rtx list)
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{
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for (; list != NULL_RTX; list = XEXP (list, 1))
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if (NOTE_P (XEXP (list, 0))
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&& NOTE_KIND (XEXP (list, 0)) == NOTE_INSN_DELETED)
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return true;
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return false;
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}
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/* Return true if X contains a pseudo dying in INSN. */
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static bool
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dead_pseudo_p (rtx x, rtx insn)
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@ -3317,10 +3328,29 @@ lra_constraints (bool first_p)
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bool pseudo_p = contains_reg_p (x, false, false);
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rtx set, insn;
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/* We don't use DF for compilation speed sake. So it is
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problematic to update live info when we use an
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equivalence containing pseudos in more than one BB. */
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if ((pseudo_p && multi_block_pseudo_p (i))
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/* After RTL transformation, we can not guarantee that
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pseudo in the substitution was not reloaded which might
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make equivalence invalid. For example, in reverse
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equiv of p0
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p0 <- ...
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...
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equiv_mem <- p0
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the memory address register was reloaded before the 2nd
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insn. */
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if ((! first_p && pseudo_p)
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/* We don't use DF for compilation speed sake. So it
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is problematic to update live info when we use an
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equivalence containing pseudos in more than one
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BB. */
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|| (pseudo_p && multi_block_pseudo_p (i))
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/* If an init insn was deleted for some reason, cancel
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the equiv. We could update the equiv insns after
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transformations including an equiv insn deletion
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but it is not worthy as such cases are extremely
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rare. */
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|| contains_deleted_insn_p (ira_reg_equiv[i].init_insns)
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/* If it is not a reverse equivalence, we check that a
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pseudo in rhs of the init insn is not dying in the
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insn. Otherwise, the live info at the beginning of
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@ -3335,19 +3365,6 @@ lra_constraints (bool first_p)
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&& (int) REGNO (SET_DEST (set)) == i)
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&& init_insn_rhs_dead_pseudo_p (i)))
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ira_reg_equiv[i].defined_p = false;
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else if (! first_p && pseudo_p)
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/* After RTL transformation, we can not guarantee that
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pseudo in the substitution was not reloaded which
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might make equivalence invalid. For example, in
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reverse equiv of p0
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p0 <- ...
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...
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equiv_mem <- p0
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the memory address register was reloaded before the
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2nd insn. */
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ira_reg_equiv[i].defined_p = false;
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if (contains_reg_p (x, false, true))
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ira_reg_equiv[i].profitable_p = false;
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if (get_equiv_substitution (reg) != reg)
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