rs6000.c (mask_constant): Delete.
* rs6000.c (mask_constant): Delete. (mask_operand): Move mask_constant() body to here. * rs6000.h (mask_constant): Delete declaration. * rs6000.md (nabsdi2): Reverse subtraction in splitter. From-SVN: r26925
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@ -1,3 +1,10 @@
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Thu May 13 15:34:18 1999 David Edelsohn <edelsohn@gnu.org>
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* rs6000.c (mask_constant): Delete.
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(mask_operand): Move mask_constant() body to here.
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* rs6000.h (mask_constant): Delete declaration.
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* rs6000.md (nabsdi2): Reverse subtraction in splitter.
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Thu May 13 02:25:01 1999 Jeffrey A Law (law@cygnus.com)
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* cpp.texi: Fix some typos.
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@ -922,19 +922,26 @@ non_logical_cint_operand (op, mode)
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&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0);
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}
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/* Return 1 if C is a constant that can be encoded in a mask on the
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/* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
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RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
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Reject all ones and all zeros, since these should have been optimized
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away and confuse the making of MB and ME. */
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int
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mask_constant (c)
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register HOST_WIDE_INT c;
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mask_operand (op, mode)
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register rtx op;
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enum machine_mode mode ATTRIBUTE_UNUSED;
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{
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HOST_WIDE_INT c;
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int i;
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int last_bit_value;
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int transitions = 0;
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if (GET_CODE (op) != CONST_INT)
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return 0;
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c = INTVAL (op);
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if (c == 0 || c == ~0)
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return 0;
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@ -947,16 +954,6 @@ mask_constant (c)
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return transitions <= 2;
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}
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/* Return 1 if the operand is a constant that is a mask on the RS/6000. */
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int
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mask_operand (op, mode)
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register rtx op;
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enum machine_mode mode ATTRIBUTE_UNUSED;
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{
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return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
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}
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/* Return 1 if the operand is a constant that is a PowerPC64 mask.
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It is if there are no more than one 1->0 or 0->1 transitions.
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Reject all ones and all zeros, since these should have been optimized
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@ -3257,7 +3257,6 @@ extern int add_operand ();
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extern int non_add_cint_operand ();
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extern int non_logical_cint_operand ();
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extern int logical_operand ();
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extern int mask_constant ();
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extern int mask_operand ();
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extern int mask64_operand ();
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extern int and64_operand ();
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@ -4963,7 +4963,7 @@
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(set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
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"")
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(define_insn ""
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(define_insn "*nabsdi2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
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(clobber (match_scratch:DI 2 "=&r,&r"))]
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@ -4978,7 +4978,7 @@
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
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(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
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(set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
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(set (match_dup 0) (minus:DI (match_dup 2) (match_dup 0)))]
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"")
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(define_expand "negdi2"
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