diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 856bf45c2a7..c8148776d31 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1289,7 +1289,6 @@
 		   (zero_extend:DI (match_dup 1)) (const_int 32))
 		  (zero_extend:DI (match_dup 4)))
 	 (match_dup 3)))]
-  
   "TARGET_POWER"
   "div %0,%1,%3"
   [(set_attr "type" "idiv")])
@@ -3559,36 +3558,20 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*q,*c*l,*h")
 	(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r,r,0"))]
-  "TARGET_POWER && (gpc_reg_operand (operands[0], SImode)
-   || gpc_reg_operand (operands[1], SImode))"
+  "gpc_reg_operand (operands[0], SImode)
+   || gpc_reg_operand (operands[1], SImode)"
   "@
    mr %0,%1
    {l%U1%X1|lwz%U1%X1} %0,%1
    {st%U0%X0|stw%U0%X0} %1,%0
-   {cal %0,%1(0)|li %0,%1}
-   {cau %0,0,%u1|lis %0,%u1}
+   {lil|li} %0,%1
+   {liu|lis} %0,%u1
    mf%1 %0
    mt%0 %1
    mt%0 %1
    cror 0,0,0"
   [(set_attr "type" "*,load,*,*,*,*,*,mtjmpr,*")])
 
-(define_insn ""
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h,*h")
-	(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r,0"))]
-  "! TARGET_POWER && (gpc_reg_operand (operands[0], SImode)
-   || gpc_reg_operand (operands[1], SImode))"
-  "@
-   mr %0,%1
-   lwz%U1%X1 %0,%1
-   stw%U0%X0 %1,%0
-   li %0,%1
-   lis %0,%u1
-   mf%1 %0
-   mt%0 %1
-   cror 0,0,0"
-  [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
-
 ;; Split a load of a large constant into the appropriate two-insn
 ;; sequence.
 
@@ -3640,34 +3623,19 @@
 (define_insn ""
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
 	(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
-  "TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
-   || gpc_reg_operand (operands[1], HImode))"
+  "gpc_reg_operand (operands[0], HImode)
+   || gpc_reg_operand (operands[1], HImode)"
   "@
    mr %0,%1
    lhz%U1%X1 %0,%1
    sth%U0%X0 %1,%0
-   {cal %0,%w1(0)|li %0,%w1}
+   {lil|li} %0,%w1
    mf%1 %0
    mt%0 %1
    mt%0 %1
    cror 0,0,0"
   [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
 
-(define_insn ""
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
-	(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,0"))]
-  "! TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
-   || gpc_reg_operand (operands[1], HImode))"
-  "@
-   mr %0,%1
-   lhz%U1%X1 %0,%1
-   sth%U0%X0 %1,%0
-   li %0,%w1
-   mf%1 %0
-   mt%0 %1
-   cror 0,0,0"
-  [(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
-
 (define_expand "movqi"
   [(set (match_operand:QI 0 "general_operand" "")
 	(match_operand:QI 1 "any_operand" ""))]
@@ -3690,33 +3658,18 @@
 (define_insn ""
   [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
 	(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
-  "TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
-   || gpc_reg_operand (operands[1], QImode))"
+  "gpc_reg_operand (operands[0], QImode)
+   || gpc_reg_operand (operands[1], QImode)"
   "@
    mr %0,%1
    lbz%U1%X1 %0,%1
    stb%U0%X0 %1,%0
-   {cal %0,%1(0)|li %0,%1}
+   {lil|li} %0,%1
    mf%1 %0
    mt%0 %1
    mt%0 %1
    cror 0,0,0"
   [(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
-
-(define_insn ""
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
-	(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,0"))]
-  "! TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
-   || gpc_reg_operand (operands[1], QImode))"
-  "@
-   mr %0,%1
-   lbz%U1%X1 %0,%1
-   stb%U0%X0 %1,%0
-   li %0,%1
-   mf%1 %0
-   mt%0 %1
-   cror 0,0,0"
-  [(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
 
 ;; Here is how to move condition codes around.  When we store CC data in
 ;; an integer register or memory, we store just the high-order 4 bits.
@@ -3861,8 +3814,7 @@
    fmr %0,%1
    lfs%U1%X1 %0,%1
    stfs%U0%X0 %1,%0"
-  [(set_attr "type" "fp,fpload,*")
-   (set_attr "length" "*,*,8")])
+  [(set_attr "type" "fp,fpload,*")])
 
 (define_expand "movdf"
   [(set (match_operand:DF 0 "nonimmediate_operand" "")