When lra-remat rematerializes an instruction with a clobber, it checks that the clobber does not kill live registers.
When lra-remat rematerializes an instruction with a clobber, it checks that the clobber does not kill live registers. However it fails to check that the clobber also doesn't overlap with the destination register of the final rematerialized instruction. As a result it is possible to generate illegal instructions with the same hard register as the destination and a clobber. Fix this by also checking for overlaps with the destination register. gcc/ PR rtl-optimization/80754 * lra-remat.c (do_remat): Add overlap checks for dst_regno. From-SVN: r248424
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@ -1,3 +1,8 @@
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2017-05-24 Wilco Dijkstra <wdijkstr@arm.com>
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PR rtl-optimization/80754
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* lra-remat.c (do_remat): Add overlap checks for dst_regno.
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2017-05-24 Sheldon Lobo <smlobo@sheldon.us.oracle.com>
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* config/sparc/sparc.md (length): Return the correct value for -mflat
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@ -1117,6 +1117,7 @@ do_remat (void)
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break;
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}
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int i, hard_regno, nregs;
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int dst_hard_regno, dst_nregs;
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rtx_insn *remat_insn = NULL;
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HOST_WIDE_INT cand_sp_offset = 0;
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if (cand != NULL)
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@ -1131,6 +1132,12 @@ do_remat (void)
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gcc_assert (REG_P (saved_op));
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int ignore_regno = REGNO (saved_op);
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dst_hard_regno = dst_regno < FIRST_PSEUDO_REGISTER
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? dst_regno : reg_renumber[dst_regno];
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gcc_assert (dst_hard_regno >= 0);
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machine_mode mode = GET_MODE (SET_DEST (set));
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dst_nregs = hard_regno_nregs[dst_hard_regno][mode];
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for (reg = cand_id->regs; reg != NULL; reg = reg->next)
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if (reg->type != OP_IN && reg->regno != ignore_regno)
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{
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@ -1141,6 +1148,10 @@ do_remat (void)
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break;
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if (i < nregs)
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break;
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/* Ensure the clobber also doesn't overlap dst_regno. */
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if (hard_regno + nregs > dst_hard_regno
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&& hard_regno < dst_hard_regno + dst_nregs)
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break;
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}
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if (reg == NULL)
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@ -1148,9 +1159,14 @@ do_remat (void)
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for (reg = static_cand_id->hard_regs;
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reg != NULL;
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reg = reg->next)
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if (reg->type != OP_IN
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&& TEST_HARD_REG_BIT (live_hard_regs, reg->regno))
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break;
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if (reg->type != OP_IN)
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{
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if (TEST_HARD_REG_BIT (live_hard_regs, reg->regno))
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break;
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if (reg->regno >= dst_hard_regno
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&& reg->regno < dst_hard_regno + dst_nregs)
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break;
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}
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}
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if (reg == NULL)
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