(reload_insi): New pattern.
(addsi3 pattern for large constants): Delete. Causes reload trouble. From-SVN: r2516
This commit is contained in:
parent
f1553cbb35
commit
1a31d08dae
|
@ -28,7 +28,7 @@
|
|||
(define_expand "m88k_sccs_id"
|
||||
[(match_operand:SI 0 "" "")]
|
||||
""
|
||||
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.13.3 10/13/92 13:03:43\";
|
||||
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.13.5 10/19/92 10:13:13\";
|
||||
FAIL; }")
|
||||
|
||||
;; Attribute specifications
|
||||
|
@ -1412,10 +1412,25 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, SImode))
|
||||
if (emit_move_sequence (operands, SImode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
(define_expand "reload_insi"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r")
|
||||
(match_operand:SI 1 "general_operand" ""))
|
||||
(clobber (match_operand:SI 2 "register_operand" "=&r"))]
|
||||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, SImode, operands[2]))
|
||||
DONE;
|
||||
|
||||
/* We don't want the clobber emitted, so handle this ourselves. */
|
||||
emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
|
||||
DONE;
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,x,x,x,m")
|
||||
(match_operand:SI 1 "move_operand" "rI,m,rO,J,M,x,r,x,m,x"))]
|
||||
|
@ -1469,7 +1484,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, HImode))
|
||||
if (emit_move_sequence (operands, HImode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1501,7 +1516,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, QImode))
|
||||
if (emit_move_sequence (operands, QImode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1533,7 +1548,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, DImode))
|
||||
if (emit_move_sequence (operands, DImode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1584,7 +1599,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, DFmode))
|
||||
if (emit_move_sequence (operands, DFmode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1657,7 +1672,7 @@
|
|||
""
|
||||
"
|
||||
{
|
||||
if (emit_move_sequence (operands, SFmode))
|
||||
if (emit_move_sequence (operands, SFmode, 0))
|
||||
DONE;
|
||||
}")
|
||||
|
||||
|
@ -1777,7 +1792,7 @@
|
|||
if (GET_CODE (operands[1]) == MEM
|
||||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
|
@ -1799,7 +1814,7 @@
|
|||
if (GET_CODE (operands[1]) == MEM
|
||||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
|
@ -1822,7 +1837,7 @@
|
|||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
{
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
|
||||
gen_rtx (ZERO_EXTEND, SImode, operands[1])));
|
||||
DONE;
|
||||
|
@ -1859,7 +1874,7 @@
|
|||
if (GET_CODE (operands[1]) == MEM
|
||||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
|
@ -1882,7 +1897,7 @@
|
|||
if (GET_CODE (operands[1]) == MEM
|
||||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
|
@ -1905,7 +1920,7 @@
|
|||
if (GET_CODE (operands[1]) == MEM
|
||||
&& symbolic_address_p (XEXP (operands[1], 0)))
|
||||
operands[1]
|
||||
= legitimize_address (flag_pic, operands[1], gen_reg_rtx (Pmode));
|
||||
= legitimize_address (flag_pic, operands[1], 0, 0);
|
||||
}")
|
||||
|
||||
(define_insn ""
|
||||
|
@ -2008,32 +2023,6 @@
|
|||
addu %0,%1,%2
|
||||
subu %0,%1,%n2")
|
||||
|
||||
;; In unusual contexts, an add of a large value is generated (case statements
|
||||
;; for example). In these contexts, it is sufficient to accept only those
|
||||
;; cases where the two registers are different.
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,&r")
|
||||
(plus:SI (match_operand:SI 1 "arith32_operand" "%r,r")
|
||||
(match_operand:SI 2 "arith32_operand" "r,!n")))]
|
||||
""
|
||||
"*
|
||||
{
|
||||
rtx xoperands[10];
|
||||
|
||||
if (which_alternative == 0)
|
||||
return \"addu %0,%1,%2\";
|
||||
|
||||
xoperands[0] = operands[0];
|
||||
xoperands[1] = operands[2];
|
||||
output_asm_insn (output_load_const_int (SImode, xoperands),
|
||||
xoperands);
|
||||
|
||||
return \"addu %0,%1,%0\";
|
||||
}"
|
||||
[(set_attr "type" "arith,marith")
|
||||
(set_attr "length" "1,3")]) ; may be 2 or 3.
|
||||
|
||||
;; patterns for mixed mode floating point.
|
||||
;; Do not define patterns that utilize mixed mode arithmetic that result
|
||||
;; in narrowing the precision, because it loses accuracy, since the standard
|
||||
|
|
Loading…
Reference in New Issue