h8300.c: Fix formatting.
* h8300.c: Fix formatting.
* h8300.h: Likewise.
* h8300.md: Likewise.
(movsi_h8300hs): Fix formatting of the resulting assembly code.
From-SVN: r35575
This commit is contained in:
Kazu Hirata
Jeff Law
parent
1d7254c5a7
commit
1a63219b0d
@ -1,5 +1,10 @@
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2000-08-08 Kazu Hirata <kazu@hxi.com>
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* h8300.c: Fix formatting.
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* h8300.h: Likewise.
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* h8300.md: Likewise.
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(movsi_h8300hs): Fix formatting of the resulting assembly code.
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* reload1.c: Fix formatting.
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2000-08-08 Rodney Brown <RodneyBrown@mynd.com>
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@ -167,7 +167,7 @@ dosize (file, op, size)
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amount > 0;
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amount /= 2)
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{
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for(; size >= amount; size -= amount)
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for (; size >= amount; size -= amount)
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fprintf (file, "\t%ss\t#%d,sp\n", op, amount);
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}
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}
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@ -612,7 +612,7 @@ split_adds_subs (mode, operands)
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amount > 0;
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amount /= 2)
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{
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for(; val >= amount; val -= amount)
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for (; val >= amount; val -= amount)
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{
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rtx tmp = gen_rtx_PLUS (mode, reg, GEN_INT (sign * amount));
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emit_insn (gen_rtx_SET (VOIDmode, reg, tmp));
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@ -1773,16 +1773,16 @@ enum shift_alg
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/* Symbols of the various shifts which can be used as indices. */
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enum shift_type
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{
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SHIFT_ASHIFT, SHIFT_LSHIFTRT, SHIFT_ASHIFTRT
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};
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{
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SHIFT_ASHIFT, SHIFT_LSHIFTRT, SHIFT_ASHIFTRT
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};
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/* Symbols of the various modes which can be used as indices. */
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enum shift_mode
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{
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QIshift, HIshift, SIshift
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};
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{
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QIshift, HIshift, SIshift
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};
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/* For single bit shift insns, record assembler and what bits of the
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condition code are valid afterwards (represented as various CC_FOO
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@ -2680,7 +2680,8 @@ fix_bit_operand (operands, what, type)
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if (CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), what))
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{
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/* Ok to have a memory dest. */
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if (GET_CODE (operands[0]) == MEM && !EXTRA_CONSTRAINT (operands[0], 'U'))
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if (GET_CODE (operands[0]) == MEM
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&& !EXTRA_CONSTRAINT (operands[0], 'U'))
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{
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rtx mem = gen_rtx_MEM (GET_MODE (operands[0]),
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copy_to_mode_reg (Pmode,
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@ -2689,7 +2690,8 @@ fix_bit_operand (operands, what, type)
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operands[0] = mem;
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}
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if (GET_CODE (operands[1]) == MEM && !EXTRA_CONSTRAINT (operands[1], 'U'))
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if (GET_CODE (operands[1]) == MEM
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&& !EXTRA_CONSTRAINT (operands[1], 'U'))
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{
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rtx mem = gen_rtx_MEM (GET_MODE (operands[1]),
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copy_to_mode_reg (Pmode,
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@ -410,27 +410,27 @@ enum reg_class {
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#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
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#define CONST_OK_FOR_J(VALUE) ((unsigned HOST_WIDE_INT) (VALUE) < 256)
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#define CONST_OK_FOR_K(VALUE) ((VALUE) == 1 || (VALUE) == 2)
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#define CONST_OK_FOR_L(VALUE) \
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
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#define CONST_OK_FOR_L(VALUE) \
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
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: (VALUE) == 1 || (VALUE) == 2)
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#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3 || (VALUE) == 4)
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#define CONST_OK_FOR_N(VALUE) \
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
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#define CONST_OK_FOR_N(VALUE) \
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(TARGET_H8300H || TARGET_H8300S \
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? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
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: (VALUE) == -1 || (VALUE) == -2)
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#define CONST_OK_FOR_O(VALUE) (ok_for_bclr (VALUE))
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#define CONST_OK_FOR_P(VALUE) (small_power_of_two (VALUE))
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
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(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
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(C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
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(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
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(C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
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(C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
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(C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
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(C) == 'P' ? CONST_OK_FOR_P (VALUE) : \
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
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(C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
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(C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
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(C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
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(C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
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(C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
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(C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
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(C) == 'P' ? CONST_OK_FOR_P (VALUE) : \
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0)
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/* Similar, but for floating constants, and defining letters G and H.
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@ -438,7 +438,7 @@ enum reg_class {
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`G' is a floating-point zero. */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
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: 0)
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@ -629,8 +629,8 @@ struct cum_arg
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of mode MODE and data type TYPE.
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(TYPE is null for libcalls where that information may not be available.) */
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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((CUM).nbytes += ((MODE) != BLKmode \
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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((CUM).nbytes += ((MODE) != BLKmode \
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? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
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: (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
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@ -734,7 +734,7 @@ struct cum_arg
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else \
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{ \
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fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \
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fprintf (FILE, "\tjmp @0x123456\n"); \
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fprintf (FILE, "\tjmp @0x123456\n"); \
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} \
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} while (0)
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@ -783,7 +783,7 @@ struct cum_arg
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/* 1 if X is an rtx for a constant that is a valid address. */
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#define CONSTANT_ADDRESS_P(X) \
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#define CONSTANT_ADDRESS_P(X) \
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(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
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|| (GET_CODE (X) == CONST_INT \
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/* We handle signed and unsigned offsets here. */ \
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@ -1021,18 +1021,18 @@ h8300_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
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switch on CODE. */
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/* ??? Shifts need to have a *much* higher cost than this. */
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#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
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case MOD: \
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case DIV: \
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return 60; \
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case MULT: \
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return 20; \
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case ASHIFT: \
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case ASHIFTRT: \
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case LSHIFTRT: \
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case ROTATE: \
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case ROTATERT: \
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if (GET_MODE (RTX) == HImode) return 2; \
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#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
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case MOD: \
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case DIV: \
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return 60; \
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case MULT: \
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return 20; \
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case ASHIFT: \
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case ASHIFTRT: \
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case LSHIFTRT: \
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case ROTATE: \
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case ROTATERT: \
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if (GET_MODE (RTX) == HImode) return 2; \
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return 8;
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/* Tell final.c how to eliminate redundant test instructions. */
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@ -1336,14 +1336,14 @@ do { char dstr[30]; \
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that says to advance the location counter
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to a multiple of 2**LOG bytes. */
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#define ASM_OUTPUT_ALIGN(FILE,LOG) \
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if ((LOG) != 0) \
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#define ASM_OUTPUT_ALIGN(FILE,LOG) \
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if ((LOG) != 0) \
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fprintf (FILE, "\t.align %d\n", (LOG))
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/* This is how to output an assembler line
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that says to advance the location counter by SIZE bytes. */
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#define ASM_OUTPUT_IDENT(FILE, NAME) \
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#define ASM_OUTPUT_IDENT(FILE, NAME) \
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fprintf(FILE, "%s\t \"%s\"\n", IDENT_ASM_OP, NAME)
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#define ASM_OUTPUT_SKIP(FILE, SIZE) \
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@ -1352,16 +1352,16 @@ do { char dstr[30]; \
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/* This says how to output an assembler line
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to define a global common symbol. */
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#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
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( fputs ("\t.comm ", (FILE)), \
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assemble_name ((FILE), (NAME)), \
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#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
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( fputs ("\t.comm ", (FILE)), \
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assemble_name ((FILE), (NAME)), \
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fprintf ((FILE), ",%d\n", (SIZE)))
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/* This says how to output the assembler to define a global
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uninitialized but not common symbol.
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Try to use asm_output_bss to implement this macro. */
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#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
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#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
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asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
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/* This says how to output an assembler line
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@ -1437,18 +1437,18 @@ do { char dstr[30]; \
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/* Perform target dependent optabs initialization. */
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#define INIT_TARGET_OPTABS \
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do { \
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smul_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (MULHI3_LIBCALL); \
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sdiv_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (DIVHI3_LIBCALL); \
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udiv_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (UDIVHI3_LIBCALL); \
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smod_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (MODHI3_LIBCALL); \
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umod_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (UMODHI3_LIBCALL); \
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#define INIT_TARGET_OPTABS \
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do { \
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smul_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (MULHI3_LIBCALL); \
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sdiv_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (DIVHI3_LIBCALL); \
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udiv_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (UDIVHI3_LIBCALL); \
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smod_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (MODHI3_LIBCALL); \
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umod_optab->handlers[(int) HImode].libfunc \
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= init_one_libfunc (UMODHI3_LIBCALL); \
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} while (0)
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#define MOVE_RATIO 3
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@ -144,11 +144,11 @@
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""
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"
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{
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/* One of the ops has to be in a register */
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if (!register_operand(operand0, QImode)
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&& !register_operand(operand1, QImode))
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/* One of the ops has to be in a register. */
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if (!register_operand (operand0, QImode)
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&& !register_operand (operand1, QImode))
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{
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operands[1] = copy_to_mode_reg(QImode, operand1);
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operands[1] = copy_to_mode_reg (QImode, operand1);
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}
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}")
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@ -208,11 +208,11 @@
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""
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"
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{
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/* One of the ops has to be in a register */
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if (!register_operand(operand1, HImode)
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&& !register_operand(operand0, HImode))
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/* One of the ops has to be in a register. */
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if (!register_operand (operand1, HImode)
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&& !register_operand (operand0, HImode))
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{
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operands[1] = copy_to_mode_reg(HImode, operand1);
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operands[1] = copy_to_mode_reg (HImode, operand1);
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}
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}")
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@ -426,13 +426,13 @@
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if (val == (val & 0xff))
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{
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operands[1] = GEN_INT ((char) val & 0xff);
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return \"sub.l %S0,%S0\;add.b %1,%w0\";
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return \"sub.l\\t%S0,%S0\;add.b\\t%1,%w0\";
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}
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if (val == (val & 0xff00))
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{
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operands[1] = GEN_INT ((char) (val >> 8) & 0xff);
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return \"sub.l %S0,%S0\;add.b %1,%x0\";
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return \"sub.l\\t%S0,%S0\;add.b\\t%1,%x0\";
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}
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/* Now look for small negative numbers. We can subtract them
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@ -440,7 +440,7 @@
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if (val == -4 || val == -2 || val == -1)
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{
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operands[1] = GEN_INT (-INTVAL (operands[1]));
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return \"sub.l %S0,%S0\;subs %1,%S0\";
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return \"sub.l\\t%S0,%S0\;subs\\t%1,%S0\";
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}
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}
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}
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@ -2257,4 +2257,3 @@
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"mov.w %T0,@-%T1"
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[(set_attr "length" "2")
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(set_attr "cc" "set_znv")])
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