From 1a6e82b8c099145a2ced78c0573eeeb90e3e2cfa Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 13 Oct 2015 20:56:48 +0200 Subject: [PATCH] i386.c (classify_argument): Use CEIL where applicable. * config/i386/i386.c (classify_argument): Use CEIL where applicable. (ix86_function_arg_advance): Ditto. (ix86_function_arg): Ditto. (ix86_gimplify_va_arg): Ditto. (ix86_class_max_nregs): Ditto. (inline_memory_move_cost): Ditto. (ix86_set_reg_reg_cost): Ditto. * config/i386/i386.h (HARD_REGNO_NREGS): Ditto. From-SVN: r228776 --- gcc/ChangeLog | 13 ++++++++++++- gcc/config/i386/i386.c | 16 +++++++--------- gcc/config/i386/i386.h | 38 ++++++++++++++++++++------------------ 3 files changed, 39 insertions(+), 28 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3ddc4a95e3d..47119471d84 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,9 +1,20 @@ +2015-10-13 Uros Bizjak + + * config/i386/i386.c (classify_argument): Use CEIL where applicable. + (ix86_function_arg_advance): Ditto. + (ix86_function_arg): Ditto. + (ix86_gimplify_va_arg): Ditto. + (ix86_class_max_nregs): Ditto. + (inline_memory_move_cost): Ditto. + (ix86_set_reg_reg_cost): Ditto. + * config/i386/i386.h (HARD_REGNO_NREGS): Ditto. + 2015-10-13 Alexandre Oliva PR middle-end/67912 * expmed.c (store_bit_field_1): Adjust mode of BLKmode inputs. -2015-10-12 Uros Bizjak +2015-10-13 Uros Bizjak * config/sparc/sparc.h (SPARC_STACK_ALIGN): Implement using ROUND_UP macro and UNITS_PER_WORD * 2. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 419966d8d4f..a2314e75ee6 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7925,8 +7925,7 @@ classify_argument (machine_mode mode, const_tree type, { HOST_WIDE_INT bytes = (mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode); - int words - = (bytes + (bit_offset % 64) / 8 + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + int words = CEIL (bytes + (bit_offset % 64) / 8, UNITS_PER_WORD); /* Variable sized entities are always passed/returned in memory. */ if (bytes < 0) @@ -8791,7 +8790,7 @@ ix86_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, bytes = int_size_in_bytes (type); else bytes = GET_MODE_SIZE (mode); - words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + words = CEIL (bytes, UNITS_PER_WORD); if (type) mode = type_natural_mode (type, NULL, false); @@ -9124,7 +9123,7 @@ ix86_function_arg (cumulative_args_t cum_v, machine_mode omode, bytes = int_size_in_bytes (type); else bytes = GET_MODE_SIZE (mode); - words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + words = CEIL (bytes, UNITS_PER_WORD); /* To simplify the code below, represent vector types with a vector mode even if MMX/SSE are not active. */ @@ -10271,7 +10270,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, if (indirect_p) type = build_pointer_type (type); size = int_size_in_bytes (type); - rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + rsize = CEIL (size, UNITS_PER_WORD); nat_mode = type_natural_mode (type, NULL, false); switch (nat_mode) @@ -42971,7 +42970,7 @@ ix86_class_max_nregs (reg_class_t rclass, machine_mode mode) else if (mode == XCmode) return (TARGET_64BIT ? 4 : 6); else - return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD); + return CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD); } else { @@ -43130,8 +43129,7 @@ inline_memory_move_cost (machine_mode mode, enum reg_class regclass, cost = ix86_cost->int_load[2]; else cost = ix86_cost->int_store[2]; - return (cost * (((int) GET_MODE_SIZE (mode) - + UNITS_PER_WORD - 1) / UNITS_PER_WORD)); + return cost * CEIL ((int) GET_MODE_SIZE (mode), UNITS_PER_WORD); } } @@ -43417,7 +43415,7 @@ ix86_set_reg_reg_cost (machine_mode mode) /* Return the cost of moving between two registers of mode MODE, assuming that the move will be in pieces of at most UNITS bytes. */ - return COSTS_N_INSNS ((GET_MODE_SIZE (mode) + units - 1) / units); + return COSTS_N_INSNS (CEIL (GET_MODE_SIZE (mode), units)); } /* Compute a (partial) cost for rtx X. Return true if the complete diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 4a84fb972d1..435312f0afc 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -840,7 +840,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #endif #else #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ - x86_field_alignment (FIELD, COMPUTED) + x86_field_alignment ((FIELD), (COMPUTED)) #endif /* If defined, a C expression to compute the alignment given to a @@ -928,7 +928,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); If this macro is not defined, then (ALIGN) will be used. */ #define MINIMUM_ALIGNMENT(EXP, MODE, ALIGN) \ - ix86_minimum_alignment (EXP, MODE, ALIGN) + ix86_minimum_alignment ((EXP), (MODE), (ALIGN)) /* Set this nonzero if move instructions will actually fail to work @@ -1084,9 +1084,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ : ((MODE) == XFmode \ ? (TARGET_64BIT ? 2 : 3) \ - : (MODE) == XCmode \ - ? (TARGET_64BIT ? 4 : 6) \ - : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) + : ((MODE) == XCmode \ + ? (TARGET_64BIT ? 4 : 6) \ + : CEIL (GET_MODE_SIZE (MODE), UNITS_PER_WORD)))) #define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \ ((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \ @@ -1188,7 +1188,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, for any hard reg, then this must be 0 for correct output. */ -#define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2) +#define MODES_TIEABLE_P(MODE1, MODE2) \ + ix86_modes_tieable_p ((MODE1), (MODE2)) /* It is possible to write patterns to move flags; but until someone does it, */ @@ -1462,7 +1463,7 @@ enum reg_class reg number REGNO. This could be a conditional expression or could index an array. */ -#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) +#define REGNO_REG_CLASS(REGNO) (regclass_map[(REGNO)]) /* When this hook returns true for MODE, the compiler allows registers explicitly used in the rtl to be used as spill registers @@ -1602,7 +1603,7 @@ enum reg_class and -8 for 64bit targets, we need to make sure all stack pointer adjustments are in multiple of 4 for 32bit targets and 8 for 64bit targets. */ -#define PUSH_ROUNDING(BYTES) ROUND_UP (BYTES, UNITS_PER_WORD) +#define PUSH_ROUNDING(BYTES) ROUND_UP ((BYTES), UNITS_PER_WORD) /* If defined, the maximum amount of space required for outgoing arguments will be computed and placed into the variable `crtl->outgoing_args_size'. @@ -1717,7 +1718,8 @@ typedef struct ix86_args { /* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */ -#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) +#define FUNCTION_PROFILER(FILE, LABELNO) \ + x86_function_profiler ((FILE), (LABELNO)) #define MCOUNT_NAME "_mcount" @@ -2142,11 +2144,11 @@ extern int const x86_64_ms_sysv_extra_clobbered_registers[12]; gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) /* After the prologue, RA is at -4(AP) in the current frame. */ -#define RETURN_ADDR_RTX(COUNT, FRAME) \ - ((COUNT) == 0 \ - ? gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, \ - -UNITS_PER_WORD)) \ - : gen_rtx_MEM (Pmode, plus_constant (Pmode, FRAME, UNITS_PER_WORD))) +#define RETURN_ADDR_RTX(COUNT, FRAME) \ + ((COUNT) == 0 \ + ? gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, \ + -UNITS_PER_WORD)) \ + : gen_rtx_MEM (Pmode, plus_constant (Pmode, (FRAME), UNITS_PER_WORD))) /* PC is dbx register 8; let's use that column for RA. */ #define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) @@ -2242,7 +2244,7 @@ do { \ #undef ASM_OUTPUT_FUNCTION_LABEL #define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \ - ix86_asm_output_function_label (FILE, NAME, DECL) + ix86_asm_output_function_label ((FILE), (NAME), (DECL)) /* Under some conditions we need jump tables in the text section, because the assembler cannot handle label differences between @@ -2402,9 +2404,9 @@ enum avx_u128_state Don't rename evex to non-evex sse registers. */ -#define HARD_REGNO_RENAME_OK(SRC, TARGET) (!STACK_REGNO_P (SRC) && \ - (EXT_REX_SSE_REGNO_P (SRC) == \ - EXT_REX_SSE_REGNO_P (TARGET))) +#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ + (!STACK_REGNO_P (SRC) \ + && EXT_REX_SSE_REGNO_P (SRC) == EXT_REX_SSE_REGNO_P (TARGET)) #define FASTCALL_PREFIX '@'