bb-reorder.c, [...]: Fix comment typos.
* bb-reorder.c, c-opts.c, cfglayout.c, cgraph.c, cgraphunit.c, cppfiles.c, fold-const.c, ggc-zone.c, loop-doloop.c, optabs.c, reg-stack.c, varasm.c, config/alpha/ev4.md, config/alpha/ev5.md, config/alpha/ev6.md, config/arm/arm.c, config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.c, config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c, config/frv/frv.h, config/frv/frv.md, config/h8300/h8300.c, config/i386/i386.c, config/i386/i386.md, config/i386/winnt.c, config/ia64/itanium2.md, config/ip2k/ip2k.c, config/mips/mips.c, config/mips/mips.h, config/mips/sr71k.md, config/pa/pa.c, config/s390/s390.c, config/sh/sh.c: Fix comment typos. From-SVN: r81345
This commit is contained in:
parent
a692ad2ece
commit
1ae58c30e2
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@ -1,3 +1,18 @@
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2004-04-30 Kazu Hirata <kazu@cs.umass.edu>
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* bb-reorder.c, c-opts.c, cfglayout.c, cgraph.c, cgraphunit.c,
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cppfiles.c, fold-const.c, ggc-zone.c, loop-doloop.c, optabs.c,
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reg-stack.c, varasm.c, config/alpha/ev4.md,
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config/alpha/ev5.md, config/alpha/ev6.md, config/arm/arm.c,
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config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.c,
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config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c,
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config/frv/frv.h, config/frv/frv.md, config/h8300/h8300.c,
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config/i386/i386.c, config/i386/i386.md, config/i386/winnt.c,
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config/ia64/itanium2.md, config/ip2k/ip2k.c,
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config/mips/mips.c, config/mips/mips.h, config/mips/sr71k.md,
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config/pa/pa.c, config/s390/s390.c, config/sh/sh.c: Fix
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comment typos.
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2004-04-30 Paul Brook <paul@codesourcery.com>
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* config.gcc: Default ep9312 to hard-float.
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@ -901,7 +901,7 @@ connect_traces (int n_traces, struct trace *traces)
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last_trace = -1;
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/* If we are partitioning hot/cold basic blocks, mark the cold
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traces as already connnected, to remove them from consideration
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traces as already connected, to remove them from consideration
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for connection to the hot traces. After the hot traces have all
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been connected (determined by "unconnected_hot_trace_count"), we
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will go back and connect the cold traces. */
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@ -101,7 +101,7 @@ static size_t deferred_count;
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/* Number of deferred options scanned for -include. */
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static size_t include_cursor;
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/* Permit Fotran front-end options. */
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/* Permit Fortran front-end options. */
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static bool permit_fortran_options;
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static void set_Wimplicit (int);
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@ -1172,7 +1172,7 @@ cfg_layout_initialize_rbi (basic_block bb)
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memset (bb->rbi, 0, sizeof (struct reorder_block_def));
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}
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/* Main entry point to this module - initialize the datastructures for
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/* Main entry point to this module - initialize the data structures for
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CFG layout changes. It keeps LOOPS up-to-date if not null. */
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void
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16
gcc/cgraph.c
16
gcc/cgraph.c
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@ -50,9 +50,9 @@ The callgraph:
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Intraprocedural information:
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Callgraph is place to store data needed for intraprocedural optimization.
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All datastructures are divided into three components: local_info that
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All data structures are divided into three components: local_info that
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is produced while analyzing the function, global_info that is result
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of global walkking of the callgraph on the end of compilation and
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of global walking of the callgraph on the end of compilation and
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rtl_info used by RTL backend to propagate data from already compiled
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functions to their callers.
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@ -60,11 +60,11 @@ The callgraph:
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The function inlining information is decided in advance and maintained
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in the callgraph as so called inline plan.
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For each inlined call, the calle's node is clonned to represent the
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For each inlined call, the callee's node is cloned to represent the
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new function copy produced by inlininer.
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Each inlined call gets unque corresponding clone node of the callee
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and the datastructure is updated while inlining is performed, so
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the clones are elliminated and their callee edges redirected to the
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Each inlined call gets a unique corresponding clone node of the callee
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and the data structure is updated while inlining is performed, so
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the clones are eliminated and their callee edges redirected to the
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caller.
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Each edge has "inline_failed" field. When the field is set to NULL,
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@ -100,7 +100,7 @@ The varpool data structure:
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static GTY((param_is (struct cgraph_node))) htab_t cgraph_hash;
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/* We destructively update callgraph during inlining and thus we need to
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keep information on whether inlining happend separately. */
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keep information on whether inlining happened separately. */
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htab_t cgraph_inline_hash;
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/* The linked list of cgraph nodes. */
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@ -152,7 +152,7 @@ eq_node (const void *p1, const void *p2)
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(tree) p2);
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}
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/* Allocate new callgraph node and insert it into basic datastructures. */
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/* Allocate new callgraph node and insert it into basic data structures. */
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static struct cgraph_node *
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cgraph_create_node (void)
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{
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@ -36,7 +36,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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- cgraph_varpool_finalize_variable
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This function has same behaviour as the above but is used for static
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This function has same behavior as the above but is used for static
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variables.
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- cgraph_finalize_compilation_unit
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@ -324,7 +324,7 @@ cgraph_finalize_function (tree decl, bool nested)
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if (node->output)
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abort ();
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/* Reset our datastructures so we can analyze the function again. */
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/* Reset our data structures so we can analyze the function again. */
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memset (&node->local, 0, sizeof (node->local));
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memset (&node->global, 0, sizeof (node->global));
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memset (&node->rtl, 0, sizeof (node->rtl));
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@ -1022,7 +1022,7 @@ cgraph_clone_inlined_nodes (struct cgraph_edge *e, bool duplicate)
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{
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struct cgraph_node *n;
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/* We may elliminate the need for out-of-line copy to be output. In that
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/* We may eliminate the need for out-of-line copy to be output. In that
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case just go ahead and re-use it. */
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if (!e->callee->callers->next_caller
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&& (!e->callee->needed || DECL_EXTERNAL (e->callee->decl))
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@ -1348,7 +1348,7 @@ cgraph_decide_inlining_of_small_functions (void)
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}
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/* Decide on the inlining. We do so in the topological order to avoid
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expenses on updating datastructures. */
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expenses on updating data structures. */
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static void
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cgraph_decide_inlining (void)
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}
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/* Decide on the inlining. We do so in the topological order to avoid
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expenses on updating datastructures. */
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expenses on updating data structures. */
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static void
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cgraph_decide_inlining_incrementally (struct cgraph_node *node)
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@ -1561,7 +1561,7 @@ cgraph_expand_all_functions (void)
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if (order_pos != cgraph_n_nodes)
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abort ();
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/* Garbage collector may remove inline clones we elliminate during
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/* Garbage collector may remove inline clones we eliminate during
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optimization. So we must be sure to not reference them. */
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for (i = 0; i < order_pos; i++)
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if (order[i]->output)
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@ -98,7 +98,7 @@
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"ev4_ist"
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"store_data_bypass_p")
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; Multiplies use a non-piplined imul unit. Also, "no [ebox] insn can
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; Multiplies use a non-pipelined imul unit. Also, "no [ebox] insn can
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; be issued exactly three cycles before an integer multiply completes".
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(define_insn_reservation "ev4_imulsi" 21
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@ -18,7 +18,7 @@
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;; the Free Software Foundation, 59 Temple Place - Suite 330,
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;; Boston, MA 02111-1307, USA.
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;; EV5 has two asymetric integer units, E0 and E1, plus separate
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;; EV5 has two asymmetric integer units, E0 and E1, plus separate
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;; FP add and multiply units.
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(define_automaton "ev5_0,ev5_1")
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; Conditional move and branch can issue the same cycle as the test.
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(define_bypass 0 "ev5_ilogcmp" "ev5_ibr,ev5_cmov" "if_test_bypass_p")
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; Multiplies use a non-piplined imul unit. Also, "no insn can be issued
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; Multiplies use a non-pipelined imul unit. Also, "no insn can be issued
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; to E0 exactly two cycles before an integer multiply completes".
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(define_insn_reservation "ev5_imull" 8
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@ -136,7 +136,7 @@
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(define_bypass 13 "ev5_imulq" "ev5_imull,ev5_imulq,ev5_imulh")
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(define_bypass 15 "ev5_imulh" "ev5_imull,ev5_imulq,ev5_imulh")
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; Similarly for the FPU we have two asymetric units.
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; Similarly for the FPU we have two asymmetric units.
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(define_insn_reservation "ev5_fadd" 4
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(and (eq_attr "cpu" "ev5")
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@ -22,7 +22,7 @@
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; expected to help over-much, but a precise description can be important
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; for software pipelining.
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;
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; EV6 has two symmetric pairs ("clusters") of two asymetric integer
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; EV6 has two symmetric pairs ("clusters") of two asymmetric integer
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; units ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
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;
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; ??? The clusters have independent register files that are re-synced
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@ -7875,7 +7875,7 @@ print_multi_reg (FILE *stream, const char *instr, int reg, int mask)
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/* Add a ^ character for the 26-bit ABI, but only if we were loading
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the PC. Otherwise we would generate an UNPREDICTABLE instruction.
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Strictly speaking the instruction would be unpredicatble only if
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Strictly speaking the instruction would be unpredictable only if
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we were writing back the base register as well, but since we never
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want to generate an LDM type 2 instruction (register bank switching)
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which is what you get if the PC is not being loaded, we do not need
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@ -1244,7 +1244,7 @@ c4x_emit_move_sequence (rtx *operands, enum machine_mode mode)
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&& dp_reg_operand (XEXP (op1, 0), mode))
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{
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/* expand_increment will sometimes create a LO_SUM immediate
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address. Undo this sillyness. */
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address. Undo this silliness. */
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op1 = XEXP (op1, 1);
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}
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@ -154,7 +154,7 @@
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; not for 'c'.
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; The 'f' constraint is only for float register operands---when
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; a register satisying the 'f' constraint is used as a dst operand,
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; a register satisfying the 'f' constraint is used as a dst operand,
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; the CC gets clobbered (except for LDFcond).
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; The ! in front of the 'b' constraint says to GCC to disparage the
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@ -190,7 +190,7 @@
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; didn't allow it to move the CC around.
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; Note that fundamental operations, such as moves, must not clobber the
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; CC. Thus movqi choses a move instruction that doesn't clobber the CC.
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; CC. Thus movqi chooses a move instruction that doesn't clobber the CC.
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; If GCC wants to combine a move with a compare, it is smart enough to
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; chose the move instruction that sets the CC.
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@ -2947,7 +2947,7 @@ cris_split_movdx (rtx *operands)
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int reverse
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= (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
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/* The original code imples that we can't do
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/* The original code implies that we can't do
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move.x [rN+],rM move.x [rN],rM+1
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when rN is dead, because of REG_NOTES damage. That is
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consistent with what I've seen, so don't try it.
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@ -337,7 +337,7 @@ extern int target_flags;
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/* Whether or not to work around multiplication instruction hardware bug
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when generating code for models where it may be present. From the
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trouble report for Etrax 100 LX: "A multiply operation may cause
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incorrect cache behaviour under some specific circumstances. The
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incorrect cache behavior under some specific circumstances. The
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problem can occur if the instruction following the multiply instruction
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causes a cache miss, and multiply operand 1 (source operand) bits
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[31:27] matches the logical mapping of the mode register address
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@ -1208,7 +1208,7 @@ extern struct rtx_def * fr30_compare_op0;
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extern struct rtx_def * fr30_compare_op1;
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/*}}}*/
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/*{{{ PERDICATE_CODES. */
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/*{{{ PREDICATE_CODES. */
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#define PREDICATE_CODES \
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{ "stack_add_operand", { CONST_INT }}, \
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@ -6627,7 +6627,7 @@ frv_ifcvt_init_extra_fields (ce_if_block_t *ce_info ATTRIBUTE_UNUSED)
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}
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/* Internal function to add a potenial insn to the list of insns to be inserted
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/* Internal function to add a potential insn to the list of insns to be inserted
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if the conditional execution conversion is successful. */
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static void
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@ -931,7 +931,7 @@ extern int target_flags;
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#define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
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/* Registers used by the exception handling functions. These should be
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registers that are not otherwised used by the calling sequence. */
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registers that are not otherwise used by the calling sequence. */
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#define FIRST_EH_REGNUM 14
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#define LAST_EH_REGNUM 15
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@ -2788,7 +2788,7 @@
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[(set_attr "length" "8")
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(set_attr "type" "multi")])
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;; Patterns for addsi3/subdi3 after spliting
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;; Patterns for addsi3/subdi3 after splitting
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(define_insn "adddi3_lower"
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[(set (match_operand:SI 0 "integer_register_operand" "=d")
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(plus:SI (match_operand:SI 1 "integer_register_operand" "d")
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@ -4671,7 +4671,7 @@ same_cmp_following_p (rtx i1)
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}
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/* Return nonzero if OPERANDS are valid for stm (or ldm) that pushes
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(or pops) N registers. OPERANDS are asssumed to be an array of
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(or pops) N registers. OPERANDS are assumed to be an array of
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registers. */
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int
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@ -15817,7 +15817,7 @@ ix86_expand_vector_init (rtx target, rtx vals)
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}
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/* ... values where only first field is non-constant are best loaded
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from the pool and overwriten via move later. */
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from the pool and overwritten via move later. */
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if (!i)
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{
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rtx op = simplify_gen_subreg (mode, XVECEXP (vals, 0, 0),
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|
|
|
@ -14937,7 +14937,7 @@
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;; With sincos pattern defined, sin and cos builtin function will be
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;; expanded to sincos pattern with one of its outputs left unused.
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;; Cse pass will detected, if two sincos patterns can be combined,
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;; otherwise sincos pattern will be splitted back to sin or cos pattern,
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;; otherwise sincos pattern will be split back to sin or cos pattern,
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;; depending on the unused output.
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(define_insn "sincosdf3"
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|
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@ -672,7 +672,7 @@ i386_pe_section_type_flags (tree decl, const char *name, int reloc)
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unsigned int **slot;
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|
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/* The names we put in the hashtable will always be the unique
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versions gived to us by the stringtable, so we can just use
|
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versions given to us by the stringtable, so we can just use
|
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their addresses as the keys. */
|
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if (!htab)
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htab = htab_create (31, htab_hash_pointer, htab_eq_pointer, NULL);
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|
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|
@ -484,7 +484,7 @@
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(define_reservation "2_M_only_um01" "2_M0_only_um01|2_M1_only_um01")
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;; I instruction is dispersed to the lowest numbered I unit
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;; not already in use. Remeber about possible splitting.
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;; not already in use. Remember about possible splitting.
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(define_reservation "2_I0"
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"2_0mi.i+2_ui0|2_0mii.+(2_ui0|2_ui1)|2_0mmi.+2_ui0\
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|2_0mfi.+2_ui0|2_0mi.b+2_ui0|(2_1mi.i|2_1mi.b)+(2_ui0|2_ui1)\
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|
@ -1335,7 +1335,7 @@
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+(2b_um2|2b_um3)")
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;; I instruction is dispersed to the lowest numbered I unit
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;; not already in use. Remeber about possible splitting.
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;; not already in use. Remember about possible splitting.
|
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(define_reservation "2b_I"
|
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"2b_0mi.i+2_2+2b_ui0|2b_0mii.+2_3+(2b_ui0|2b_ui1)|2b_0mmi.+2_3+2b_ui0\
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|2b_0mfi.+2_3+2b_ui0|2b_0mi.b+2_2+2b_ui0\
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|
|
|
@ -2730,7 +2730,7 @@ ip2k_gen_unsigned_comp_branch (rtx insn, enum rtx_code code, rtx label)
|
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case GTU:
|
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if (imm_sub)
|
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{
|
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/* > 0xffffffffffffffff never suceeds! */
|
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/* > 0xffffffffffffffff never succeeds! */
|
||||
if (((const_high & 0xffffffff) != 0xffffffff)
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|| ((const_low & 0xffffffff) != 0xffffffff))
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{
|
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|
@ -2948,7 +2948,7 @@ ip2k_gen_unsigned_comp_branch (rtx insn, enum rtx_code code, rtx label)
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if (((const_high & 0xffffffff) == 0xffffffff)
|
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&& ((const_low & 0xffffffff) == 0xffffffff))
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{
|
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/* <= 0xffffffffffffffff always suceeds. */
|
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/* <= 0xffffffffffffffff always succeeds. */
|
||||
OUT_AS1 (page, %2);
|
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OUT_AS1 (jmp, %2);
|
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}
|
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|
|
|
@ -4762,7 +4762,7 @@ override_options (void)
|
|||
|
||||
(1) The value of an R_MIPS_GOT16 relocation depends on whether
|
||||
the symbol is local or global. We therefore need to know
|
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a symbol's binding before refering to it using %got().
|
||||
a symbol's binding before referring to it using %got().
|
||||
|
||||
(2) R_MIPS_CALL16 can only be applied to global symbols.
|
||||
|
||||
|
|
|
@ -2076,7 +2076,7 @@ extern enum reg_class mips_char_to_class[256];
|
|||
`T' is for constant move_operands that cannot be safely loaded into $25.
|
||||
`U' is for constant move_operands that can be safely loaded into $25.
|
||||
`W' is for memory references that are based on a member of BASE_REG_CLASS.
|
||||
This is true for all non-mips16 references (although it can somtimes
|
||||
This is true for all non-mips16 references (although it can sometimes
|
||||
be indirect if !TARGET_EXPLICIT_RELOCS). For mips16, it excludes
|
||||
stack and constant-pool references. */
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
;; contrived to support published timings.
|
||||
;;
|
||||
;; Reference:
|
||||
;; "SR3 Microporocessor Specification, System development information,"
|
||||
;; "SR3 Microprocessor Specification, System development information,"
|
||||
;; Revision 1.0, 13 December 2000.
|
||||
;;
|
||||
;;
|
||||
|
|
|
@ -8419,7 +8419,7 @@ pa_reorg (void)
|
|||
markers disables output of the branch table to readonly memory,
|
||||
and any alignment directives that might be needed. Possibly,
|
||||
the begin_brtab insn should be output before the label for the
|
||||
table. This doesn matter at the moment since the tables are
|
||||
table. This doesn't matter at the moment since the tables are
|
||||
always output in the text section. */
|
||||
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
||||
{
|
||||
|
|
|
@ -5219,7 +5219,7 @@ s390_return_addr_rtx (int count, rtx frame)
|
|||
return gen_rtx_MEM (Pmode, addr);
|
||||
}
|
||||
|
||||
/* Find first call clobbered register unsused in a function.
|
||||
/* Find first call clobbered register unused in a function.
|
||||
This could be used as base register in a leaf function
|
||||
or for holding the return address before epilogue. */
|
||||
|
||||
|
|
|
@ -338,7 +338,7 @@ static tree sh_build_builtin_va_list (void);
|
|||
TARGET_SCHED_INIT_GLOBAL: Added a new target hook in the generic
|
||||
scheduler; it is called inside the sched_init function just after
|
||||
find_insn_reg_weights function call. It is used to calculate the SImode
|
||||
and SFmode weights of insns of basic blocks; much similiar to what
|
||||
and SFmode weights of insns of basic blocks; much similar to what
|
||||
find_insn_reg_weights does.
|
||||
TARGET_SCHED_FINISH_GLOBAL: Corresponding cleanup hook.
|
||||
|
||||
|
|
|
@ -382,7 +382,7 @@ _cpp_find_failed (_cpp_file *file)
|
|||
|
||||
/* Given a filename FNAME search for such a file in the include path
|
||||
starting from START_DIR. If FNAME is the empty string it is
|
||||
interpreted as STDIN if START_DIR is PFILE->no_seach_path.
|
||||
interpreted as STDIN if START_DIR is PFILE->no_search_path.
|
||||
|
||||
If the file is not found in the file cache fall back to the O/S and
|
||||
add the result to our cache.
|
||||
|
@ -1342,7 +1342,7 @@ cpp_get_prev (cpp_buffer *b)
|
|||
return b->prev;
|
||||
}
|
||||
|
||||
/* This datastructure holds the list of header files that were seen
|
||||
/* This data structure holds the list of header files that were seen
|
||||
while the PCH was being built. The 'entries' field is kept sorted
|
||||
in memcmp() order; yes, this means that on little-endian systems,
|
||||
it's sorted initially by the least-significant byte of 'size', but
|
||||
|
|
|
@ -8875,7 +8875,7 @@ tree_expr_nonzero_p (tree t)
|
|||
{
|
||||
tree type = TREE_TYPE (t);
|
||||
|
||||
/* Doing something usefull for floating point would need more work. */
|
||||
/* Doing something useful for floating point would need more work. */
|
||||
if (!INTEGRAL_TYPE_P (type) && !POINTER_TYPE_P (type))
|
||||
return false;
|
||||
|
||||
|
|
|
@ -1293,7 +1293,7 @@ struct ggc_pch_data
|
|||
size_t written;
|
||||
};
|
||||
|
||||
/* Initialize the PCH datastructure. */
|
||||
/* Initialize the PCH data structure. */
|
||||
|
||||
struct ggc_pch_data *
|
||||
init_ggc_pch (void)
|
||||
|
|
|
@ -129,7 +129,7 @@ doloop_condition_get (rtx pattern)
|
|||
return condition;
|
||||
|
||||
/* ??? If a machine uses a funny comparison, we could return a
|
||||
canonicalised form here. */
|
||||
canonicalized form here. */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1089,7 +1089,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
|
|||
/* If TARGET is the same as one of the operands, the REG_EQUAL note
|
||||
won't be accurate, so use a new target. Do this also if target is not
|
||||
a REG, first because having a register instead may open optimization
|
||||
oportunities, and second because if target and op0 happen to be MEMs
|
||||
opportunities, and second because if target and op0 happen to be MEMs
|
||||
designating the same location, we would risk clobbering it too early
|
||||
in the code sequence we generate below. */
|
||||
if (target == 0 || target == op0 || target == op1 || ! REG_P (target))
|
||||
|
|
|
@ -3045,7 +3045,7 @@ convert_regs (FILE *file)
|
|||
|
||||
/* ??? Future: process inner loops first, and give them arbitrary
|
||||
initial stacks which emit_swap_insn can modify. This ought to
|
||||
prevent double fxch that aften appears at the head of a loop. */
|
||||
prevent double fxch that often appears at the head of a loop. */
|
||||
|
||||
/* Process all blocks reachable from all entry points. */
|
||||
for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
|
||||
|
|
|
@ -236,7 +236,7 @@ unlikely_text_section (void)
|
|||
current_function_name ());
|
||||
unlikely_section_label_printed = true;
|
||||
|
||||
/* Make sure that we have approprate alignment for instructions
|
||||
/* Make sure that we have appropriate alignment for instructions
|
||||
in this section. */
|
||||
assemble_align (FUNCTION_BOUNDARY);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue