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i386.c (builtin_description): Use MASK_SSE2 for __builtin_ia32_paddq and __builtin_ia32_subq. 

2005-12-06  Jan Beulich  <jbeulich@novell.com>

	* config/i386/i386.c (builtin_description): Use MASK_SSE2 for
	__builtin_ia32_paddq and __builtin_ia32_subq.
	(ix86_init_mmx_sse_builtins): Use MASK_SSE|MASK_3DNOW_A for
	__builtin_ia32_pshufw.
	* config/i386/i386.md (mmx_adddi3, mmx_subdi3): Depend on TARGET_SSE2.

From-SVN: r108106
This commit is contained in:
Jan Beulich 2005-12-06 09:07:23 +00:00 committed by Jan Beulich
parent e395963ff6
commit 1b004b5818
3 changed files with 13 additions and 5 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2005-12-06 Jan Beulich <jbeulich@novell.com>
* config/i386/i386.c (builtin_description): Use MASK_SSE2 for
__builtin_ia32_paddq and __builtin_ia32_subq.
(ix86_init_mmx_sse_builtins): Use MASK_SSE|MASK_3DNOW_A for
__builtin_ia32_pshufw.
* config/i386/i386.md (mmx_adddi3, mmx_subdi3): Depend on TARGET_SSE2.
2005-12-05 James E Wilson <wilson@specifix.com>
PR target/24934

6
gcc/config/i386/i386.c
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@ -13988,11 +13988,11 @@ static const struct builtin_description bdesc_2arg[] =
{ MASK_MMX, CODE_FOR_mmx_addv8qi3, "__builtin_ia32_paddb", IX86_BUILTIN_PADDB, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_addv4hi3, "__builtin_ia32_paddw", IX86_BUILTIN_PADDW, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_addv2si3, "__builtin_ia32_paddd", IX86_BUILTIN_PADDD, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_adddi3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, 0, 0 },
{ MASK_SSE2, CODE_FOR_mmx_adddi3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_subv8qi3, "__builtin_ia32_psubb", IX86_BUILTIN_PSUBB, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_subv4hi3, "__builtin_ia32_psubw", IX86_BUILTIN_PSUBW, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_subv2si3, "__builtin_ia32_psubd", IX86_BUILTIN_PSUBD, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_subdi3, "__builtin_ia32_psubq", IX86_BUILTIN_PSUBQ, 0, 0 },
{ MASK_SSE2, CODE_FOR_mmx_subdi3, "__builtin_ia32_psubq", IX86_BUILTIN_PSUBQ, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_ssaddv8qi3, "__builtin_ia32_paddsb", IX86_BUILTIN_PADDSB, 0, 0 },
{ MASK_MMX, CODE_FOR_mmx_ssaddv4hi3, "__builtin_ia32_paddsw", IX86_BUILTIN_PADDSW, 0, 0 },
@ -14632,7 +14632,7 @@ ix86_init_mmx_sse_builtins (void)
def_builtin (MASK_MMX, "__builtin_ia32_psraw", v4hi_ftype_v4hi_di, IX86_BUILTIN_PSRAW);
def_builtin (MASK_MMX, "__builtin_ia32_psrad", v2si_ftype_v2si_di, IX86_BUILTIN_PSRAD);
def_builtin (MASK_MMX, "__builtin_ia32_pshufw", v4hi_ftype_v4hi_int, IX86_BUILTIN_PSHUFW);
def_builtin (MASK_SSE | MASK_3DNOW_A, "__builtin_ia32_pshufw", v4hi_ftype_v4hi_int, IX86_BUILTIN_PSHUFW);
def_builtin (MASK_MMX, "__builtin_ia32_pmaddwd", v2si_ftype_v4hi_v4hi, IX86_BUILTIN_PMADDWD);
/* comi/ucomi insns. */

4
gcc/config/i386/mmx.md
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@ -573,7 +573,7 @@
[(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "nonimmediate_operand" "ym"))]
UNSPEC_NOP))]
"TARGET_MMX && ix86_binary_operator_ok (PLUS, DImode, operands)"
"TARGET_SSE2 && ix86_binary_operator_ok (PLUS, DImode, operands)"
"paddq\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])
@ -614,7 +614,7 @@
[(minus:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:DI 2 "nonimmediate_operand" "ym"))]
UNSPEC_NOP))]
"TARGET_MMX"
"TARGET_SSE2"
"psubq\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "DI")])