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mips.md (andsi3): Force operand 1 to a register too.

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* config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
a register too.
(anddi3, iorsi3): Likewise.

From-SVN: r50988
This commit is contained in:
Alexandre Oliva 2002-03-18 19:17:27 +00:00 committed by Alexandre Oliva
parent c066429ee4
commit 1bfbbbcf9d
2 changed files with 16 additions and 3 deletions
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4
gcc/ChangeLog
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@ -1,5 +1,9 @@
2002-03-18 Alexandre Oliva <aoliva@redhat.com> 2002-03-18 Alexandre Oliva <aoliva@redhat.com>
* config/mips/mips.md (andsi3) [TARGET_MIPS16]: Force operand 1 to
a register too.
(anddi3, iorsi3): Likewise.
* config/mips/mips.h (ENCODE_SECTION_INFO) [TARGET_MIPS16]: Don't * config/mips/mips.h (ENCODE_SECTION_INFO) [TARGET_MIPS16]: Don't
use %gprel for symbols that are going to be placed in linkonce use %gprel for symbols that are going to be placed in linkonce
sections. sections.

9
gcc/config/mips/mips.md
View File

@ -3333,7 +3333,10 @@ move\\t%0,%z4\\n\\
" "
{ {
if (TARGET_MIPS16) if (TARGET_MIPS16)
{
operands[1] = force_reg (SImode, operands[1]);
operands[2] = force_reg (SImode, operands[2]); operands[2] = force_reg (SImode, operands[2]);
}
}") }")
(define_insn "" (define_insn ""
@ -3364,7 +3367,10 @@ move\\t%0,%z4\\n\\
" "
{ {
if (TARGET_MIPS16) if (TARGET_MIPS16)
{
operands[1] = force_reg (DImode, operands[1]);
operands[2] = force_reg (DImode, operands[2]); operands[2] = force_reg (DImode, operands[2]);
}
}") }")
(define_insn "" (define_insn ""
@ -3436,7 +3442,10 @@ move\\t%0,%z4\\n\\
" "
{ {
if (TARGET_MIPS16) if (TARGET_MIPS16)
{
operands[1] = force_reg (SImode, operands[1]);
operands[2] = force_reg (SImode, operands[2]); operands[2] = force_reg (SImode, operands[2]);
}
}") }")
(define_insn "" (define_insn ""