pa.md (post_stw+1): Use pmode_register_operand.

* pa.md (post_stw+1): Use pmode_register_operand.
        (dcacheflush, icacheflush): Likewise.

From-SVN: r30003
This commit is contained in:
Richard Henderson 1999-10-14 22:57:07 -07:00 committed by Jeff Law
parent 0c5912f4cb
commit 1c784a0eeb
2 changed files with 11 additions and 10 deletions

View File

@ -10,6 +10,9 @@ Fri Oct 15 18:36:07 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
Thu Oct 14 22:14:23 1999 Richard Henderson <rth@cygnus.com>
* pa.md (post_stw+1): Use pmode_register_operand.
(dcacheflush, icacheflush): Likewise.
* i386.md (movstricthi_1): Allow r/r.
Thu Oct 14 19:44:08 1999 Jan Hubicka <hubicka@freesoft.cz>

View File

@ -1572,7 +1572,7 @@
;; Note since this pattern can be created at reload time (via movsi), all
;; the same rules for movsi apply here. (no new pseudos, no temporaries).
(define_insn ""
[(set (match_operand 0 "register_operand" "=a")
[(set (match_operand 0 "pmode_register_operand" "=a")
(match_operand 1 "pic_label_operand" ""))]
""
"*
@ -5608,8 +5608,8 @@
(define_insn "dcacheflush"
[(unspec_volatile [(const_int 1)] 0)
(use (mem:SI (match_operand 0 "register_operand" "r")))
(use (mem:SI (match_operand 1 "register_operand" "r")))]
(use (mem:SI (match_operand 0 "pmode_register_operand" "r")))
(use (mem:SI (match_operand 1 "pmode_register_operand" "r")))]
""
"fdc 0(%0)\;fdc 0(%1)\;sync"
[(set_attr "type" "multi")
@ -5617,11 +5617,11 @@
(define_insn "icacheflush"
[(unspec_volatile [(const_int 2)] 0)
(use (mem:SI (match_operand 0 "register_operand" "r")))
(use (mem:SI (match_operand 1 "register_operand" "r")))
(use (match_operand 2 "register_operand" "r"))
(clobber (match_operand 3 "register_operand" "=&r"))
(clobber (match_operand 4 "register_operand" "=&r"))]
(use (mem:SI (match_operand 0 "pmode_register_operand" "r")))
(use (mem:SI (match_operand 1 "pmode_register_operand" "r")))
(use (match_operand 2 "pmode_register_operand" "r"))
(clobber (match_operand 3 "pmode_register_operand" "=&r"))
(clobber (match_operand 4 "pmode_register_operand" "=&r"))]
""
"mfsp %%sr0,%4\;ldsid (%2),%3\;mtsp %3,%%sr0\;fic 0(%%sr0,%0)\;fic 0(%%sr0,%1)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop"
[(set_attr "type" "multi")
@ -5856,5 +5856,3 @@
emit_insn (gen_blockage ());
DONE;
}")